From: Daniel P. Berrangé Date: Mon, 21 May 2018 21:54:22 +0000 (+0100) Subject: i386: define the 'ssbd' CPUID feature bit (CVE-2018-3639) X-Git-Tag: v2.12.1~66 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=8a302f42a5f84d89c4590022e55b1b61621b7f79;p=thirdparty%2Fqemu.git i386: define the 'ssbd' CPUID feature bit (CVE-2018-3639) New microcode introduces the "Speculative Store Bypass Disable" CPUID feature bit. This needs to be exposed to guest OS to allow them to protect against CVE-2018-3639. Signed-off-by: Daniel P. Berrangé Reviewed-by: Konrad Rzeszutek Wilk Signed-off-by: Konrad Rzeszutek Wilk Message-Id: <20180521215424.13520-2-berrange@redhat.com> Signed-off-by: Eduardo Habkost (cherry picked from commit d19d1f965904a533998739698020ff4ee8a103da) Signed-off-by: Michael Roth --- diff --git a/target/i386/cpu.c b/target/i386/cpu.c index a20fe265735..2f5263e22f0 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -510,7 +510,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, "spec-ctrl", NULL, - NULL, NULL, NULL, NULL, + NULL, NULL, NULL, "ssbd", }, .cpuid_eax = 7, .cpuid_needs_ecx = true, .cpuid_ecx = 0, diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 1b219fafc49..970ab96e543 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -684,6 +684,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */ #define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */ #define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */ +#define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypass Disable */ #define KVM_HINTS_DEDICATED (1U << 0)