From: Tom Rini <trini@konsulko.com>
Date: Tue, 22 Apr 2025 13:59:38 +0000 (-0600)
Subject: Merge tag 'u-boot-socfpga-next-20250422' of https://source.denx.de/u-boot/custodians... 
X-Git-Tag: v2025.07-rc1~42
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=8ab3cd0229a0ebf204cb5fd94f8a09e62825ffb4;p=thirdparty%2Fu-boot.git

Merge tag 'u-boot-socfpga-next-20250422' of https://source.denx.de/u-boot/custodians/u-boot-socfpga

This pull request contains updates for the SoCFPGA platform, targeting
the 2025.07 release cycle. Highlights include enhancements to Agilex5
support, improvements in DDR error handling, and bridge reset handling
for SoC64 devices.

Key updates:

Agilex5 platform enhancements:
  *   New MMU region mappings and memory layout updates using
      LMB_ARCH_MEM_MAP.
  *   Fixes for bloblist configuration, kernel FIT image generation, and
      VAB flow enablement.
  *   GPIO pin control added for SDIO selection.
  *   Marvell PHY driver enabled in defconfig.

Agilex5 / SoC64 DDR subsystem:
  *   Added ECC debug improvements for IOSSM.
  *   Introduced LPDDR inline ECC support.
  *   Resolved size calculation overflow in memory driver.

SoC64 improvements:
  *   Enhanced mailbox communication with the SDM to reflect various
      boot stage transitions.
  *   Implemented F2S bridge reset support and updated related reset
      manager registers.
  *   Expanded SoC64 CPU info reporting.

General maintenance:
  *   Additional peripherals released from reset for Arria10.
  *   Cleanup of legacy or incorrect Kconfig implications.

This patch set has been tested on Agilex 5 devkit.

Passing all pipeline tests at:
https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/25867
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8ab3cd0229a0ebf204cb5fd94f8a09e62825ffb4