From: Daniel Henrique Barboza Date: Tue, 29 Apr 2025 12:44:21 +0000 (-0300) Subject: target/riscv/kvm: add scounteren CSR X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=8ab99a05f34bab3f9fae49299ee407ead78f0470;p=thirdparty%2Fqemu.git target/riscv/kvm: add scounteren CSR Add support for the scounteren KVM CSR. Note that env->scounteren is a 32 bit and all KVM CSRs are target_ulong, so scounteren will be capped to 32 bits read/writes. Reported-by: Andrew Jones Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones Reviewed-by: Alistair Francis Message-ID: <20250429124421.223883-10-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis --- diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index ca171d5457..82f9728636 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -251,6 +251,7 @@ static KVMCPUConfig kvm_csr_cfgs[] = { KVM_CSR_CFG("stval", stval, RISCV_CSR_REG(stval)), KVM_CSR_CFG("sip", mip, RISCV_CSR_REG(sip)), KVM_CSR_CFG("satp", satp, RISCV_CSR_REG(satp)), + KVM_CSR_CFG("scounteren", scounteren, RISCV_CSR_REG(scounteren)), KVM_CSR_CFG("senvcfg", senvcfg, RISCV_CSR_REG(senvcfg)), }; @@ -701,6 +702,7 @@ static void kvm_riscv_reset_regs_csr(CPURISCVState *env) env->stval = 0; env->mip = 0; env->satp = 0; + env->scounteren = 0; env->senvcfg = 0; }