From: Nicholas Piggin Date: Wed, 27 Dec 2023 13:53:25 +0000 (+1000) Subject: ppc/spapr: Adjust ibm,pa-features for POWER9 X-Git-Tag: v9.0.0-rc0~10^2~30 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=8b0e3fb835511fe65cfb0df79fc17df2fede4805;p=thirdparty%2Fqemu.git ppc/spapr: Adjust ibm,pa-features for POWER9 "MMR" and "SPR SO" are not implemented in POWER9, so clear those bits. HTM is not set by default, and only later if the cap is set, so remove the comment that suggests otherwise. Reviewed-by: Harsh Prateek Bora Signed-off-by: Nicholas Piggin --- diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 4192cd8d6c9..5bbd0d7a048 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -258,14 +258,14 @@ static void spapr_dt_pa_features(SpaprMachineState *spapr, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */ /* 16: Vector */ 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */ - /* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */ + /* 18: Vec. Scalar, 20: Vec. XOR */ 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */ /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */ 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */ - /* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */ - 0x80, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */ - /* 36: SPR SO, 40: Radix MMU */ - 0x80, 0x00, 0x00, 0x00, 0x80, 0x00, /* 36 - 41 */ + /* 32: LE atomic, 34: EBB + ext EBB */ + 0x00, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */ + /* 40: Radix MMU */ + 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 36 - 41 */ /* 42: PM, 44: PC RA, 46: SC vec'd */ 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */ /* 48: SIMD, 50: QP BFP, 52: String */