From: Ville Syrjälä Date: Mon, 7 Mar 2022 23:39:39 +0000 (+0200) Subject: drm/i915: Populate bxt/glk DPLL clock limits a bit more X-Git-Tag: v5.19-rc1~153^2~20^2~154 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=8b3ed19ccf9fc80d8d750f61c620eaf9836008ad;p=thirdparty%2Flinux.git drm/i915: Populate bxt/glk DPLL clock limits a bit more Set the bxt/glk DPLL min dotclock to 25MHz (HDMI minimum) and the max to 594 MHz (HDMI max). The supported DP frequencies (162MHz-540MHz) fit within the same range. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20220307233940.4161-8-ville.syrjala@linux.intel.com Acked-by: Jani Nikula --- diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c index c0c76ff8b5908..95b9d327ed4d6 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll.c +++ b/drivers/gpu/drm/i915/display/intel_dpll.c @@ -285,8 +285,7 @@ static const struct intel_limit intel_limits_chv = { }; static const struct intel_limit intel_limits_bxt = { - /* FIXME: find real dot limits */ - .dot = { .min = 0, .max = INT_MAX }, + .dot = { .min = 25000, .max = 594000 }, .vco = { .min = 4800000, .max = 6700000 }, .n = { .min = 1, .max = 1 }, .m1 = { .min = 2, .max = 2 },