From: Greg Kroah-Hartman Date: Mon, 9 Dec 2013 19:03:19 +0000 (-0800) Subject: remove queue-3.10/arm-mvebu-re-enable-pcie-on-armada-370-db.patch X-Git-Tag: v3.4.74~10 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=8bca730fb23df7e302b875a47d8d1fd89fbaf6a1;p=thirdparty%2Fkernel%2Fstable-queue.git remove queue-3.10/arm-mvebu-re-enable-pcie-on-armada-370-db.patch --- diff --git a/queue-3.10/arm-mvebu-re-enable-pcie-on-armada-370-db.patch b/queue-3.10/arm-mvebu-re-enable-pcie-on-armada-370-db.patch deleted file mode 100644 index ccdf69631aa..00000000000 --- a/queue-3.10/arm-mvebu-re-enable-pcie-on-armada-370-db.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 96039f735e290281d0c8a08fc467de2cd610543d Mon Sep 17 00:00:00 2001 -From: Thomas Petazzoni -Date: Mon, 25 Nov 2013 17:26:47 +0100 -Subject: ARM: mvebu: re-enable PCIe on Armada 370 DB - -From: Thomas Petazzoni - -commit 96039f735e290281d0c8a08fc467de2cd610543d upstream. - -Commit 14fd8ed0a7fd19913 ("ARM: mvebu: Relocate Armada 370/XP PCIe -device tree nodes") relocated the PCIe controller DT nodes one level -up in the Device Tree, to reflect a more correct representation of the -hardware introduced by the mvebu-mbus Device Tree binding. - -However, while most of the boards were properly adjusted accordingly, -the Armada 370 DB board was left unchanged, and therefore, PCIe is -seen as not enabled on this board. This patch fixes that by moving the -PCIe controller node one level-up in armada-370-db.dts. - -Signed-off-by: Thomas Petazzoni -Fixes: 14fd8ed0a7fd19913 "ARM: mvebu: Relocate Armada 370/XP PCIe device tree nodes" -Signed-off-by: Jason Cooper -Signed-off-by: Greg Kroah-Hartman - ---- - arch/arm/boot/dts/armada-370-db.dts | 28 ++++++++++++++-------------- - 1 file changed, 14 insertions(+), 14 deletions(-) - ---- a/arch/arm/boot/dts/armada-370-db.dts -+++ b/arch/arm/boot/dts/armada-370-db.dts -@@ -95,22 +95,22 @@ - spi-max-frequency = <50000000>; - }; - }; -+ }; - -- pcie-controller { -+ pcie-controller { -+ status = "okay"; -+ /* -+ * The two PCIe units are accessible through -+ * both standard PCIe slots and mini-PCIe -+ * slots on the board. -+ */ -+ pcie@1,0 { -+ /* Port 0, Lane 0 */ -+ status = "okay"; -+ }; -+ pcie@2,0 { -+ /* Port 1, Lane 0 */ - status = "okay"; -- /* -- * The two PCIe units are accessible through -- * both standard PCIe slots and mini-PCIe -- * slots on the board. -- */ -- pcie@1,0 { -- /* Port 0, Lane 0 */ -- status = "okay"; -- }; -- pcie@2,0 { -- /* Port 1, Lane 0 */ -- status = "okay"; -- }; - }; - }; - }; diff --git a/queue-3.10/series b/queue-3.10/series index ba6a0f0fa53..78827546e1b 100644 --- a/queue-3.10/series +++ b/queue-3.10/series @@ -12,7 +12,6 @@ arm-footbridge-fix-vga-initialisation.patch arm-footbridge-fix-ebsa285-leds.patch arm-at91-sama5d3-reduce-twi-internal-clock-frequency.patch arm-mvebu-use-the-virtual-cpu-registers-to-access-coherency-registers.patch -arm-mvebu-re-enable-pcie-on-armada-370-db.patch asoc-wm8990-mark-the-register-map-as-dirty-when-powering-down.patch asoc-wm8731-fix-dsp-mode-configuration.patch vfs-fix-subtle-use-after-free-of-pipe_inode_info.patch