From: Marcel Ziswiler Date: Sat, 1 Sep 2018 13:04:55 +0000 (+0200) Subject: ARM: tegra: apalis-tk1: enable emmc ddr52 mode X-Git-Tag: v4.20-rc1~66^2~31^2~48 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=8be6e49a653ca79dcae1125238f78db590d86622;p=thirdparty%2Flinux.git ARM: tegra: apalis-tk1: enable emmc ddr52 mode Add mmc-ddr-1_8v property enabling eMMC DDR52 mode. root@apalis-tk1-mainline:~# cat /sys/kernel/debug/mmc2/ios clock: 52000000 Hz actual clock: 52000000 Hz vdd: 21 (3.3 ~ 3.4 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 3 (8 bits) timing spec: 8 (mmc DDR52) signal voltage: 1 (1.80 V) driver type: 0 (driver type B) root@apalis-tk1-mainline:~# hdparm -t /dev/mmcblk2 /dev/mmcblk2: Timing buffered disk reads: 256 MB in 3.02 seconds = 84.83 MB/sec Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi index 3408317c0f00a..37e443e21ce63 100644 --- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi @@ -1919,6 +1919,7 @@ non-removable; vmmc-supply = <®_module_3v3>; /* VCC */ vqmmc-supply = <®_1v8_vddio>; /* VCCQ */ + mmc-ddr-1_8v; }; /* CPU DFLL clock */ diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi index ba6fc2e51b2d0..f76580f6cc801 100644 --- a/arch/arm/boot/dts/tegra124-apalis.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi @@ -1948,6 +1948,7 @@ non-removable; vmmc-supply = <®_module_3v3>; /* VCC */ vqmmc-supply = <®_1v8_vddio>; /* VCCQ */ + mmc-ddr-1_8v; }; /* CPU DFLL clock */