From: Russell King (Oracle) Date: Wed, 19 Nov 2025 10:23:19 +0000 (+0000) Subject: net: stmmac: move common DMA AXI register bits to common.h X-Git-Tag: v6.19-rc1~170^2~107^2~4 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=8c696659f47aa4f4e5f35808b416664378930dd9;p=thirdparty%2Fkernel%2Flinux.git net: stmmac: move common DMA AXI register bits to common.h Move the common DMA AXI register bits to common.h so they can be shared and we can provide a common function to convert the axi->dma_blen[] array to the format needed for this register. Signed-off-by: Russell King (Oracle) Link: https://patch.msgid.link/E1vLfLL-0000000FMap-49gf@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski --- diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h index 7395bbb94aeaa..3c6e7fe7b9999 100644 --- a/drivers/net/ethernet/stmicro/stmmac/common.h +++ b/drivers/net/ethernet/stmicro/stmmac/common.h @@ -548,6 +548,16 @@ struct dma_features { #define LPI_CTRL_STATUS_TLPIEX BIT(1) /* Transmit LPI Exit */ #define LPI_CTRL_STATUS_TLPIEN BIT(0) /* Transmit LPI Entry */ +/* Common definitions for AXI Master Bus Mode */ +#define DMA_AXI_AAL BIT(12) +#define DMA_AXI_BLEN256 BIT(7) +#define DMA_AXI_BLEN128 BIT(6) +#define DMA_AXI_BLEN64 BIT(5) +#define DMA_AXI_BLEN32 BIT(4) +#define DMA_AXI_BLEN16 BIT(3) +#define DMA_AXI_BLEN8 BIT(2) +#define DMA_AXI_BLEN4 BIT(1) + #define STMMAC_CHAIN_MODE 0x1 #define STMMAC_RING_MODE 0x2 diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h index 4f980dcd39582..dfcb7ce79e765 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h @@ -69,15 +69,8 @@ #define DMA_SYS_BUS_MB BIT(14) #define DMA_AXI_1KBBE BIT(13) -#define DMA_SYS_BUS_AAL BIT(12) +#define DMA_SYS_BUS_AAL DMA_AXI_AAL #define DMA_SYS_BUS_EAME BIT(11) -#define DMA_AXI_BLEN256 BIT(7) -#define DMA_AXI_BLEN128 BIT(6) -#define DMA_AXI_BLEN64 BIT(5) -#define DMA_AXI_BLEN32 BIT(4) -#define DMA_AXI_BLEN16 BIT(3) -#define DMA_AXI_BLEN8 BIT(2) -#define DMA_AXI_BLEN4 BIT(1) #define DMA_SYS_BUS_FB BIT(0) #define DMA_BURST_LEN_DEFAULT (DMA_AXI_BLEN256 | DMA_AXI_BLEN128 | \ diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h index 5d9c18f5bbf58..967a735e9a0bd 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h @@ -68,20 +68,13 @@ static inline u32 dma_chan_base_addr(u32 base, u32 chan) #define DMA_AXI_OSR_MAX 0xf #define DMA_AXI_MAX_OSR_LIMIT ((DMA_AXI_OSR_MAX << DMA_AXI_WR_OSR_LMT_SHIFT) | \ (DMA_AXI_OSR_MAX << DMA_AXI_RD_OSR_LMT_SHIFT)) -#define DMA_AXI_1KBBE BIT(13) -#define DMA_AXI_AAL BIT(12) -#define DMA_AXI_BLEN256 BIT(7) -#define DMA_AXI_BLEN128 BIT(6) -#define DMA_AXI_BLEN64 BIT(5) -#define DMA_AXI_BLEN32 BIT(4) -#define DMA_AXI_BLEN16 BIT(3) -#define DMA_AXI_BLEN8 BIT(2) -#define DMA_AXI_BLEN4 BIT(1) #define DMA_BURST_LEN_DEFAULT (DMA_AXI_BLEN256 | DMA_AXI_BLEN128 | \ DMA_AXI_BLEN64 | DMA_AXI_BLEN32 | \ DMA_AXI_BLEN16 | DMA_AXI_BLEN8 | \ DMA_AXI_BLEN4) +#define DMA_AXI_1KBBE BIT(13) + #define DMA_AXI_UNDEF BIT(0) #define DMA_AXI_BURST_LEN_MASK 0x000000FE diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h index e48cfa05000c0..16c6d03fc929f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h @@ -338,16 +338,16 @@ #define XGMAC_RD_OSR_LMT_SHIFT 16 #define XGMAC_EN_LPI BIT(15) #define XGMAC_LPI_XIT_PKT BIT(14) -#define XGMAC_AAL BIT(12) +#define XGMAC_AAL DMA_AXI_AAL #define XGMAC_EAME BIT(11) #define XGMAC_BLEN GENMASK(7, 1) -#define XGMAC_BLEN256 BIT(7) -#define XGMAC_BLEN128 BIT(6) -#define XGMAC_BLEN64 BIT(5) -#define XGMAC_BLEN32 BIT(4) -#define XGMAC_BLEN16 BIT(3) -#define XGMAC_BLEN8 BIT(2) -#define XGMAC_BLEN4 BIT(1) +#define XGMAC_BLEN256 DMA_AXI_BLEN256 +#define XGMAC_BLEN128 DMA_AXI_BLEN128 +#define XGMAC_BLEN64 DMA_AXI_BLEN64 +#define XGMAC_BLEN32 DMA_AXI_BLEN32 +#define XGMAC_BLEN16 DMA_AXI_BLEN16 +#define XGMAC_BLEN8 DMA_AXI_BLEN8 +#define XGMAC_BLEN4 DMA_AXI_BLEN4 #define XGMAC_UNDEF BIT(0) #define XGMAC_TX_EDMA_CTRL 0x00003040 #define XGMAC_TDPS GENMASK(29, 0)