From: Greg Kroah-Hartman Date: Fri, 8 Mar 2019 10:48:30 +0000 (+0100) Subject: 4.19-stable patches X-Git-Tag: v5.0.1~15 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=8ec95f12eea0ba140d626bbc7d4f25f8870b951d;p=thirdparty%2Fkernel%2Fstable-queue.git 4.19-stable patches added patches: x86-boot-compressed-64-do-not-read-legacy-rom-on-efi-system.patch x86-cpu-amd-set-the-cpb-bit-unconditionally-on-f17h.patch --- diff --git a/queue-4.19/series b/queue-4.19/series index 8556f3ee1cc..092cd4a213c 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -50,3 +50,5 @@ net-dsa-mv88e6xxx-prevent-interrupt-storm-caused-by-mv88e6390x_port_set_cmode.pa net-sched-act_ipt-fix-refcount-leak-when-replace-fails.patch net-sched-act_skbedit-fix-refcount-leak-when-replace-fails.patch net-sched-act_tunnel_key-fix-null-pointer-dereference-during-init.patch +x86-cpu-amd-set-the-cpb-bit-unconditionally-on-f17h.patch +x86-boot-compressed-64-do-not-read-legacy-rom-on-efi-system.patch diff --git a/queue-4.19/x86-boot-compressed-64-do-not-read-legacy-rom-on-efi-system.patch b/queue-4.19/x86-boot-compressed-64-do-not-read-legacy-rom-on-efi-system.patch new file mode 100644 index 00000000000..cfcd355bd6b --- /dev/null +++ b/queue-4.19/x86-boot-compressed-64-do-not-read-legacy-rom-on-efi-system.patch @@ -0,0 +1,76 @@ +From 6f913de3231e1d70a871135b38219da7810df218 Mon Sep 17 00:00:00 2001 +From: "Kirill A. Shutemov" +Date: Tue, 19 Feb 2019 10:52:24 +0300 +Subject: x86/boot/compressed/64: Do not read legacy ROM on EFI system + +From: Kirill A. Shutemov + +commit 6f913de3231e1d70a871135b38219da7810df218 upstream. + +EFI systems do not necessarily provide a legacy ROM. If the ROM is missing +the memory is not mapped at all. + +Trying to dereference values in the legacy ROM area leads to a crash on +Macbook Pro. + +Only look for values in the legacy ROM area for non-EFI system. + +Fixes: 3548e131ec6a ("x86/boot/compressed/64: Find a place for 32-bit trampoline") +Reported-by: Pitam Mitra +Signed-off-by: Kirill A. Shutemov +Signed-off-by: Thomas Gleixner +Tested-by: Bockjoo Kim +Cc: bp@alien8.de +Cc: hpa@zytor.com +Cc: stable@vger.kernel.org +Link: https://lkml.kernel.org/r/20190219075224.35058-1-kirill.shutemov@linux.intel.com +Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=202351 +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/boot/compressed/pgtable_64.c | 19 ++++++++++++++++--- + 1 file changed, 16 insertions(+), 3 deletions(-) + +--- a/arch/x86/boot/compressed/pgtable_64.c ++++ b/arch/x86/boot/compressed/pgtable_64.c +@@ -1,5 +1,7 @@ ++#include + #include + #include ++#include + #include "pgtable.h" + #include "../string.h" + +@@ -37,9 +39,10 @@ int cmdline_find_option_bool(const char + + static unsigned long find_trampoline_placement(void) + { +- unsigned long bios_start, ebda_start; ++ unsigned long bios_start = 0, ebda_start = 0; + unsigned long trampoline_start; + struct boot_e820_entry *entry; ++ char *signature; + int i; + + /* +@@ -47,8 +50,18 @@ static unsigned long find_trampoline_pla + * This code is based on reserve_bios_regions(). + */ + +- ebda_start = *(unsigned short *)0x40e << 4; +- bios_start = *(unsigned short *)0x413 << 10; ++ /* ++ * EFI systems may not provide legacy ROM. The memory may not be mapped ++ * at all. ++ * ++ * Only look for values in the legacy ROM for non-EFI system. ++ */ ++ signature = (char *)&boot_params->efi_info.efi_loader_signature; ++ if (strncmp(signature, EFI32_LOADER_SIGNATURE, 4) && ++ strncmp(signature, EFI64_LOADER_SIGNATURE, 4)) { ++ ebda_start = *(unsigned short *)0x40e << 4; ++ bios_start = *(unsigned short *)0x413 << 10; ++ } + + if (bios_start < BIOS_START_MIN || bios_start > BIOS_START_MAX) + bios_start = BIOS_START_MAX; diff --git a/queue-4.19/x86-cpu-amd-set-the-cpb-bit-unconditionally-on-f17h.patch b/queue-4.19/x86-cpu-amd-set-the-cpb-bit-unconditionally-on-f17h.patch new file mode 100644 index 00000000000..2c394679d22 --- /dev/null +++ b/queue-4.19/x86-cpu-amd-set-the-cpb-bit-unconditionally-on-f17h.patch @@ -0,0 +1,47 @@ +From 0237199186e7a4aa5310741f0a6498a20c820fd7 Mon Sep 17 00:00:00 2001 +From: Jiaxun Yang +Date: Tue, 20 Nov 2018 11:00:18 +0800 +Subject: x86/CPU/AMD: Set the CPB bit unconditionally on F17h + +From: Jiaxun Yang + +commit 0237199186e7a4aa5310741f0a6498a20c820fd7 upstream. + +Some F17h models do not have CPB set in CPUID even though the CPU +supports it. Set the feature bit unconditionally on all F17h. + + [ bp: Rewrite commit message and patch. ] + +Signed-off-by: Jiaxun Yang +Signed-off-by: Borislav Petkov +Acked-by: Tom Lendacky +Cc: "H. Peter Anvin" +Cc: Ingo Molnar +Cc: Sherry Hurwitz +Cc: Suravee Suthikulpanit +Cc: Thomas Gleixner +Cc: x86-ml +Link: https://lkml.kernel.org/r/20181120030018.5185-1-jiaxun.yang@flygoat.com +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/kernel/cpu/amd.c | 8 +++----- + 1 file changed, 3 insertions(+), 5 deletions(-) + +--- a/arch/x86/kernel/cpu/amd.c ++++ b/arch/x86/kernel/cpu/amd.c +@@ -818,11 +818,9 @@ static void init_amd_bd(struct cpuinfo_x + static void init_amd_zn(struct cpuinfo_x86 *c) + { + set_cpu_cap(c, X86_FEATURE_ZEN); +- /* +- * Fix erratum 1076: CPB feature bit not being set in CPUID. It affects +- * all up to and including B1. +- */ +- if (c->x86_model <= 1 && c->x86_stepping <= 1) ++ ++ /* Fix erratum 1076: CPB feature bit not being set in CPUID. */ ++ if (!cpu_has(c, X86_FEATURE_CPB)) + set_cpu_cap(c, X86_FEATURE_CPB); + } +