From: Jisheng Zhang Date: Sat, 20 Jul 2024 17:06:59 +0000 (+0800) Subject: riscv: avoid Imbalance in RAS X-Git-Tag: v6.12-rc1~76^2~13 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=8f1534e7440382d118c3d655d3a6014128b2086d;p=thirdparty%2Fkernel%2Flinux.git riscv: avoid Imbalance in RAS Inspired by[1], modify the code to remove the code of modifying ra to avoid imbalance RAS (return address stack) which may lead to incorret predictions on return. Link: https://lore.kernel.org/linux-riscv/20240607061335.2197383-1-cyrilbur@tenstorrent.com/ [1] Signed-off-by: Jisheng Zhang Reviewed-by: Cyril Bur Link: https://lore.kernel.org/r/20240720170659.1522-1-jszhang@kernel.org Signed-off-by: Palmer Dabbelt --- diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index fc41472d512e9..c200d329d4bdb 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -326,8 +326,8 @@ SYM_CODE_START(ret_from_fork) jalr s0 1: move a0, sp /* pt_regs */ - la ra, ret_from_exception - tail syscall_exit_to_user_mode + call syscall_exit_to_user_mode + j ret_from_exception SYM_CODE_END(ret_from_fork) #ifdef CONFIG_IRQ_STACKS