From: Sasha Levin Date: Mon, 3 Mar 2025 07:38:28 +0000 (-0500) Subject: Fixes for 6.13 X-Git-Tag: v6.6.81~32 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=8f48bcf55cb4f690659c0bd244f0dd5c4983b3f7;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 6.13 Signed-off-by: Sasha Levin --- diff --git a/queue-6.13/phy-rockchip-fix-kconfig-dependency-more.patch b/queue-6.13/phy-rockchip-fix-kconfig-dependency-more.patch new file mode 100644 index 0000000000..ed28a13dec --- /dev/null +++ b/queue-6.13/phy-rockchip-fix-kconfig-dependency-more.patch @@ -0,0 +1,48 @@ +From 5cda833c91c14abe967074a59f796803911d4b9e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 22 Jan 2025 07:52:44 +0100 +Subject: phy: rockchip: fix Kconfig dependency more + +From: Arnd Bergmann + +[ Upstream commit fcf5d353b09b3fc212ab24b89ef23a7a8f7b308e ] + +A previous patch ensured that USB Type C connector support is enabled, +but it is still possible to build the phy driver without enabling +CONFIG_USB (host support) or CONFIG_USB_GADGET (device support), and +in that case the common helper functions are unavailable: + +aarch64-linux-ld: drivers/phy/rockchip/phy-rockchip-usbdp.o: in function `rk_udphy_probe': +phy-rockchip-usbdp.c:(.text+0xe74): undefined reference to `usb_get_maximum_speed' + +Select CONFIG_USB_COMMON directly here, like we do in some other phy +drivers, to make sure this is available even when actual USB support +is disabled or in a loadable module that cannot be reached from a +built-in phy driver. + +Fixes: 9c79b779643e ("phy: rockchip: fix CONFIG_TYPEC dependency") +Signed-off-by: Arnd Bergmann +Reviewed-by: Sebastian Reichel +Reviewed-by: Heiko Stuebner +Link: https://lore.kernel.org/r/20250122065249.1390081-1-arnd@kernel.org +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + drivers/phy/rockchip/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/phy/rockchip/Kconfig b/drivers/phy/rockchip/Kconfig +index 2f7a05f21dc59..dcb8e1628632e 100644 +--- a/drivers/phy/rockchip/Kconfig ++++ b/drivers/phy/rockchip/Kconfig +@@ -125,6 +125,7 @@ config PHY_ROCKCHIP_USBDP + depends on ARCH_ROCKCHIP && OF + depends on TYPEC + select GENERIC_PHY ++ select USB_COMMON + help + Enable this to support the Rockchip USB3.0/DP combo PHY with + Samsung IP block. This is required for USB3 support on RK3588. +-- +2.39.5 + diff --git a/queue-6.13/phy-rockchip-naneng-combphy-compatible-reset-with-ol.patch b/queue-6.13/phy-rockchip-naneng-combphy-compatible-reset-with-ol.patch new file mode 100644 index 0000000000..7b69962c73 --- /dev/null +++ b/queue-6.13/phy-rockchip-naneng-combphy-compatible-reset-with-ol.patch @@ -0,0 +1,42 @@ +From 167d8d2fee3d38e5399a3bc347f779370fb229d7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 6 Jan 2025 18:00:01 +0800 +Subject: phy: rockchip: naneng-combphy: compatible reset with old DT + +From: Chukun Pan + +[ Upstream commit 3126ea9be66b53e607f87f067641ba724be24181 ] + +The device tree of RK3568 did not specify reset-names before. +So add fallback to old behaviour to be compatible with old DT. + +Fixes: fbcbffbac994 ("phy: rockchip: naneng-combphy: fix phy reset") +Cc: Jianfeng Liu +Signed-off-by: Chukun Pan +Reviewed-by: Jonas Karlman +Link: https://lore.kernel.org/r/20250106100001.1344418-2-amadeus@jmu.edu.cn +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +index 2eb3329ca23f6..1ef6d9630f7e0 100644 +--- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c ++++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +@@ -309,7 +309,10 @@ static int rockchip_combphy_parse_dt(struct device *dev, struct rockchip_combphy + + priv->ext_refclk = device_property_present(dev, "rockchip,ext-refclk"); + +- priv->phy_rst = devm_reset_control_get(dev, "phy"); ++ priv->phy_rst = devm_reset_control_get_exclusive(dev, "phy"); ++ /* fallback to old behaviour */ ++ if (PTR_ERR(priv->phy_rst) == -ENOENT) ++ priv->phy_rst = devm_reset_control_array_get_exclusive(dev); + if (IS_ERR(priv->phy_rst)) + return dev_err_probe(dev, PTR_ERR(priv->phy_rst), "failed to get phy reset\n"); + +-- +2.39.5 + diff --git a/queue-6.13/phy-stm32-fix-constant-value-overflow-assertion.patch b/queue-6.13/phy-stm32-fix-constant-value-overflow-assertion.patch new file mode 100644 index 0000000000..401ac942b6 --- /dev/null +++ b/queue-6.13/phy-stm32-fix-constant-value-overflow-assertion.patch @@ -0,0 +1,119 @@ +From 4a4bcc11a7e74de3828ef5a5ea201eed260285ed Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 10 Feb 2025 11:35:15 +0100 +Subject: phy: stm32: Fix constant-value overflow assertion + +From: Christian Bruel + +[ Upstream commit fd75f371f3a1b04a33d2e750363d6ad76abf734e ] + +Rework the workaround as the lookup tables always fits into the bitfield, +and the default values are defined by the hardware and cannot be 0: + +Guard against false positive with a WARN_ON check to make the compiler +happy: The offset range is pre-checked against the sorted imp_lookup_table +values and overflow should not happen and would be caught by a warning and +return in error. + +Also guard against a true positive found during the max_vswing lookup, as a +max vswing value can be 802000 or 803000 microvolt depending on the current +impedance. Therefore set the default impedence index. + +Fixes: 2de679ecd724 ("phy: stm32: work around constant-value overflow assertion") +Signed-off-by: Christian Bruel +Link: https://lore.kernel.org/r/20250210103515.2598377-1-christian.bruel@foss.st.com +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + drivers/phy/st/phy-stm32-combophy.c | 38 ++++++++++++++--------------- + 1 file changed, 18 insertions(+), 20 deletions(-) + +diff --git a/drivers/phy/st/phy-stm32-combophy.c b/drivers/phy/st/phy-stm32-combophy.c +index 49e9fa90a6819..607b4d607eb5e 100644 +--- a/drivers/phy/st/phy-stm32-combophy.c ++++ b/drivers/phy/st/phy-stm32-combophy.c +@@ -111,6 +111,7 @@ static const struct clk_impedance imp_lookup[] = { + { 4204000, { 511000, 609000, 706000, 802000 } }, + { 3999000, { 571000, 648000, 726000, 803000 } } + }; ++#define DEFAULT_IMP_INDEX 3 /* Default impedance is 50 Ohm */ + + static int stm32_impedance_tune(struct stm32_combophy *combophy) + { +@@ -119,10 +120,9 @@ static int stm32_impedance_tune(struct stm32_combophy *combophy) + u8 imp_of, vswing_of; + u32 max_imp = imp_lookup[0].microohm; + u32 min_imp = imp_lookup[imp_size - 1].microohm; +- u32 max_vswing = imp_lookup[imp_size - 1].vswing[vswing_size - 1]; ++ u32 max_vswing; + u32 min_vswing = imp_lookup[0].vswing[0]; + u32 val; +- u32 regval; + + if (!of_property_read_u32(combophy->dev->of_node, "st,output-micro-ohms", &val)) { + if (val < min_imp || val > max_imp) { +@@ -130,45 +130,43 @@ static int stm32_impedance_tune(struct stm32_combophy *combophy) + return -EINVAL; + } + +- regval = 0; +- for (imp_of = 0; imp_of < ARRAY_SIZE(imp_lookup); imp_of++) { +- if (imp_lookup[imp_of].microohm <= val) { +- regval = FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_OHM, imp_of); ++ for (imp_of = 0; imp_of < ARRAY_SIZE(imp_lookup); imp_of++) ++ if (imp_lookup[imp_of].microohm <= val) + break; +- } +- } ++ ++ if (WARN_ON(imp_of == ARRAY_SIZE(imp_lookup))) ++ return -EINVAL; + + dev_dbg(combophy->dev, "Set %u micro-ohms output impedance\n", + imp_lookup[imp_of].microohm); + + regmap_update_bits(combophy->regmap, SYSCFG_PCIEPRGCR, + STM32MP25_PCIEPRG_IMPCTRL_OHM, +- regval); +- } else { +- regmap_read(combophy->regmap, SYSCFG_PCIEPRGCR, &val); +- imp_of = FIELD_GET(STM32MP25_PCIEPRG_IMPCTRL_OHM, val); +- } ++ FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_OHM, imp_of)); ++ } else ++ imp_of = DEFAULT_IMP_INDEX; + + if (!of_property_read_u32(combophy->dev->of_node, "st,output-vswing-microvolt", &val)) { ++ max_vswing = imp_lookup[imp_of].vswing[vswing_size - 1]; ++ + if (val < min_vswing || val > max_vswing) { + dev_err(combophy->dev, "Invalid value %u for output vswing\n", val); + return -EINVAL; + } + +- regval = 0; +- for (vswing_of = 0; vswing_of < ARRAY_SIZE(imp_lookup[imp_of].vswing); vswing_of++) { +- if (imp_lookup[imp_of].vswing[vswing_of] >= val) { +- regval = FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_VSWING, vswing_of); ++ for (vswing_of = 0; vswing_of < ARRAY_SIZE(imp_lookup[imp_of].vswing); vswing_of++) ++ if (imp_lookup[imp_of].vswing[vswing_of] >= val) + break; +- } +- } ++ ++ if (WARN_ON(vswing_of == ARRAY_SIZE(imp_lookup[imp_of].vswing))) ++ return -EINVAL; + + dev_dbg(combophy->dev, "Set %u microvolt swing\n", + imp_lookup[imp_of].vswing[vswing_of]); + + regmap_update_bits(combophy->regmap, SYSCFG_PCIEPRGCR, + STM32MP25_PCIEPRG_IMPCTRL_VSWING, +- regval); ++ FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_VSWING, vswing_of)); + } + + return 0; +-- +2.39.5 + diff --git a/queue-6.13/riscv-kvm-fix-hart-suspend-status-check.patch b/queue-6.13/riscv-kvm-fix-hart-suspend-status-check.patch new file mode 100644 index 0000000000..e1ec6931d9 --- /dev/null +++ b/queue-6.13/riscv-kvm-fix-hart-suspend-status-check.patch @@ -0,0 +1,48 @@ +From fc56015cb7e4e9291530780d92b034db30885623 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Feb 2025 09:45:08 +0100 +Subject: riscv: KVM: Fix hart suspend status check + +From: Andrew Jones + +[ Upstream commit c7db342e3b4744688be1e27e31254c1d31a35274 ] + +"Not stopped" means started or suspended so we need to check for +a single state in order to have a chance to check for each state. +Also, we need to use target_vcpu when checking for the suspend +state. + +Fixes: 763c8bed8c05 ("RISC-V: KVM: Implement SBI HSM suspend call") +Signed-off-by: Andrew Jones +Reviewed-by: Anup Patel +Link: https://lore.kernel.org/r/20250217084506.18763-8-ajones@ventanamicro.com +Signed-off-by: Anup Patel +Signed-off-by: Sasha Levin +--- + arch/riscv/kvm/vcpu_sbi_hsm.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/riscv/kvm/vcpu_sbi_hsm.c b/arch/riscv/kvm/vcpu_sbi_hsm.c +index dce667f4b6ab0..13a35eb77e8e3 100644 +--- a/arch/riscv/kvm/vcpu_sbi_hsm.c ++++ b/arch/riscv/kvm/vcpu_sbi_hsm.c +@@ -79,12 +79,12 @@ static int kvm_sbi_hsm_vcpu_get_status(struct kvm_vcpu *vcpu) + target_vcpu = kvm_get_vcpu_by_id(vcpu->kvm, target_vcpuid); + if (!target_vcpu) + return SBI_ERR_INVALID_PARAM; +- if (!kvm_riscv_vcpu_stopped(target_vcpu)) +- return SBI_HSM_STATE_STARTED; +- else if (vcpu->stat.generic.blocking) ++ if (kvm_riscv_vcpu_stopped(target_vcpu)) ++ return SBI_HSM_STATE_STOPPED; ++ else if (target_vcpu->stat.generic.blocking) + return SBI_HSM_STATE_SUSPENDED; + else +- return SBI_HSM_STATE_STOPPED; ++ return SBI_HSM_STATE_STARTED; + } + + static int kvm_sbi_ext_hsm_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, +-- +2.39.5 + diff --git a/queue-6.13/riscv-kvm-fix-hart-suspend_type-use.patch b/queue-6.13/riscv-kvm-fix-hart-suspend_type-use.patch new file mode 100644 index 0000000000..c2f452ed05 --- /dev/null +++ b/queue-6.13/riscv-kvm-fix-hart-suspend_type-use.patch @@ -0,0 +1,48 @@ +From a01c79eaf3d7e89c33b8cbe7907b136da4f2233d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Feb 2025 09:45:09 +0100 +Subject: riscv: KVM: Fix hart suspend_type use + +From: Andrew Jones + +[ Upstream commit e3219b0c491f2aa0e0b200a39d3352ab05cdda96 ] + +The spec says suspend_type is 32 bits wide and "In case the data is +defined as 32bit wide, higher privilege software must ensure that it +only uses 32 bit data." Mask off upper bits of suspend_type before +using it. + +Fixes: 763c8bed8c05 ("RISC-V: KVM: Implement SBI HSM suspend call") +Signed-off-by: Andrew Jones +Reviewed-by: Anup Patel +Link: https://lore.kernel.org/r/20250217084506.18763-9-ajones@ventanamicro.com +Signed-off-by: Anup Patel +Signed-off-by: Sasha Levin +--- + arch/riscv/kvm/vcpu_sbi_hsm.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/arch/riscv/kvm/vcpu_sbi_hsm.c b/arch/riscv/kvm/vcpu_sbi_hsm.c +index 13a35eb77e8e3..3070bb31745de 100644 +--- a/arch/riscv/kvm/vcpu_sbi_hsm.c ++++ b/arch/riscv/kvm/vcpu_sbi_hsm.c +@@ -9,6 +9,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -109,7 +110,7 @@ static int kvm_sbi_ext_hsm_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, + } + return 0; + case SBI_EXT_HSM_HART_SUSPEND: +- switch (cp->a0) { ++ switch (lower_32_bits(cp->a0)) { + case SBI_HSM_SUSPEND_RET_DEFAULT: + kvm_riscv_vcpu_wfi(vcpu); + break; +-- +2.39.5 + diff --git a/queue-6.13/riscv-kvm-fix-sbi-ipi-error-generation.patch b/queue-6.13/riscv-kvm-fix-sbi-ipi-error-generation.patch new file mode 100644 index 0000000000..4b1b84efa4 --- /dev/null +++ b/queue-6.13/riscv-kvm-fix-sbi-ipi-error-generation.patch @@ -0,0 +1,72 @@ +From 42037d1456dc1bcce60b6080c573bcad8687c39d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Feb 2025 09:45:10 +0100 +Subject: riscv: KVM: Fix SBI IPI error generation + +From: Andrew Jones + +[ Upstream commit 0611f78f83c93c000029ab01daa28166d03590ed ] + +When an invalid function ID of an SBI extension is used we should +return not-supported, not invalid-param. Also, when we see that at +least one hartid constructed from the base and mask parameters is +invalid, then we should return invalid-param. Finally, rather than +relying on overflowing a left shift to result in zero and then using +that zero in a condition which [correctly] skips sending an IPI (but +loops unnecessarily), explicitly check for overflow and exit the loop +immediately. + +Fixes: 5f862df5585c ("RISC-V: KVM: Add v0.1 replacement SBI extensions defined in v0.2") +Signed-off-by: Andrew Jones +Reviewed-by: Anup Patel +Link: https://lore.kernel.org/r/20250217084506.18763-10-ajones@ventanamicro.com +Signed-off-by: Anup Patel +Signed-off-by: Sasha Levin +--- + arch/riscv/kvm/vcpu_sbi_replace.c | 13 +++++++++++-- + 1 file changed, 11 insertions(+), 2 deletions(-) + +diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c b/arch/riscv/kvm/vcpu_sbi_replace.c +index 9c2ab3dfa93aa..74e3a38c6a29e 100644 +--- a/arch/riscv/kvm/vcpu_sbi_replace.c ++++ b/arch/riscv/kvm/vcpu_sbi_replace.c +@@ -51,9 +51,10 @@ static int kvm_sbi_ext_ipi_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, + struct kvm_cpu_context *cp = &vcpu->arch.guest_context; + unsigned long hmask = cp->a0; + unsigned long hbase = cp->a1; ++ unsigned long hart_bit = 0, sentmask = 0; + + if (cp->a6 != SBI_EXT_IPI_SEND_IPI) { +- retdata->err_val = SBI_ERR_INVALID_PARAM; ++ retdata->err_val = SBI_ERR_NOT_SUPPORTED; + return 0; + } + +@@ -62,15 +63,23 @@ static int kvm_sbi_ext_ipi_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, + if (hbase != -1UL) { + if (tmp->vcpu_id < hbase) + continue; +- if (!(hmask & (1UL << (tmp->vcpu_id - hbase)))) ++ hart_bit = tmp->vcpu_id - hbase; ++ if (hart_bit >= __riscv_xlen) ++ goto done; ++ if (!(hmask & (1UL << hart_bit))) + continue; + } + ret = kvm_riscv_vcpu_set_interrupt(tmp, IRQ_VS_SOFT); + if (ret < 0) + break; ++ sentmask |= 1UL << hart_bit; + kvm_riscv_vcpu_pmu_incr_fw(tmp, SBI_PMU_FW_IPI_RCVD); + } + ++done: ++ if (hbase != -1UL && (hmask ^ sentmask)) ++ retdata->err_val = SBI_ERR_INVALID_PARAM; ++ + return ret; + } + +-- +2.39.5 + diff --git a/queue-6.13/riscv-kvm-fix-sbi-time-error-generation.patch b/queue-6.13/riscv-kvm-fix-sbi-time-error-generation.patch new file mode 100644 index 0000000000..4ab3d61c5e --- /dev/null +++ b/queue-6.13/riscv-kvm-fix-sbi-time-error-generation.patch @@ -0,0 +1,38 @@ +From 7af10e066c00ba8ad70077dbfed8a8cf290b6ccd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Feb 2025 09:45:11 +0100 +Subject: riscv: KVM: Fix SBI TIME error generation + +From: Andrew Jones + +[ Upstream commit b901484852992cf3d162a5eab72251cc813ca624 ] + +When an invalid function ID of an SBI extension is used we should +return not-supported, not invalid-param. + +Fixes: 5f862df5585c ("RISC-V: KVM: Add v0.1 replacement SBI extensions defined in v0.2") +Signed-off-by: Andrew Jones +Reviewed-by: Anup Patel +Link: https://lore.kernel.org/r/20250217084506.18763-11-ajones@ventanamicro.com +Signed-off-by: Anup Patel +Signed-off-by: Sasha Levin +--- + arch/riscv/kvm/vcpu_sbi_replace.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c b/arch/riscv/kvm/vcpu_sbi_replace.c +index 74e3a38c6a29e..5fbf3f94f1e85 100644 +--- a/arch/riscv/kvm/vcpu_sbi_replace.c ++++ b/arch/riscv/kvm/vcpu_sbi_replace.c +@@ -21,7 +21,7 @@ static int kvm_sbi_ext_time_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, + u64 next_cycle; + + if (cp->a6 != SBI_EXT_TIME_SET_TIMER) { +- retdata->err_val = SBI_ERR_INVALID_PARAM; ++ retdata->err_val = SBI_ERR_NOT_SUPPORTED; + return 0; + } + +-- +2.39.5 + diff --git a/queue-6.13/series b/queue-6.13/series index d9dbda61cb..01bc39a6d8 100644 --- a/queue-6.13/series +++ b/queue-6.13/series @@ -71,3 +71,10 @@ objtool-remove-annotate_-un-reachable.patch objtool-fix-c-jump-table-annotations-for-clang.patch x86-cpu-fix-warm-boot-hang-regression-on-amd-sc1100-.patch uprobes-remove-too-strict-lockdep_assert-condition-i.patch +phy-rockchip-fix-kconfig-dependency-more.patch +phy-rockchip-naneng-combphy-compatible-reset-with-ol.patch +phy-stm32-fix-constant-value-overflow-assertion.patch +riscv-kvm-fix-hart-suspend-status-check.patch +riscv-kvm-fix-hart-suspend_type-use.patch +riscv-kvm-fix-sbi-ipi-error-generation.patch +riscv-kvm-fix-sbi-time-error-generation.patch