From: Greg Kroah-Hartman Date: Fri, 13 Apr 2012 18:33:07 +0000 (-0700) Subject: 3.2-stable patches X-Git-Tag: v3.2.16~54 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=911dfb3ac35e8462e4c75cd64a5f8b9d1dd01bda;p=thirdparty%2Fkernel%2Fstable-queue.git 3.2-stable patches added patches: drm-i915-make-rc6-module-parameter-read-only.patch drm-i915-properly-compute-dp-dithering-for-user-created-modes.patch drm-i915-ringbuffer-exclude-last-2-cachlines-of-ring-on-845g.patch drm-radeon-kms-fix-dvo-setup-on-some-r4xx-chips.patch drm-radeon-only-add-the-mm-i2c-bus-if-the-hw_i2c-module-param-is-set.patch --- diff --git a/queue-3.2/drm-i915-make-rc6-module-parameter-read-only.patch b/queue-3.2/drm-i915-make-rc6-module-parameter-read-only.patch new file mode 100644 index 00000000000..495d7af4d15 --- /dev/null +++ b/queue-3.2/drm-i915-make-rc6-module-parameter-read-only.patch @@ -0,0 +1,30 @@ +From f57f9c167af7cb3fd315e6a8ebe194a8aea0832a Mon Sep 17 00:00:00 2001 +From: Jesse Barnes +Date: Wed, 11 Apr 2012 09:39:02 -0700 +Subject: drm/i915: make rc6 module parameter read-only + +From: Jesse Barnes + +commit f57f9c167af7cb3fd315e6a8ebe194a8aea0832a upstream. + +People have been getting confused and thinking this is a runtime control. + +Signed-off-by: Jesse Barnes +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_drv.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/i915/i915_drv.c ++++ b/drivers/gpu/drm/i915/i915_drv.c +@@ -64,7 +64,7 @@ MODULE_PARM_DESC(semaphores, + "Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))"); + + int i915_enable_rc6 __read_mostly = -1; +-module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600); ++module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0400); + MODULE_PARM_DESC(i915_enable_rc6, + "Enable power-saving render C-state 6 (default: -1 (use per-chip default)"); + diff --git a/queue-3.2/drm-i915-properly-compute-dp-dithering-for-user-created-modes.patch b/queue-3.2/drm-i915-properly-compute-dp-dithering-for-user-created-modes.patch new file mode 100644 index 00000000000..c5cd9c65b0a --- /dev/null +++ b/queue-3.2/drm-i915-properly-compute-dp-dithering-for-user-created-modes.patch @@ -0,0 +1,127 @@ +From c4867936474183332db4c19791a65fdad6474fd5 Mon Sep 17 00:00:00 2001 +From: Daniel Vetter +Date: Tue, 10 Apr 2012 10:42:36 +0200 +Subject: drm/i915: properly compute dp dithering for user-created modes + +From: Daniel Vetter + +commit c4867936474183332db4c19791a65fdad6474fd5 upstream. + +We've only computed whether we need to fall back to 6bpc due to dp +link bandwidth constrains in mode_valid, but not mode_fixup. Under +various circumstances X likes to create new modes which then lack +proper 6bpc flags (if required), resulting in mode_fixup failures and +ultimately black screens. + +Chris Wilson pointed out that we still get things wrong for bpp > 24, +but that should be fixed in another patch (and it'll be easier because +this patch consolidates the logic). + +The likely culprit for this regression is + +commit 3d794f87238f74d80e78a7611c7fbde8a54c85c2 +Author: Keith Packard +Date: Wed Jan 25 08:16:25 2012 -0800 + + drm/i915: Force explicit bpp selection for intel_dp_link_required + +v2: Fix indentation and tune down the too bold claim that this should +fix the world. Both noticed by Chris Wilson. + +v3: Try to really git add things. + +Reported-and-tested-by: Brice Goglin +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48170 +Cc: stable@kernel.org +Reviewed-by: Adam Jackson +Signed-Off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_dp.c | 49 ++++++++++++++++++++++++++++------------ + 1 file changed, 35 insertions(+), 14 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_dp.c ++++ b/drivers/gpu/drm/i915/intel_dp.c +@@ -219,14 +219,38 @@ intel_dp_max_data_rate(int max_link_cloc + return (max_link_clock * max_lanes * 8) / 10; + } + ++static bool ++intel_dp_adjust_dithering(struct intel_dp *intel_dp, ++ struct drm_display_mode *mode, ++ struct drm_display_mode *adjusted_mode) ++{ ++ int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_dp)); ++ int max_lanes = intel_dp_max_lane_count(intel_dp); ++ int max_rate, mode_rate; ++ ++ mode_rate = intel_dp_link_required(mode->clock, 24); ++ max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); ++ ++ if (mode_rate > max_rate) { ++ mode_rate = intel_dp_link_required(mode->clock, 18); ++ if (mode_rate > max_rate) ++ return false; ++ ++ if (adjusted_mode) ++ adjusted_mode->private_flags ++ |= INTEL_MODE_DP_FORCE_6BPC; ++ ++ return true; ++ } ++ ++ return true; ++} ++ + static int + intel_dp_mode_valid(struct drm_connector *connector, + struct drm_display_mode *mode) + { + struct intel_dp *intel_dp = intel_attached_dp(connector); +- int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_dp)); +- int max_lanes = intel_dp_max_lane_count(intel_dp); +- int max_rate, mode_rate; + + if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { + if (mode->hdisplay > intel_dp->panel_fixed_mode->hdisplay) +@@ -236,16 +260,8 @@ intel_dp_mode_valid(struct drm_connector + return MODE_PANEL; + } + +- mode_rate = intel_dp_link_required(mode->clock, 24); +- max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); +- +- if (mode_rate > max_rate) { +- mode_rate = intel_dp_link_required(mode->clock, 18); +- if (mode_rate > max_rate) +- return MODE_CLOCK_HIGH; +- else +- mode->private_flags |= INTEL_MODE_DP_FORCE_6BPC; +- } ++ if (!intel_dp_adjust_dithering(intel_dp, mode, NULL)) ++ return MODE_CLOCK_HIGH; + + if (mode->clock < 10000) + return MODE_CLOCK_LOW; +@@ -673,7 +689,7 @@ intel_dp_mode_fixup(struct drm_encoder * + int lane_count, clock; + int max_lane_count = intel_dp_max_lane_count(intel_dp); + int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0; +- int bpp = mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24; ++ int bpp; + static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; + + if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { +@@ -687,6 +703,11 @@ intel_dp_mode_fixup(struct drm_encoder * + mode->clock = intel_dp->panel_fixed_mode->clock; + } + ++ if (!intel_dp_adjust_dithering(intel_dp, mode, adjusted_mode)) ++ return false; ++ ++ bpp = adjusted_mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24; ++ + for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { + for (clock = 0; clock <= max_clock; clock++) { + int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); diff --git a/queue-3.2/drm-i915-ringbuffer-exclude-last-2-cachlines-of-ring-on-845g.patch b/queue-3.2/drm-i915-ringbuffer-exclude-last-2-cachlines-of-ring-on-845g.patch new file mode 100644 index 00000000000..d3f9b98bc21 --- /dev/null +++ b/queue-3.2/drm-i915-ringbuffer-exclude-last-2-cachlines-of-ring-on-845g.patch @@ -0,0 +1,31 @@ +From 27c1cbd06a7620b354cbb363834f3bb8df4f410d Mon Sep 17 00:00:00 2001 +From: Chris Wilson +Date: Mon, 9 Apr 2012 13:59:46 +0100 +Subject: drm/i915/ringbuffer: Exclude last 2 cachlines of ring on 845g + +From: Chris Wilson + +commit 27c1cbd06a7620b354cbb363834f3bb8df4f410d upstream. + +The 845g shares the errata with i830 whereby executing a command +within 2 cachelines of the end of the ringbuffer may cause a GPU hang. + +Signed-off-by: Chris Wilson +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/i915/intel_ringbuffer.c ++++ b/drivers/gpu/drm/i915/intel_ringbuffer.c +@@ -1052,7 +1052,7 @@ int intel_init_ring_buffer(struct drm_de + * of the buffer. + */ + ring->effective_size = ring->size; +- if (IS_I830(ring->dev)) ++ if (IS_I830(ring->dev) || IS_845G(ring->dev)) + ring->effective_size -= 128; + + return 0; diff --git a/queue-3.2/drm-radeon-kms-fix-dvo-setup-on-some-r4xx-chips.patch b/queue-3.2/drm-radeon-kms-fix-dvo-setup-on-some-r4xx-chips.patch new file mode 100644 index 00000000000..36379fb1c09 --- /dev/null +++ b/queue-3.2/drm-radeon-kms-fix-dvo-setup-on-some-r4xx-chips.patch @@ -0,0 +1,37 @@ +From afceb9319f21b18ee3bc15ee9a5f92e18ef8a8c9 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Tue, 3 Apr 2012 17:05:41 -0400 +Subject: drm/radeon/kms: fix DVO setup on some r4xx chips + +From: Alex Deucher + +commit afceb9319f21b18ee3bc15ee9a5f92e18ef8a8c9 upstream. + +Some r4xx chips have the wrong frev in the +DVOEncoderControl table. It should always be 1 +on r4xx. Fixes modesetting on DVO on r4xx chips +with the bad frev. + +Reported by twied on #radeon. + +Signed-off-by: Alex Deucher +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/atombios_encoders.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/gpu/drm/radeon/atombios_encoders.c ++++ b/drivers/gpu/drm/radeon/atombios_encoders.c +@@ -246,6 +246,10 @@ atombios_dvo_setup(struct drm_encoder *e + if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) + return; + ++ /* some R4xx chips have the wrong frev */ ++ if (rdev->family <= CHIP_RV410) ++ frev = 1; ++ + switch (frev) { + case 1: + switch (crev) { diff --git a/queue-3.2/drm-radeon-only-add-the-mm-i2c-bus-if-the-hw_i2c-module-param-is-set.patch b/queue-3.2/drm-radeon-only-add-the-mm-i2c-bus-if-the-hw_i2c-module-param-is-set.patch new file mode 100644 index 00000000000..2274e0dcc3e --- /dev/null +++ b/queue-3.2/drm-radeon-only-add-the-mm-i2c-bus-if-the-hw_i2c-module-param-is-set.patch @@ -0,0 +1,38 @@ +From 46783150a6552f9513f08e62cfcc07125d6e502b Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Tue, 10 Apr 2012 12:14:27 -0400 +Subject: drm/radeon: only add the mm i2c bus if the hw_i2c module param is set + +From: Alex Deucher + +commit 46783150a6552f9513f08e62cfcc07125d6e502b upstream. + +It seems it can corrupt the monitor EDID in certain cases on certain +boards when running sensors detect. It's rarely used anyway outside +of AIW boards. + +http://lists.lm-sensors.org/pipermail/lm-sensors/2012-April/035847.html +http://lists.freedesktop.org/archives/xorg/2011-January/052239.html + +Signed-off-by: Alex Deucher +Acked-by: Jean Delvare +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_i2c.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/gpu/drm/radeon/radeon_i2c.c ++++ b/drivers/gpu/drm/radeon/radeon_i2c.c +@@ -890,6 +890,10 @@ struct radeon_i2c_chan *radeon_i2c_creat + struct radeon_i2c_chan *i2c; + int ret; + ++ /* don't add the mm_i2c bus unless hw_i2c is enabled */ ++ if (rec->mm_i2c && (radeon_hw_i2c == 0)) ++ return NULL; ++ + i2c = kzalloc(sizeof(struct radeon_i2c_chan), GFP_KERNEL); + if (i2c == NULL) + return NULL; diff --git a/queue-3.2/series b/queue-3.2/series index 2a778530527..9a7862d4623 100644 --- a/queue-3.2/series +++ b/queue-3.2/series @@ -1 +1,6 @@ drm-i915-mask-transcoder-select-bits-before-setting-them-on-lvds.patch +drm-radeon-kms-fix-dvo-setup-on-some-r4xx-chips.patch +drm-i915-ringbuffer-exclude-last-2-cachlines-of-ring-on-845g.patch +drm-radeon-only-add-the-mm-i2c-bus-if-the-hw_i2c-module-param-is-set.patch +drm-i915-properly-compute-dp-dithering-for-user-created-modes.patch +drm-i915-make-rc6-module-parameter-read-only.patch