From: Greg Kroah-Hartman Date: Tue, 17 Apr 2018 12:41:50 +0000 (+0200) Subject: remove PATCH from 4.9 patches... X-Git-Tag: v4.16.3~19 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9141df69445c06b84550836e6e71328512cfed39;p=thirdparty%2Fkernel%2Fstable-queue.git remove PATCH from 4.9 patches... --- diff --git a/queue-4.9/arm-arm64-kvm-add-psci_version-helper.patch b/queue-4.9/arm-arm64-kvm-add-psci_version-helper.patch index 895a397c601..08f0a202768 100644 --- a/queue-4.9/arm-arm64-kvm-add-psci_version-helper.patch +++ b/queue-4.9/arm-arm64-kvm-add-psci_version-helper.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:25 +0100 -Subject: [PATCH v4.9.y 29/42] arm/arm64: KVM: Add PSCI_VERSION helper +Subject: arm/arm64: KVM: Add PSCI_VERSION helper To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-30-mark.rutland@arm.com> diff --git a/queue-4.9/arm-arm64-kvm-add-smccc-accessors-to-psci-code.patch b/queue-4.9/arm-arm64-kvm-add-smccc-accessors-to-psci-code.patch index 4007079c903..22ba22864dc 100644 --- a/queue-4.9/arm-arm64-kvm-add-smccc-accessors-to-psci-code.patch +++ b/queue-4.9/arm-arm64-kvm-add-smccc-accessors-to-psci-code.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:26 +0100 -Subject: [PATCH v4.9.y 30/42] arm/arm64: KVM: Add smccc accessors to PSCI code +Subject: arm/arm64: KVM: Add smccc accessors to PSCI code To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-31-mark.rutland@arm.com> diff --git a/queue-4.9/arm-arm64-kvm-advertise-smccc-v1.1.patch b/queue-4.9/arm-arm64-kvm-advertise-smccc-v1.1.patch index dc9385faea3..ff1648698b2 100644 --- a/queue-4.9/arm-arm64-kvm-advertise-smccc-v1.1.patch +++ b/queue-4.9/arm-arm64-kvm-advertise-smccc-v1.1.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:28 +0100 -Subject: [PATCH v4.9.y 32/42] arm/arm64: KVM: Advertise SMCCC v1.1 +Subject: arm/arm64: KVM: Advertise SMCCC v1.1 To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-33-mark.rutland@arm.com> diff --git a/queue-4.9/arm-arm64-kvm-consolidate-the-psci-include-files.patch b/queue-4.9/arm-arm64-kvm-consolidate-the-psci-include-files.patch index 854ddd9b969..869762a1c6a 100644 --- a/queue-4.9/arm-arm64-kvm-consolidate-the-psci-include-files.patch +++ b/queue-4.9/arm-arm64-kvm-consolidate-the-psci-include-files.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:24 +0100 -Subject: [PATCH v4.9.y 28/42] arm/arm64: KVM: Consolidate the PSCI include files +Subject: arm/arm64: KVM: Consolidate the PSCI include files To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-29-mark.rutland@arm.com> diff --git a/queue-4.9/arm-arm64-kvm-implement-psci-1.0-support.patch b/queue-4.9/arm-arm64-kvm-implement-psci-1.0-support.patch index 9fb95b25dd4..fae3b9f139b 100644 --- a/queue-4.9/arm-arm64-kvm-implement-psci-1.0-support.patch +++ b/queue-4.9/arm-arm64-kvm-implement-psci-1.0-support.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:27 +0100 -Subject: [PATCH v4.9.y 31/42] arm/arm64: KVM: Implement PSCI 1.0 support +Subject: arm/arm64: KVM: Implement PSCI 1.0 support To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-32-mark.rutland@arm.com> diff --git a/queue-4.9/arm-arm64-kvm-turn-kvm_psci_version-into-a-static-inline.patch b/queue-4.9/arm-arm64-kvm-turn-kvm_psci_version-into-a-static-inline.patch index 4dbf58fd524..c4934f80813 100644 --- a/queue-4.9/arm-arm64-kvm-turn-kvm_psci_version-into-a-static-inline.patch +++ b/queue-4.9/arm-arm64-kvm-turn-kvm_psci_version-into-a-static-inline.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:30 +0100 -Subject: [PATCH v4.9.y 34/42] arm/arm64: KVM: Turn kvm_psci_version into a static inline +Subject: arm/arm64: KVM: Turn kvm_psci_version into a static inline To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-35-mark.rutland@arm.com> diff --git a/queue-4.9/arm-arm64-smccc-implement-smccc-v1.1-inline-primitive.patch b/queue-4.9/arm-arm64-smccc-implement-smccc-v1.1-inline-primitive.patch index e63bc8cdc2d..1242808b04c 100644 --- a/queue-4.9/arm-arm64-smccc-implement-smccc-v1.1-inline-primitive.patch +++ b/queue-4.9/arm-arm64-smccc-implement-smccc-v1.1-inline-primitive.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:36 +0100 -Subject: [PATCH v4.9.y 40/42] arm/arm64: smccc: Implement SMCCC v1.1 inline primitive +Subject: arm/arm64: smccc: Implement SMCCC v1.1 inline primitive To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-41-mark.rutland@arm.com> diff --git a/queue-4.9/arm-arm64-smccc-make-function-identifiers-an-unsigned-quantity.patch b/queue-4.9/arm-arm64-smccc-make-function-identifiers-an-unsigned-quantity.patch index c928b032c9c..9407612a1a6 100644 --- a/queue-4.9/arm-arm64-smccc-make-function-identifiers-an-unsigned-quantity.patch +++ b/queue-4.9/arm-arm64-smccc-make-function-identifiers-an-unsigned-quantity.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:35 +0100 -Subject: [PATCH v4.9.y 39/42] arm/arm64: smccc: Make function identifiers an unsigned quantity +Subject: arm/arm64: smccc: Make function identifiers an unsigned quantity To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-40-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-add-arm_smccc_arch_workaround_1-bp-hardening-support.patch b/queue-4.9/arm64-add-arm_smccc_arch_workaround_1-bp-hardening-support.patch index dc973daa53b..71440ea82b8 100644 --- a/queue-4.9/arm64-add-arm_smccc_arch_workaround_1-bp-hardening-support.patch +++ b/queue-4.9/arm64-add-arm_smccc_arch_workaround_1-bp-hardening-support.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:37 +0100 -Subject: [PATCH v4.9.y 41/42] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support +Subject: arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-42-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-add-skeleton-to-harden-the-branch-predictor-against-aliasing-attacks.patch b/queue-4.9/arm64-add-skeleton-to-harden-the-branch-predictor-against-aliasing-attacks.patch index f090d34734b..eb41e900086 100644 --- a/queue-4.9/arm64-add-skeleton-to-harden-the-branch-predictor-against-aliasing-attacks.patch +++ b/queue-4.9/arm64-add-skeleton-to-harden-the-branch-predictor-against-aliasing-attacks.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:13 +0100 -Subject: [PATCH v4.9.y 17/42] arm64: Add skeleton to harden the branch predictor against aliasing attacks +Subject: arm64: Add skeleton to harden the branch predictor against aliasing attacks To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-18-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-barrier-add-csdb-macros-to-control-data-value-prediction.patch b/queue-4.9/arm64-barrier-add-csdb-macros-to-control-data-value-prediction.patch index 3ffc0a23c03..56cf719b186 100644 --- a/queue-4.9/arm64-barrier-add-csdb-macros-to-control-data-value-prediction.patch +++ b/queue-4.9/arm64-barrier-add-csdb-macros-to-control-data-value-prediction.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:10:57 +0100 -Subject: [PATCH v4.9.y 01/42] arm64: barrier: Add CSDB macros to control data-value prediction +Subject: arm64: barrier: Add CSDB macros to control data-value prediction To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-2-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-branch-predictor-hardening-for-cavium-thunderx2.patch b/queue-4.9/arm64-branch-predictor-hardening-for-cavium-thunderx2.patch index 2d0d590ac36..3f518116dd9 100644 --- a/queue-4.9/arm64-branch-predictor-hardening-for-cavium-thunderx2.patch +++ b/queue-4.9/arm64-branch-predictor-hardening-for-cavium-thunderx2.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:22 +0100 -Subject: [PATCH v4.9.y 26/42] arm64: Branch predictor hardening for Cavium ThunderX2 +Subject: arm64: Branch predictor hardening for Cavium ThunderX2 To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-27-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-cpu_errata-allow-an-erratum-to-be-match-for-all-revisions-of-a-core.patch b/queue-4.9/arm64-cpu_errata-allow-an-erratum-to-be-match-for-all-revisions-of-a-core.patch index cb77822a0b1..3d99c988f4f 100644 --- a/queue-4.9/arm64-cpu_errata-allow-an-erratum-to-be-match-for-all-revisions-of-a-core.patch +++ b/queue-4.9/arm64-cpu_errata-allow-an-erratum-to-be-match-for-all-revisions-of-a-core.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:20 +0100 -Subject: [PATCH v4.9.y 24/42] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core +Subject: arm64: cpu_errata: Allow an erratum to be match for all revisions of a core To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-25-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-cpufeature-__this_cpu_has_cap-shouldn-t-stop-early.patch b/queue-4.9/arm64-cpufeature-__this_cpu_has_cap-shouldn-t-stop-early.patch index 62414fa6525..47764404ece 100644 --- a/queue-4.9/arm64-cpufeature-__this_cpu_has_cap-shouldn-t-stop-early.patch +++ b/queue-4.9/arm64-cpufeature-__this_cpu_has_cap-shouldn-t-stop-early.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:07 +0100 -Subject: [PATCH v4.9.y 11/42] arm64: cpufeature: __this_cpu_has_cap() shouldn't stop early +Subject: arm64: cpufeature: __this_cpu_has_cap() shouldn't stop early To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-12-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-cpufeature-pass-capability-structure-to-enable-callback.patch b/queue-4.9/arm64-cpufeature-pass-capability-structure-to-enable-callback.patch index 9f370e96147..25933048c83 100644 --- a/queue-4.9/arm64-cpufeature-pass-capability-structure-to-enable-callback.patch +++ b/queue-4.9/arm64-cpufeature-pass-capability-structure-to-enable-callback.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:09 +0100 -Subject: [PATCH v4.9.y 13/42] arm64: cpufeature: Pass capability structure to ->enable callback +Subject: arm64: cpufeature: Pass capability structure to ->enable callback To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-14-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-cputype-add-missing-midr-values-for-cortex-a72-and-cortex-a75.patch b/queue-4.9/arm64-cputype-add-missing-midr-values-for-cortex-a72-and-cortex-a75.patch index 5550d96ce35..a343a753d9c 100644 --- a/queue-4.9/arm64-cputype-add-missing-midr-values-for-cortex-a72-and-cortex-a75.patch +++ b/queue-4.9/arm64-cputype-add-missing-midr-values-for-cortex-a72-and-cortex-a75.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:19 +0100 -Subject: [PATCH v4.9.y 23/42] arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75 +Subject: arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75 To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-24-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-entry-apply-bp-hardening-for-high-priority-synchronous-exceptions.patch b/queue-4.9/arm64-entry-apply-bp-hardening-for-high-priority-synchronous-exceptions.patch index 0d0d91d5c6b..90dc38999fd 100644 --- a/queue-4.9/arm64-entry-apply-bp-hardening-for-high-priority-synchronous-exceptions.patch +++ b/queue-4.9/arm64-entry-apply-bp-hardening-for-high-priority-synchronous-exceptions.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:17 +0100 -Subject: [PATCH v4.9.y 21/42] arm64: entry: Apply BP hardening for high-priority synchronous exceptions +Subject: arm64: entry: Apply BP hardening for high-priority synchronous exceptions To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-22-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-entry-apply-bp-hardening-for-suspicious-interrupts-from-el0.patch b/queue-4.9/arm64-entry-apply-bp-hardening-for-suspicious-interrupts-from-el0.patch index 4e6b65fa1fd..618cedf95eb 100644 --- a/queue-4.9/arm64-entry-apply-bp-hardening-for-suspicious-interrupts-from-el0.patch +++ b/queue-4.9/arm64-entry-apply-bp-hardening-for-suspicious-interrupts-from-el0.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:18 +0100 -Subject: [PATCH v4.9.y 22/42] arm64: entry: Apply BP hardening for suspicious interrupts from EL0 +Subject: arm64: entry: Apply BP hardening for suspicious interrupts from EL0 To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-23-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-entry-ensure-branch-through-syscall-table-is-bounded-under-speculation.patch b/queue-4.9/arm64-entry-ensure-branch-through-syscall-table-is-bounded-under-speculation.patch index 6a46f75f028..66d3bb8f6c5 100644 --- a/queue-4.9/arm64-entry-ensure-branch-through-syscall-table-is-bounded-under-speculation.patch +++ b/queue-4.9/arm64-entry-ensure-branch-through-syscall-table-is-bounded-under-speculation.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:02 +0100 -Subject: [PATCH v4.9.y 06/42] arm64: entry: Ensure branch through syscall table is bounded under speculation +Subject: arm64: entry: Ensure branch through syscall table is bounded under speculation To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-7-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-factor-out-ttbr0_el1-post-update-workaround-into-a-specific-asm-macro.patch b/queue-4.9/arm64-factor-out-ttbr0_el1-post-update-workaround-into-a-specific-asm-macro.patch index 2b35473fe02..b934449db31 100644 --- a/queue-4.9/arm64-factor-out-ttbr0_el1-post-update-workaround-into-a-specific-asm-macro.patch +++ b/queue-4.9/arm64-factor-out-ttbr0_el1-post-update-workaround-into-a-specific-asm-macro.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:11 +0100 -Subject: [PATCH v4.9.y 15/42] arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro +Subject: arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-16-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-implement-array_index_mask_nospec.patch b/queue-4.9/arm64-implement-array_index_mask_nospec.patch index c594224c973..6ba0145d6dd 100644 --- a/queue-4.9/arm64-implement-array_index_mask_nospec.patch +++ b/queue-4.9/arm64-implement-array_index_mask_nospec.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:10:58 +0100 -Subject: [PATCH v4.9.y 02/42] arm64: Implement array_index_mask_nospec() +Subject: arm64: Implement array_index_mask_nospec() To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-3-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-implement-branch-predictor-hardening-for-affected-cortex-a-cpus.patch b/queue-4.9/arm64-implement-branch-predictor-hardening-for-affected-cortex-a-cpus.patch index a9a4a527df7..f791d2bd0e8 100644 --- a/queue-4.9/arm64-implement-branch-predictor-hardening-for-affected-cortex-a-cpus.patch +++ b/queue-4.9/arm64-implement-branch-predictor-hardening-for-affected-cortex-a-cpus.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:21 +0100 -Subject: [PATCH v4.9.y 25/42] arm64: Implement branch predictor hardening for affected Cortex-A CPUs +Subject: arm64: Implement branch predictor hardening for affected Cortex-A CPUs To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-26-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-kill-psci_get_version-as-a-variant-2-workaround.patch b/queue-4.9/arm64-kill-psci_get_version-as-a-variant-2-workaround.patch index 40124d86f38..0711d57e04b 100644 --- a/queue-4.9/arm64-kill-psci_get_version-as-a-variant-2-workaround.patch +++ b/queue-4.9/arm64-kill-psci_get_version-as-a-variant-2-workaround.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:38 +0100 -Subject: [PATCH v4.9.y 42/42] arm64: Kill PSCI_GET_VERSION as a variant-2 workaround +Subject: arm64: Kill PSCI_GET_VERSION as a variant-2 workaround To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-43-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-kvm-add-smccc_arch_workaround_1-fast-handling.patch b/queue-4.9/arm64-kvm-add-smccc_arch_workaround_1-fast-handling.patch index 064f7361d1b..39d70680ec8 100644 --- a/queue-4.9/arm64-kvm-add-smccc_arch_workaround_1-fast-handling.patch +++ b/queue-4.9/arm64-kvm-add-smccc_arch_workaround_1-fast-handling.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:32 +0100 -Subject: [PATCH v4.9.y 36/42] arm64: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling +Subject: arm64: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-37-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-kvm-increment-pc-after-handling-an-smc-trap.patch b/queue-4.9/arm64-kvm-increment-pc-after-handling-an-smc-trap.patch index c3149c60d0c..2fe6b1bf9ca 100644 --- a/queue-4.9/arm64-kvm-increment-pc-after-handling-an-smc-trap.patch +++ b/queue-4.9/arm64-kvm-increment-pc-after-handling-an-smc-trap.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:23 +0100 -Subject: [PATCH v4.9.y 27/42] arm64: KVM: Increment PC after handling an SMC trap +Subject: arm64: KVM: Increment PC after handling an SMC trap To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-28-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-kvm-make-psci_version-a-fast-path.patch b/queue-4.9/arm64-kvm-make-psci_version-a-fast-path.patch index 46bd64a4ef8..f135f79d1fc 100644 --- a/queue-4.9/arm64-kvm-make-psci_version-a-fast-path.patch +++ b/queue-4.9/arm64-kvm-make-psci_version-a-fast-path.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:29 +0100 -Subject: [PATCH v4.9.y 33/42] arm64: KVM: Make PSCI_VERSION a fast path +Subject: arm64: KVM: Make PSCI_VERSION a fast path To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-34-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-kvm-report-smccc_arch_workaround_1-bp-hardening-support.patch b/queue-4.9/arm64-kvm-report-smccc_arch_workaround_1-bp-hardening-support.patch index 822c40bd2af..f19799a2e67 100644 --- a/queue-4.9/arm64-kvm-report-smccc_arch_workaround_1-bp-hardening-support.patch +++ b/queue-4.9/arm64-kvm-report-smccc_arch_workaround_1-bp-hardening-support.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:31 +0100 -Subject: [PATCH v4.9.y 35/42] arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support +Subject: arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-36-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-kvm-use-per-cpu-vector-when-bp-hardening-is-enabled.patch b/queue-4.9/arm64-kvm-use-per-cpu-vector-when-bp-hardening-is-enabled.patch index dec31025acb..cd89455a8a6 100644 --- a/queue-4.9/arm64-kvm-use-per-cpu-vector-when-bp-hardening-is-enabled.patch +++ b/queue-4.9/arm64-kvm-use-per-cpu-vector-when-bp-hardening-is-enabled.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:16 +0100 -Subject: [PATCH v4.9.y 20/42] arm64: KVM: Use per-CPU vector when BP hardening is enabled +Subject: arm64: KVM: Use per-CPU vector when BP hardening is enabled To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-21-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-make-user_ds-an-inclusive-limit.patch b/queue-4.9/arm64-make-user_ds-an-inclusive-limit.patch index 3a8f88dcb72..970926ef894 100644 --- a/queue-4.9/arm64-make-user_ds-an-inclusive-limit.patch +++ b/queue-4.9/arm64-make-user_ds-an-inclusive-limit.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:00 +0100 -Subject: [PATCH v4.9.y 04/42] arm64: Make USER_DS an inclusive limit +Subject: arm64: Make USER_DS an inclusive limit To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-5-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-move-bp-hardening-to-check_and_switch_context.patch b/queue-4.9/arm64-move-bp-hardening-to-check_and_switch_context.patch index cb53b854c86..24e9fdf18a8 100644 --- a/queue-4.9/arm64-move-bp-hardening-to-check_and_switch_context.patch +++ b/queue-4.9/arm64-move-bp-hardening-to-check_and_switch_context.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:14 +0100 -Subject: [PATCH v4.9.y 18/42] arm64: Move BP hardening to check_and_switch_context +Subject: arm64: Move BP hardening to check_and_switch_context To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-19-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-move-post_ttbr_update_workaround-to-c-code.patch b/queue-4.9/arm64-move-post_ttbr_update_workaround-to-c-code.patch index 835ad8800ce..aa083a072f2 100644 --- a/queue-4.9/arm64-move-post_ttbr_update_workaround-to-c-code.patch +++ b/queue-4.9/arm64-move-post_ttbr_update_workaround-to-c-code.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:12 +0100 -Subject: [PATCH v4.9.y 16/42] arm64: Move post_ttbr_update_workaround to C code +Subject: arm64: Move post_ttbr_update_workaround to C code To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-17-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-move-task_-definitions-to-asm-processor.h.patch b/queue-4.9/arm64-move-task_-definitions-to-asm-processor.h.patch index f313be3189b..cbaf4b5104f 100644 --- a/queue-4.9/arm64-move-task_-definitions-to-asm-processor.h.patch +++ b/queue-4.9/arm64-move-task_-definitions-to-asm-processor.h.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:10:59 +0100 -Subject: [PATCH v4.9.y 03/42] arm64: move TASK_* definitions to +Subject: arm64: move TASK_* definitions to To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-4-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-run-enable-method-for-errata-work-arounds-on-late-cpus.patch b/queue-4.9/arm64-run-enable-method-for-errata-work-arounds-on-late-cpus.patch index 6bc2cec7d6c..3c0c142bf54 100644 --- a/queue-4.9/arm64-run-enable-method-for-errata-work-arounds-on-late-cpus.patch +++ b/queue-4.9/arm64-run-enable-method-for-errata-work-arounds-on-late-cpus.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:08 +0100 -Subject: [PATCH v4.9.y 12/42] arm64: Run enable method for errata work arounds on late CPUs +Subject: arm64: Run enable method for errata work arounds on late CPUs To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-13-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-uaccess-don-t-bother-eliding-access_ok-checks-in-__-get-put-_user.patch b/queue-4.9/arm64-uaccess-don-t-bother-eliding-access_ok-checks-in-__-get-put-_user.patch index b9acc0ab985..627f37abfc9 100644 --- a/queue-4.9/arm64-uaccess-don-t-bother-eliding-access_ok-checks-in-__-get-put-_user.patch +++ b/queue-4.9/arm64-uaccess-don-t-bother-eliding-access_ok-checks-in-__-get-put-_user.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:04 +0100 -Subject: [PATCH v4.9.y 08/42] arm64: uaccess: Don't bother eliding access_ok checks in __{get, put}_user +Subject: arm64: uaccess: Don't bother eliding access_ok checks in __{get, put}_user To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-9-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-uaccess-mask-__user-pointers-for-__arch_-clear-copy_-_user.patch b/queue-4.9/arm64-uaccess-mask-__user-pointers-for-__arch_-clear-copy_-_user.patch index 15e7ebeeb34..e1f6f1ec7ed 100644 --- a/queue-4.9/arm64-uaccess-mask-__user-pointers-for-__arch_-clear-copy_-_user.patch +++ b/queue-4.9/arm64-uaccess-mask-__user-pointers-for-__arch_-clear-copy_-_user.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:05 +0100 -Subject: [PATCH v4.9.y 09/42] arm64: uaccess: Mask __user pointers for __arch_{clear, copy_*}_user +Subject: arm64: uaccess: Mask __user pointers for __arch_{clear, copy_*}_user To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-10-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-uaccess-prevent-speculative-use-of-the-current-addr_limit.patch b/queue-4.9/arm64-uaccess-prevent-speculative-use-of-the-current-addr_limit.patch index 9c1d3efa86e..eeae199462d 100644 --- a/queue-4.9/arm64-uaccess-prevent-speculative-use-of-the-current-addr_limit.patch +++ b/queue-4.9/arm64-uaccess-prevent-speculative-use-of-the-current-addr_limit.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:03 +0100 -Subject: [PATCH v4.9.y 07/42] arm64: uaccess: Prevent speculative use of the current addr_limit +Subject: arm64: uaccess: Prevent speculative use of the current addr_limit To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-8-mark.rutland@arm.com> diff --git a/queue-4.9/arm64-use-pointer-masking-to-limit-uaccess-speculation.patch b/queue-4.9/arm64-use-pointer-masking-to-limit-uaccess-speculation.patch index b6e3336d8df..89a4ee5fe06 100644 --- a/queue-4.9/arm64-use-pointer-masking-to-limit-uaccess-speculation.patch +++ b/queue-4.9/arm64-use-pointer-masking-to-limit-uaccess-speculation.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:01 +0100 -Subject: [PATCH v4.9.y 05/42] arm64: Use pointer masking to limit uaccess speculation +Subject: arm64: Use pointer masking to limit uaccess speculation To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-6-mark.rutland@arm.com> diff --git a/queue-4.9/drivers-firmware-expose-psci_get_version-through-psci_ops-structure.patch b/queue-4.9/drivers-firmware-expose-psci_get_version-through-psci_ops-structure.patch index 6538a52f707..7601f91e135 100644 --- a/queue-4.9/drivers-firmware-expose-psci_get_version-through-psci_ops-structure.patch +++ b/queue-4.9/drivers-firmware-expose-psci_get_version-through-psci_ops-structure.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:10 +0100 -Subject: [PATCH v4.9.y 14/42] drivers/firmware: Expose psci_get_version through psci_ops structure +Subject: drivers/firmware: Expose psci_get_version through psci_ops structure To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-15-mark.rutland@arm.com> diff --git a/queue-4.9/firmware-psci-expose-psci-conduit.patch b/queue-4.9/firmware-psci-expose-psci-conduit.patch index baa52fe4cc0..be425a2661a 100644 --- a/queue-4.9/firmware-psci-expose-psci-conduit.patch +++ b/queue-4.9/firmware-psci-expose-psci-conduit.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:33 +0100 -Subject: [PATCH v4.9.y 37/42] firmware/psci: Expose PSCI conduit +Subject: firmware/psci: Expose PSCI conduit To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-38-mark.rutland@arm.com> diff --git a/queue-4.9/firmware-psci-expose-smccc-version-through-psci_ops.patch b/queue-4.9/firmware-psci-expose-smccc-version-through-psci_ops.patch index 2042f419bd4..552faf2064c 100644 --- a/queue-4.9/firmware-psci-expose-smccc-version-through-psci_ops.patch +++ b/queue-4.9/firmware-psci-expose-smccc-version-through-psci_ops.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:34 +0100 -Subject: [PATCH v4.9.y 38/42] firmware/psci: Expose SMCCC version through psci_ops +Subject: firmware/psci: Expose SMCCC version through psci_ops To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-39-mark.rutland@arm.com> diff --git a/queue-4.9/mm-introduce-lm_alias.patch b/queue-4.9/mm-introduce-lm_alias.patch index 3e91c257aef..c1eb2f758bd 100644 --- a/queue-4.9/mm-introduce-lm_alias.patch +++ b/queue-4.9/mm-introduce-lm_alias.patch @@ -1,7 +1,7 @@ From foo@baz Tue Apr 17 14:06:43 CEST 2018 From: Mark Rutland Date: Thu, 12 Apr 2018 12:11:15 +0100 -Subject: [PATCH v4.9.y 19/42] mm: Introduce lm_alias +Subject: mm: Introduce lm_alias To: stable@vger.kernel.org Cc: mark.brown@linaro.org, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, ghackmann@google.com, shankerd@codeaurora.org Message-ID: <20180412111138.40990-20-mark.rutland@arm.com>