From: Greg Kroah-Hartman Date: Wed, 7 Mar 2018 15:24:40 +0000 (-0800) Subject: 4.9-stable patches X-Git-Tag: v4.14.25~24 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=93a860f4e3769a26dd7ec4f2fdc58dfed852188e;p=thirdparty%2Fkernel%2Fstable-queue.git 4.9-stable patches added patches: pci-aspm-deal-with-missing-root-ports-in-link-state-handling.patch --- diff --git a/queue-4.9/pci-aspm-deal-with-missing-root-ports-in-link-state-handling.patch b/queue-4.9/pci-aspm-deal-with-missing-root-ports-in-link-state-handling.patch new file mode 100644 index 00000000000..2e7e27da359 --- /dev/null +++ b/queue-4.9/pci-aspm-deal-with-missing-root-ports-in-link-state-handling.patch @@ -0,0 +1,52 @@ +From ee8bdfb6568d86bb93f55f8d99c4c643e77304ee Mon Sep 17 00:00:00 2001 +From: Ard Biesheuvel +Date: Mon, 2 Oct 2017 15:08:40 +0100 +Subject: PCI/ASPM: Deal with missing root ports in link state handling + +From: Ard Biesheuvel + +commit ee8bdfb6568d86bb93f55f8d99c4c643e77304ee upstream. + +Even though it is unconventional, some PCIe host implementations omit the +root ports entirely, and simply consist of a host bridge (which is not +modeled as a device in the PCI hierarchy) and a link. + +When the downstream device is an endpoint, our current code does not seem +to mind this unusual configuration. However, when PCIe switches are +involved, the ASPM code assumes that any downstream switch port has a +parent, and blindly dereferences the bus->parent->self field of the pci_dev +struct to chain the downstream link state to the link state of the root +port. Given that the root port is missing, the link is not modeled at all, +and nor is the link state, and attempting to access it results in a NULL +pointer dereference and a crash. + +Avoid this by allowing the link state chain to terminate at the downstream +port if no root port exists. + +Signed-off-by: Ard Biesheuvel +Signed-off-by: Bjorn Helgaas +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pci/pcie/aspm.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +--- a/drivers/pci/pcie/aspm.c ++++ b/drivers/pci/pcie/aspm.c +@@ -526,10 +526,14 @@ static struct pcie_link_state *alloc_pci + + /* + * Root Ports and PCI/PCI-X to PCIe Bridges are roots of PCIe +- * hierarchies. ++ * hierarchies. Note that some PCIe host implementations omit ++ * the root ports entirely, in which case a downstream port on ++ * a switch may become the root of the link state chain for all ++ * its subordinate endpoints. + */ + if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT || +- pci_pcie_type(pdev) == PCI_EXP_TYPE_PCIE_BRIDGE) { ++ pci_pcie_type(pdev) == PCI_EXP_TYPE_PCIE_BRIDGE || ++ !pdev->bus->parent->self) { + link->root = link; + } else { + struct pcie_link_state *parent; diff --git a/queue-4.9/series b/queue-4.9/series index cb4640c3ac4..3d2b87ca92c 100644 --- a/queue-4.9/series +++ b/queue-4.9/series @@ -21,3 +21,4 @@ arm-kvm-fix-building-with-gcc-8.patch kvm-mmu-fix-overlap-between-public-and-private-memslots.patch kvm-x86-remove-indirect-msr-op-calls-from-spec_ctrl.patch kvm-vmx-optimize-vmx_vcpu_run-and-svm_vcpu_run-by-marking-the-rdmsr-path-as-unlikely.patch +pci-aspm-deal-with-missing-root-ports-in-link-state-handling.patch