From: Samuel Holland Date: Tue, 9 Sep 2025 22:41:27 +0000 (-0700) Subject: cache: sifive_ccache: Optimize cache flushes X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=941327ca5ddd45cfc4dd960cbbabed9e2b5cb1b0;p=thirdparty%2Fkernel%2Fstable.git cache: sifive_ccache: Optimize cache flushes Fence instructions are required only at the beginning and the end of a flush operation, not separately for each cache line being flushed. Speed up cache flushes by about 15% by removing the extra fences. Signed-off-by: Samuel Holland Signed-off-by: Conor Dooley --- diff --git a/drivers/cache/sifive_ccache.c b/drivers/cache/sifive_ccache.c index e1a283805ea7f..a86800b123b9e 100644 --- a/drivers/cache/sifive_ccache.c +++ b/drivers/cache/sifive_ccache.c @@ -151,16 +151,16 @@ static void ccache_flush_range(phys_addr_t start, size_t len) if (!len) return; - mb(); + mb(); /* complete earlier memory accesses before the cache flush */ for (line = ALIGN_DOWN(start, SIFIVE_CCACHE_LINE_SIZE); line < end; line += SIFIVE_CCACHE_LINE_SIZE) { #ifdef CONFIG_32BIT - writel(line >> 4, ccache_base + SIFIVE_CCACHE_FLUSH32); + writel_relaxed(line >> 4, ccache_base + SIFIVE_CCACHE_FLUSH32); #else - writeq(line, ccache_base + SIFIVE_CCACHE_FLUSH64); + writeq_relaxed(line, ccache_base + SIFIVE_CCACHE_FLUSH64); #endif - mb(); } + mb(); /* issue later memory accesses after the cache flush */ } static const struct riscv_nonstd_cache_ops ccache_mgmt_ops __initconst = {