From: Greg Kroah-Hartman Date: Thu, 3 May 2018 20:12:57 +0000 (-0700) Subject: 4.9-stable patches X-Git-Tag: v4.9.99~30 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9419dd200345fc97eb51e4179f68bb64b5c5add6;p=thirdparty%2Fkernel%2Fstable-queue.git 4.9-stable patches added patches: serial-imx-ensure-ucr3-and-ufcr-are-setup-correctly.patch --- diff --git a/queue-4.9/serial-imx-ensure-ucr3-and-ufcr-are-setup-correctly.patch b/queue-4.9/serial-imx-ensure-ucr3-and-ufcr-are-setup-correctly.patch new file mode 100644 index 00000000000..677d9bcfdf6 --- /dev/null +++ b/queue-4.9/serial-imx-ensure-ucr3-and-ufcr-are-setup-correctly.patch @@ -0,0 +1,64 @@ +From 6df765dca378bddf994cfd2044acafa501bd800f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Wed, 24 May 2017 21:38:46 +0200 +Subject: serial: imx: ensure UCR3 and UFCR are setup correctly +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Uwe Kleine-König + +commit 6df765dca378bddf994cfd2044acafa501bd800f upstream. + +Commit e61c38d85b73 ("serial: imx: setup DCEDTE early and ensure DCD and +RI irqs to be off") has a flaw: While UCR3 and UFCR were modified using +read-modify-write before it switched to write register values +independent of the previous state. That's a good idea in principle (and +that's why I did it) but needs more care. + +This patch reinstates read-modify-write for UFCR and for UCR3 ensures +that RXDMUXSEL and ADNIMP are set for post imx1. + +Fixes: e61c38d85b73 ("serial: imx: setup DCEDTE early and ensure DCD and RI irqs to be off") +Signed-off-by: Uwe Kleine-König +Acked-by: Mika Penttilä +Tested-by: Mika Penttilä +Acked-by: Steve Twiss +Tested-by: Steve Twiss +Cc: Chris Ruehl +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/tty/serial/imx.c | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +--- a/drivers/tty/serial/imx.c ++++ b/drivers/tty/serial/imx.c +@@ -2151,7 +2151,9 @@ static int serial_imx_probe(struct platf + * and DCD (when they are outputs) or enables the respective + * irqs. So set this bit early, i.e. before requesting irqs. + */ +- writel(UFCR_DCEDTE, sport->port.membase + UFCR); ++ reg = readl(sport->port.membase + UFCR); ++ if (!(reg & UFCR_DCEDTE)) ++ writel(reg | UFCR_DCEDTE, sport->port.membase + UFCR); + + /* + * Disable UCR3_RI and UCR3_DCD irqs. They are also not +@@ -2162,7 +2164,15 @@ static int serial_imx_probe(struct platf + sport->port.membase + UCR3); + + } else { +- writel(0, sport->port.membase + UFCR); ++ unsigned long ucr3 = UCR3_DSR; ++ ++ reg = readl(sport->port.membase + UFCR); ++ if (reg & UFCR_DCEDTE) ++ writel(reg & ~UFCR_DCEDTE, sport->port.membase + UFCR); ++ ++ if (!is_imx1_uart(sport)) ++ ucr3 |= IMX21_UCR3_RXDMUXSEL | UCR3_ADNIMP; ++ writel(ucr3, sport->port.membase + UCR3); + } + + clk_disable_unprepare(sport->clk_ipg); diff --git a/queue-4.9/series b/queue-4.9/series index 799190b5edb..265110242bc 100644 --- a/queue-4.9/series +++ b/queue-4.9/series @@ -395,3 +395,4 @@ tpm-do-not-suspend-resume-if-power-stays-on.patch tpm-self-test-failure-should-not-cause-suspend-to-fail.patch arm-arm64-kvm-add-psci-version-selection-api.patch crypto-talitos-fix-ipsec-cipher-in-length.patch +serial-imx-ensure-ucr3-and-ufcr-are-setup-correctly.patch