From: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Tue, 8 Feb 2022 16:36:14 +0000 (-0600)
Subject: rs6000: Add support for vmsumcud and vec_msumc
X-Git-Tag: basepoints/gcc-13~1203
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=943d631abdd7be623cbf2b870d3d0cfef89f5f26;p=thirdparty%2Fgcc.git

rs6000: Add support for vmsumcud and vec_msumc

2022-02-08  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-builtins.def (VMSUMCUD): New.
	* config/rs6000/rs6000-overload.def (VEC_MSUMC): New.
	* config/rs6000/vsx.md (UNSPEC_VMSUMCUD): New constant.
	(vmsumcud): New define_insn.

gcc/testsuite/
	* gcc.target/powerpc/vec-msumc.c: New test.
---

diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index 7f527b6709fb..2d1e63fb20e8 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -3497,6 +3497,9 @@
   const signed int __builtin_altivec_vstrihr_p (vss);
     VSTRIHR_P vstrir_p_v8hi {}
 
+  const vuq __builtin_vsx_vmsumcud (vull, vull, vuq);
+    VMSUMCUD vmsumcud {}
+
   const signed int __builtin_vsx_xvtlsbb_all_ones (vsc);
     XVTLSBB_ONES xvtlsbbo {}
 
diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def
index cdc703e97642..49a6104ddd26 100644
--- a/gcc/config/rs6000/rs6000-overload.def
+++ b/gcc/config/rs6000/rs6000-overload.def
@@ -2456,6 +2456,10 @@
   vuq __builtin_vec_msum (vull, vull, vuq);
     VMSUMUDM  VMSUMUDM_U
 
+[VEC_MSUMC, vec_msumc, __builtin_vec_msumc]
+  vuq __builtin_vec_msumc (vull, vull, vuq);
+    VMSUMCUD
+
 [VEC_MSUMS, vec_msums, __builtin_vec_msums]
   vui __builtin_vec_msums (vus, vus, vui);
     VMSUMUHS
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index c8c891e13f41..2f5a2f7828de 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -372,6 +372,7 @@
    UNSPEC_REPLACE_UN
    UNSPEC_VDIVES
    UNSPEC_VDIVEU
+   UNSPEC_VMSUMCUD
    UNSPEC_XXEVAL
    UNSPEC_XXSPLTIW
    UNSPEC_XXSPLTIDP
@@ -6620,3 +6621,15 @@
   emit_move_insn (operands[0], tmp4);
   DONE;
 })
+
+;; vmsumcud
+(define_insn "vmsumcud"
+[(set (match_operand:V1TI 0 "register_operand" "+v")
+      (unspec:V1TI [(match_operand:V2DI 1 "register_operand" "v")
+                    (match_operand:V2DI 2 "register_operand" "v")
+		    (match_operand:V1TI 3 "register_operand" "v")]
+		   UNSPEC_VMSUMCUD))]
+  "TARGET_POWER10"
+  "vmsumcud %0,%1,%2,%3"
+  [(set_attr "type" "veccomplex")]
+)
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-msumc.c b/gcc/testsuite/gcc.target/powerpc/vec-msumc.c
new file mode 100644
index 000000000000..524a2225c6cd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-msumc.c
@@ -0,0 +1,39 @@
+/* { dg-do run { target { power10_hw } } } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-mdejagnu-cpu=power10 -O2" } */
+#include <altivec.h>
+
+#define DEBUG 0
+
+#if DEBUG
+#include <stdio.h>
+#endif
+
+extern void abort (void);
+
+int
+main ()
+{
+  vector unsigned long long arg1, arg2;
+  vector unsigned __int128 arg3, result, expected;
+  unsigned __int128 c = (unsigned __int128) (-1); /* 2^128 - 1 */
+
+  arg1 = (vector unsigned long long) { 111ULL, 300ULL };
+  arg2 = (vector unsigned long long) { 700ULL, 222ULL };
+  arg3 = (vector unsigned __int128) { c };
+  expected = (vector unsigned __int128) { 1 };
+
+  result = vec_msumc (arg1, arg2, arg3);
+  if (result[0] != expected[0])
+    {
+#if DEBUG
+      printf ("ERROR, expected %d, result %d\n",
+	      (unsigned int) expected[0],
+	      (unsigned int) result[0]);
+#else
+      abort ();
+#endif
+    }
+
+  return 0;
+}