From: Greg Kroah-Hartman Date: Mon, 23 Apr 2012 17:19:04 +0000 (-0700) Subject: 3.3-stable patches X-Git-Tag: v3.0.30~21 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=94b512b60dfcd64d2c65ebdab857282721b57bab;p=thirdparty%2Fkernel%2Fstable-queue.git 3.3-stable patches added patches: alsa-hda-conexant-don-t-set-hp-pin-control-bit.patch alsa-hda-conexant-set-up-the-missing-docking-station-pins.patch arm-at91-fix-at91sam9261ek-ethernet-dm9000-irq.patch arm-clps711x-serial-driver-hungs-are-a-result-of-call-disable_irq-within-isr.patch arm-omap1-dmtimer-fix-broken-timer-clock-source-selection.patch arm-omap-serial-fix-the-ocp-smart-idlemode-handling-bug.patch crypto-sha512-fix-byte-counter-overflow-in-sha-512.patch hwmon-fam15h_power-fix-bogus-values-with-current-bioses.patch memblock-memblock-should-be-able-to-handle-zero-length-operations.patch --- diff --git a/queue-3.3/alsa-hda-conexant-don-t-set-hp-pin-control-bit.patch b/queue-3.3/alsa-hda-conexant-don-t-set-hp-pin-control-bit.patch new file mode 100644 index 00000000000..c476ffb74a1 --- /dev/null +++ b/queue-3.3/alsa-hda-conexant-don-t-set-hp-pin-control-bit.patch @@ -0,0 +1,40 @@ +From ca3649de026ff95c6f2847e8d096cf2f411c02b3 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Thu, 19 Apr 2012 15:15:25 +0200 +Subject: ALSA: hda/conexant - Don't set HP pin-control bit unconditionally + +From: Takashi Iwai + +commit ca3649de026ff95c6f2847e8d096cf2f411c02b3 upstream. + +Some output pins on Conexant chips have no HP control bit, but the +auto-parser initializes these pins unconditionally with PIN_HP. + +Check the pin-capability and avoid the HP bit if not supported. + +Signed-off-by: Takashi Iwai +Signed-off-by: Greg Kroah-Hartman + +--- + sound/pci/hda/patch_conexant.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +--- a/sound/pci/hda/patch_conexant.c ++++ b/sound/pci/hda/patch_conexant.c +@@ -3951,9 +3951,14 @@ static void cx_auto_init_output(struct h + int i; + + mute_outputs(codec, spec->multiout.num_dacs, spec->multiout.dac_nids); +- for (i = 0; i < cfg->hp_outs; i++) ++ for (i = 0; i < cfg->hp_outs; i++) { ++ unsigned int val = PIN_OUT; ++ if (snd_hda_query_pin_caps(codec, cfg->hp_pins[i]) & ++ AC_PINCAP_HP_DRV) ++ val |= AC_PINCTL_HP_EN; + snd_hda_codec_write(codec, cfg->hp_pins[i], 0, +- AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP); ++ AC_VERB_SET_PIN_WIDGET_CONTROL, val); ++ } + mute_outputs(codec, cfg->hp_outs, cfg->hp_pins); + mute_outputs(codec, cfg->line_outs, cfg->line_out_pins); + mute_outputs(codec, cfg->speaker_outs, cfg->speaker_pins); diff --git a/queue-3.3/alsa-hda-conexant-set-up-the-missing-docking-station-pins.patch b/queue-3.3/alsa-hda-conexant-set-up-the-missing-docking-station-pins.patch new file mode 100644 index 00000000000..4e7c58a7938 --- /dev/null +++ b/queue-3.3/alsa-hda-conexant-set-up-the-missing-docking-station-pins.patch @@ -0,0 +1,96 @@ +From d70f363222ef373c2037412f09a600357cfa1c7a Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Thu, 19 Apr 2012 15:18:08 +0200 +Subject: ALSA: hda/conexant - Set up the missing docking-station pins + +From: Takashi Iwai + +commit d70f363222ef373c2037412f09a600357cfa1c7a upstream. + +ThinkPad 410,420,510,520 and X201 with cx50585 & co chips have the +docking-station ports, but BIOS doesn't initialize for these pins. +Thus, like the former X200, we need to set up the pins manually in the +driver. + +The odd part is that the same PCI SSID is used for X200 and T400, thus +we need to prepare individual fixup tables for cx5051 and others. + +Bugzilla entries: + https://bugzilla.redhat.com/show_bug.cgi?id=808559 + https://bugzilla.redhat.com/show_bug.cgi?id=806217 + https://bugzilla.redhat.com/show_bug.cgi?id=810697 + +Reported-by: Josh Boyer +Reported-by: Jens Taprogge +Tested-by: Jens Taprogge +Signed-off-by: Takashi Iwai +Signed-off-by: Greg Kroah-Hartman + +--- + sound/pci/hda/patch_conexant.c | 28 +++++++++++++++++++++++++--- + 1 file changed, 25 insertions(+), 3 deletions(-) + +--- a/sound/pci/hda/patch_conexant.c ++++ b/sound/pci/hda/patch_conexant.c +@@ -4367,8 +4367,10 @@ static void apply_pin_fixup(struct hda_c + + enum { + CXT_PINCFG_LENOVO_X200, ++ CXT_PINCFG_LENOVO_TP410, + }; + ++/* ThinkPad X200 & co with cxt5051 */ + static const struct cxt_pincfg cxt_pincfg_lenovo_x200[] = { + { 0x16, 0x042140ff }, /* HP (seq# overridden) */ + { 0x17, 0x21a11000 }, /* dock-mic */ +@@ -4376,15 +4378,33 @@ static const struct cxt_pincfg cxt_pincf + {} + }; + ++/* ThinkPad 410/420/510/520, X201 & co with cxt5066 */ ++static const struct cxt_pincfg cxt_pincfg_lenovo_tp410[] = { ++ { 0x19, 0x042110ff }, /* HP (seq# overridden) */ ++ { 0x1a, 0x21a190f0 }, /* dock-mic */ ++ { 0x1c, 0x212140ff }, /* dock-HP */ ++ {} ++}; ++ + static const struct cxt_pincfg *cxt_pincfg_tbl[] = { + [CXT_PINCFG_LENOVO_X200] = cxt_pincfg_lenovo_x200, ++ [CXT_PINCFG_LENOVO_TP410] = cxt_pincfg_lenovo_tp410, + }; + +-static const struct snd_pci_quirk cxt_fixups[] = { ++static const struct snd_pci_quirk cxt5051_fixups[] = { + SND_PCI_QUIRK(0x17aa, 0x20f2, "Lenovo X200", CXT_PINCFG_LENOVO_X200), + {} + }; + ++static const struct snd_pci_quirk cxt5066_fixups[] = { ++ SND_PCI_QUIRK(0x17aa, 0x20f2, "Lenovo T400", CXT_PINCFG_LENOVO_TP410), ++ SND_PCI_QUIRK(0x17aa, 0x215e, "Lenovo T410", CXT_PINCFG_LENOVO_TP410), ++ SND_PCI_QUIRK(0x17aa, 0x215f, "Lenovo T510", CXT_PINCFG_LENOVO_TP410), ++ SND_PCI_QUIRK(0x17aa, 0x21ce, "Lenovo T420", CXT_PINCFG_LENOVO_TP410), ++ SND_PCI_QUIRK(0x17aa, 0x21cf, "Lenovo T520", CXT_PINCFG_LENOVO_TP410), ++ {} ++}; ++ + /* add "fake" mute amp-caps to DACs on cx5051 so that mixer mute switches + * can be created (bko#42825) + */ +@@ -4421,11 +4441,13 @@ static int patch_conexant_auto(struct hd + break; + case 0x14f15051: + add_cx5051_fake_mutes(codec); ++ apply_pin_fixup(codec, cxt5051_fixups, cxt_pincfg_tbl); ++ break; ++ default: ++ apply_pin_fixup(codec, cxt5066_fixups, cxt_pincfg_tbl); + break; + } + +- apply_pin_fixup(codec, cxt_fixups, cxt_pincfg_tbl); +- + err = cx_auto_search_adcs(codec); + if (err < 0) + return err; diff --git a/queue-3.3/arm-at91-fix-at91sam9261ek-ethernet-dm9000-irq.patch b/queue-3.3/arm-at91-fix-at91sam9261ek-ethernet-dm9000-irq.patch new file mode 100644 index 00000000000..05f12671f23 --- /dev/null +++ b/queue-3.3/arm-at91-fix-at91sam9261ek-ethernet-dm9000-irq.patch @@ -0,0 +1,48 @@ +From ee9dd7631af6fb5c02964ed5b496217cd4ced059 Mon Sep 17 00:00:00 2001 +From: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue, 10 Apr 2012 17:32:44 +0200 +Subject: ARM: at91: fix at91sam9261ek Ethernet dm9000 irq + +From: Jean-Christophe PLAGNIOL-VILLARD + +commit ee9dd7631af6fb5c02964ed5b496217cd4ced059 upstream. + +You need to setup the dm9000 irq via gpio_to_irq() since +d0fbda9add (ARM: at91/gpio: drop PIN_BASE). + +Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD +Acked-by: Nicolas Ferre +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/mach-at91/board-sam9261ek.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/arch/arm/mach-at91/board-sam9261ek.c ++++ b/arch/arm/mach-at91/board-sam9261ek.c +@@ -85,8 +85,6 @@ static struct resource dm9000_resource[] + .flags = IORESOURCE_MEM + }, + [2] = { +- .start = AT91_PIN_PC11, +- .end = AT91_PIN_PC11, + .flags = IORESOURCE_IRQ + | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE, + } +@@ -130,6 +128,8 @@ static struct sam9_smc_config __initdata + + static void __init ek_add_device_dm9000(void) + { ++ struct resource *r = &dm9000_resource[2]; ++ + /* Configure chip-select 2 (DM9000) */ + sam9_smc_configure(0, 2, &dm9000_smc_config); + +@@ -139,6 +139,7 @@ static void __init ek_add_device_dm9000( + /* Configure Interrupt pin as input, no pull-up */ + at91_set_gpio_input(AT91_PIN_PC11, 0); + ++ r->start = r->end = gpio_to_irq(AT91_PIN_PC11); + platform_device_register(&dm9000_device); + } + #else diff --git a/queue-3.3/arm-clps711x-serial-driver-hungs-are-a-result-of-call-disable_irq-within-isr.patch b/queue-3.3/arm-clps711x-serial-driver-hungs-are-a-result-of-call-disable_irq-within-isr.patch new file mode 100644 index 00000000000..0f7bcffa28a --- /dev/null +++ b/queue-3.3/arm-clps711x-serial-driver-hungs-are-a-result-of-call-disable_irq-within-isr.patch @@ -0,0 +1,50 @@ +From 7a6fbc9a887193a1e9f8658703881c528040afbc Mon Sep 17 00:00:00 2001 +From: Alexander Shiyan +Date: Tue, 27 Mar 2012 12:22:49 +0400 +Subject: ARM: clps711x: serial driver hungs are a result of call disable_irq within ISR + +From: Alexander Shiyan + +commit 7a6fbc9a887193a1e9f8658703881c528040afbc upstream. + +Since 2.6.30-rc1 clps711x serial driver hungs system. This is a result +of call disable_irq from ISR. synchronize_irq waits for end of interrupt +and goes to infinite loop. This patch fix this problem. + +Signed-off-by: Alexander Shiyan +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/tty/serial/clps711x.c | 14 ++++++++------ + 1 file changed, 8 insertions(+), 6 deletions(-) + +--- a/drivers/tty/serial/clps711x.c ++++ b/drivers/tty/serial/clps711x.c +@@ -154,10 +154,9 @@ static irqreturn_t clps711xuart_int_tx(i + port->x_char = 0; + return IRQ_HANDLED; + } +- if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { +- clps711xuart_stop_tx(port); +- return IRQ_HANDLED; +- } ++ ++ if (uart_circ_empty(xmit) || uart_tx_stopped(port)) ++ goto disable_tx_irq; + + count = port->fifosize >> 1; + do { +@@ -171,8 +170,11 @@ static irqreturn_t clps711xuart_int_tx(i + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) + uart_write_wakeup(port); + +- if (uart_circ_empty(xmit)) +- clps711xuart_stop_tx(port); ++ if (uart_circ_empty(xmit)) { ++ disable_tx_irq: ++ disable_irq_nosync(TX_IRQ(port)); ++ tx_enabled(port) = 0; ++ } + + return IRQ_HANDLED; + } diff --git a/queue-3.3/arm-omap-serial-fix-the-ocp-smart-idlemode-handling-bug.patch b/queue-3.3/arm-omap-serial-fix-the-ocp-smart-idlemode-handling-bug.patch new file mode 100644 index 00000000000..21ba51b5cb5 --- /dev/null +++ b/queue-3.3/arm-omap-serial-fix-the-ocp-smart-idlemode-handling-bug.patch @@ -0,0 +1,47 @@ +From 5ae256dcd91bf308826a4ac19598b27ebb86a536 Mon Sep 17 00:00:00 2001 +From: Santosh Shilimkar +Date: Fri, 13 Apr 2012 23:25:04 +0530 +Subject: ARM: OMAP: serial: Fix the ocp smart idlemode handling bug + +From: Santosh Shilimkar + +commit 5ae256dcd91bf308826a4ac19598b27ebb86a536 upstream. + +The current serial UART code, while fidling with ocp idlemode bits, +forget about the smart idle wakeup bit even if it is supported by +UART IP block. This will lead to missing the module wakeup on OMAP's +where the smart idle wakeup is supported. + +This was the root cause of the console sluggishness issue, I have been +observing on OMAP4 devices and also can be potential reason for some +other UART wakeup issues. + +Signed-off-by: Santosh Shilimkar +Acked-by: Kevin Hilman +Acked-by: Govindraj.R +Reviewed-by: Paul Walmsley +Signed-off-by: Tony Lindgren +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/mach-omap2/serial.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +--- a/arch/arm/mach-omap2/serial.c ++++ b/arch/arm/mach-omap2/serial.c +@@ -110,8 +110,14 @@ static void omap_uart_set_noidle(struct + static void omap_uart_set_smartidle(struct platform_device *pdev) + { + struct omap_device *od = to_omap_device(pdev); ++ u8 idlemode; + +- omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART); ++ if (od->hwmods[0]->class->sysc->idlemodes & SIDLE_SMART_WKUP) ++ idlemode = HWMOD_IDLEMODE_SMART_WKUP; ++ else ++ idlemode = HWMOD_IDLEMODE_SMART; ++ ++ omap_hwmod_set_slave_idlemode(od->hwmods[0], idlemode); + } + + #else diff --git a/queue-3.3/arm-omap1-dmtimer-fix-broken-timer-clock-source-selection.patch b/queue-3.3/arm-omap1-dmtimer-fix-broken-timer-clock-source-selection.patch new file mode 100644 index 00000000000..427c1d8c3ab --- /dev/null +++ b/queue-3.3/arm-omap1-dmtimer-fix-broken-timer-clock-source-selection.patch @@ -0,0 +1,55 @@ +From 6aaec67da1e41a0752a2b903b989e73b9f02e182 Mon Sep 17 00:00:00 2001 +From: Paul Walmsley +Date: Tue, 10 Apr 2012 18:36:02 -0600 +Subject: ARM: OMAP1: DMTIMER: fix broken timer clock source selection + +From: Paul Walmsley + +commit 6aaec67da1e41a0752a2b903b989e73b9f02e182 upstream. + +DMTIMER source selection on OMAP1 is broken. omap1_dm_timer_set_src() +tries to use __raw_{read,write}l() to read from and write to physical +addresses, but those functions take virtual addresses. + +sparse caught this: + +arch/arm/mach-omap1/timer.c:50:13: warning: incorrect type in argument 1 (different base types) +arch/arm/mach-omap1/timer.c:50:13: expected void const volatile [noderef] * +arch/arm/mach-omap1/timer.c:50:13: got unsigned int +arch/arm/mach-omap1/timer.c:52:9: warning: incorrect type in argument 1 (different base types) +arch/arm/mach-omap1/timer.c:52:9: expected void const volatile [noderef] * +arch/arm/mach-omap1/timer.c:52:9: got unsigned int + +Fix by using omap_{read,writel}(), just like the other users of the +MOD_CONF_CTRL_1 register in the OMAP1 codebase. Of course, in the long term, +removing omap_{read,write}l() is the appropriate thing to do; but +this will take some work to do this cleanly. + +Looks like this was caused by 97933d6 (ARM: OMAP1: dmtimer: conversion +to platform devices) that dangerously moved code and changed it in +the same patch. + +Signed-off-by: Paul Walmsley +Cc: Tarun Kanti DebBarma +[tony@atomide.com: updated comments to include the breaking commit] +Signed-off-by: Tony Lindgren +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/mach-omap1/timer.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm/mach-omap1/timer.c ++++ b/arch/arm/mach-omap1/timer.c +@@ -47,9 +47,9 @@ static int omap1_dm_timer_set_src(struct + int n = (pdev->id - 1) << 1; + u32 l; + +- l = __raw_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); ++ l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); + l |= source << n; +- __raw_writel(l, MOD_CONF_CTRL_1); ++ omap_writel(l, MOD_CONF_CTRL_1); + + return 0; + } diff --git a/queue-3.3/crypto-sha512-fix-byte-counter-overflow-in-sha-512.patch b/queue-3.3/crypto-sha512-fix-byte-counter-overflow-in-sha-512.patch new file mode 100644 index 00000000000..bf5df776cdc --- /dev/null +++ b/queue-3.3/crypto-sha512-fix-byte-counter-overflow-in-sha-512.patch @@ -0,0 +1,34 @@ +From 25c3d30c918207556ae1d6e663150ebdf902186b Mon Sep 17 00:00:00 2001 +From: Kent Yoder +Date: Thu, 5 Apr 2012 20:34:20 +0800 +Subject: crypto: sha512 - Fix byte counter overflow in SHA-512 + +From: Kent Yoder + +commit 25c3d30c918207556ae1d6e663150ebdf902186b upstream. + +The current code only increments the upper 64 bits of the SHA-512 byte +counter when the number of bytes hashed happens to hit 2^64 exactly. + +This patch increments the upper 64 bits whenever the lower 64 bits +overflows. + +Signed-off-by: Kent Yoder +Signed-off-by: Herbert Xu +Signed-off-by: Greg Kroah-Hartman + +--- + crypto/sha512_generic.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/crypto/sha512_generic.c ++++ b/crypto/sha512_generic.c +@@ -174,7 +174,7 @@ sha512_update(struct shash_desc *desc, c + index = sctx->count[0] & 0x7f; + + /* Update number of bytes */ +- if (!(sctx->count[0] += len)) ++ if ((sctx->count[0] += len) < len) + sctx->count[1]++; + + part_len = 128 - index; diff --git a/queue-3.3/hwmon-fam15h_power-fix-bogus-values-with-current-bioses.patch b/queue-3.3/hwmon-fam15h_power-fix-bogus-values-with-current-bioses.patch new file mode 100644 index 00000000000..589bb50b1fd --- /dev/null +++ b/queue-3.3/hwmon-fam15h_power-fix-bogus-values-with-current-bioses.patch @@ -0,0 +1,90 @@ +From 00250ec90963b7ef6678438888f3244985ecde14 Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Mon, 9 Apr 2012 18:16:34 -0400 +Subject: hwmon: fam15h_power: fix bogus values with current BIOSes + +From: Andre Przywara + +commit 00250ec90963b7ef6678438888f3244985ecde14 upstream. + +Newer BKDG[1] versions recommend a different initialization value for +the running average range register in the northbridge. This improves +the power reading by avoiding counter saturations resulting in bogus +values for anything below about 80% of TDP power consumption. +Updated BIOSes will have this new value set up from the beginning, +but meanwhile we correct this value ourselves. +This needs to be done on all northbridges, even on those where the +driver itself does not register at. + +This fixes the driver on all current machines to provide proper +values for idle load. + +[1] +http://support.amd.com/us/Processor_TechDocs/42301_15h_Mod_00h-0Fh_BKDG.pdf +Chapter 3.8: D18F5xE0 Processor TDP Running Average (p. 452) + +Signed-off-by: Andre Przywara +Acked-by: Jean Delvare +[guenter.roeck@ericsson.com: Removed unnecessary return statement] +Signed-off-by: Guenter Roeck +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/hwmon/fam15h_power.c | 39 +++++++++++++++++++++++++++++++++++++++ + 1 file changed, 39 insertions(+) + +--- a/drivers/hwmon/fam15h_power.c ++++ b/drivers/hwmon/fam15h_power.c +@@ -122,6 +122,38 @@ static bool __devinit fam15h_power_is_in + return true; + } + ++/* ++ * Newer BKDG versions have an updated recommendation on how to properly ++ * initialize the running average range (was: 0xE, now: 0x9). This avoids ++ * counter saturations resulting in bogus power readings. ++ * We correct this value ourselves to cope with older BIOSes. ++ */ ++static void __devinit tweak_runavg_range(struct pci_dev *pdev) ++{ ++ u32 val; ++ const struct pci_device_id affected_device = { ++ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) }; ++ ++ /* ++ * let this quirk apply only to the current version of the ++ * northbridge, since future versions may change the behavior ++ */ ++ if (!pci_match_id(&affected_device, pdev)) ++ return; ++ ++ pci_bus_read_config_dword(pdev->bus, ++ PCI_DEVFN(PCI_SLOT(pdev->devfn), 5), ++ REG_TDP_RUNNING_AVERAGE, &val); ++ if ((val & 0xf) != 0xe) ++ return; ++ ++ val &= ~0xf; ++ val |= 0x9; ++ pci_bus_write_config_dword(pdev->bus, ++ PCI_DEVFN(PCI_SLOT(pdev->devfn), 5), ++ REG_TDP_RUNNING_AVERAGE, val); ++} ++ + static void __devinit fam15h_power_init_data(struct pci_dev *f4, + struct fam15h_power_data *data) + { +@@ -155,6 +187,13 @@ static int __devinit fam15h_power_probe( + struct device *dev; + int err; + ++ /* ++ * though we ignore every other northbridge, we still have to ++ * do the tweaking on _each_ node in MCM processors as the counters ++ * are working hand-in-hand ++ */ ++ tweak_runavg_range(pdev); ++ + if (!fam15h_power_is_internal_node0(pdev)) { + err = -ENODEV; + goto exit; diff --git a/queue-3.3/memblock-memblock-should-be-able-to-handle-zero-length-operations.patch b/queue-3.3/memblock-memblock-should-be-able-to-handle-zero-length-operations.patch new file mode 100644 index 00000000000..2b59dac5a7f --- /dev/null +++ b/queue-3.3/memblock-memblock-should-be-able-to-handle-zero-length-operations.patch @@ -0,0 +1,62 @@ +From b3dc627cabb33fc95f93da78457770c1b2a364d2 Mon Sep 17 00:00:00 2001 +From: Tejun Heo +Date: Fri, 20 Apr 2012 08:31:34 -0700 +Subject: memblock: memblock should be able to handle zero length operations + +From: Tejun Heo + +commit b3dc627cabb33fc95f93da78457770c1b2a364d2 upstream. + +Commit 24aa07882b ("memblock, x86: Replace memblock_x86_reserve/ +free_range() with generic ones") replaced x86 specific memblock +operations with the generic ones; unfortunately, it lost zero length +operation handling in the process making the kernel panic if somebody +tries to reserve zero length area. + +There isn't much to be gained by being cranky to zero length operations +and panicking is almost the worst response. Drop the BUG_ON() in +memblock_reserve() and update memblock_add_region/isolate_range() so +that all zero length operations are handled as noops. + +Signed-off-by: Tejun Heo +Reported-by: Valere Monseur +Bisected-by: Joseph Freeman +Tested-by: Joseph Freeman +Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43098 +Signed-off-by: Linus Torvalds +Signed-off-by: Greg Kroah-Hartman + +--- + mm/memblock.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +--- a/mm/memblock.c ++++ b/mm/memblock.c +@@ -330,6 +330,9 @@ static int __init_memblock memblock_add_ + phys_addr_t end = base + memblock_cap_size(base, &size); + int i, nr_new; + ++ if (!size) ++ return 0; ++ + /* special case for empty array */ + if (type->regions[0].size == 0) { + WARN_ON(type->cnt != 1 || type->total_size); +@@ -430,6 +433,9 @@ static int __init_memblock memblock_isol + + *start_rgn = *end_rgn = 0; + ++ if (!size) ++ return 0; ++ + /* we'll create at most two more regions */ + while (type->cnt + 2 > type->max) + if (memblock_double_array(type) < 0) +@@ -514,7 +520,6 @@ int __init_memblock memblock_reserve(phy + (unsigned long long)base, + (unsigned long long)base + size, + (void *)_RET_IP_); +- BUG_ON(0 == size); + + return memblock_add_region(_rgn, base, size, MAX_NUMNODES); + } diff --git a/queue-3.3/series b/queue-3.3/series index 4c03d30eab1..d8fdd31c423 100644 --- a/queue-3.3/series +++ b/queue-3.3/series @@ -1 +1,10 @@ perf-fix-build-breakage.patch +crypto-sha512-fix-byte-counter-overflow-in-sha-512.patch +hwmon-fam15h_power-fix-bogus-values-with-current-bioses.patch +alsa-hda-conexant-don-t-set-hp-pin-control-bit.patch +alsa-hda-conexant-set-up-the-missing-docking-station-pins.patch +memblock-memblock-should-be-able-to-handle-zero-length-operations.patch +arm-clps711x-serial-driver-hungs-are-a-result-of-call-disable_irq-within-isr.patch +arm-at91-fix-at91sam9261ek-ethernet-dm9000-irq.patch +arm-omap1-dmtimer-fix-broken-timer-clock-source-selection.patch +arm-omap-serial-fix-the-ocp-smart-idlemode-handling-bug.patch