From: Greg Kroah-Hartman Date: Thu, 13 Feb 2025 13:12:38 +0000 (+0100) Subject: 6.13-stable patches X-Git-Tag: v6.6.78~14 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=956a88ba5942ba1acc9cc1ed22dab188a9aa77bf;p=thirdparty%2Fkernel%2Fstable-queue.git 6.13-stable patches added patches: fs-fix-adding-security-options-to-statmount.mnt_opt.patch fs-prepend-statmount.mnt_opts-string-with-security_sb_mnt_opts.patch revert-drm-amd-display-fix-green-screen-issue-after-suspend.patch wifi-rtw89-pci-disable-pcie-wake-bit-when-pcie-deinit.patch --- diff --git a/queue-6.13/fs-fix-adding-security-options-to-statmount.mnt_opt.patch b/queue-6.13/fs-fix-adding-security-options-to-statmount.mnt_opt.patch new file mode 100644 index 0000000000..41c3cd8a16 --- /dev/null +++ b/queue-6.13/fs-fix-adding-security-options-to-statmount.mnt_opt.patch @@ -0,0 +1,70 @@ +From 5eb987105357cb7cfa7cf3b1e2f66d5c0977e412 Mon Sep 17 00:00:00 2001 +From: Miklos Szeredi +Date: Wed, 29 Jan 2025 16:12:53 +0100 +Subject: fs: fix adding security options to statmount.mnt_opt + +From: Miklos Szeredi + +commit 5eb987105357cb7cfa7cf3b1e2f66d5c0977e412 upstream. + +Prepending security options was made conditional on sb->s_op->show_options, +but security options are independent of sb options. + +Fixes: 056d33137bf9 ("fs: prepend statmount.mnt_opts string with security_sb_mnt_opts()") +Fixes: f9af549d1fd3 ("fs: export mount options via statmount()") +Cc: stable@vger.kernel.org # v6.11 +Signed-off-by: Miklos Szeredi +Link: https://lore.kernel.org/r/20250129151253.33241-1-mszeredi@redhat.com +Signed-off-by: Christian Brauner +Signed-off-by: Greg Kroah-Hartman +--- + fs/namespace.c | 29 ++++++++++++++--------------- + 1 file changed, 14 insertions(+), 15 deletions(-) + +--- a/fs/namespace.c ++++ b/fs/namespace.c +@@ -5037,30 +5037,29 @@ static int statmount_mnt_opts(struct kst + { + struct vfsmount *mnt = s->mnt; + struct super_block *sb = mnt->mnt_sb; ++ size_t start = seq->count; + int err; + +- if (sb->s_op->show_options) { +- size_t start = seq->count; +- +- err = security_sb_show_options(seq, sb); +- if (err) +- return err; ++ err = security_sb_show_options(seq, sb); ++ if (err) ++ return err; + ++ if (sb->s_op->show_options) { + err = sb->s_op->show_options(seq, mnt->mnt_root); + if (err) + return err; ++ } + +- if (unlikely(seq_has_overflowed(seq))) +- return -EAGAIN; ++ if (unlikely(seq_has_overflowed(seq))) ++ return -EAGAIN; + +- if (seq->count == start) +- return 0; ++ if (seq->count == start) ++ return 0; + +- /* skip leading comma */ +- memmove(seq->buf + start, seq->buf + start + 1, +- seq->count - start - 1); +- seq->count--; +- } ++ /* skip leading comma */ ++ memmove(seq->buf + start, seq->buf + start + 1, ++ seq->count - start - 1); ++ seq->count--; + + return 0; + } diff --git a/queue-6.13/fs-prepend-statmount.mnt_opts-string-with-security_sb_mnt_opts.patch b/queue-6.13/fs-prepend-statmount.mnt_opts-string-with-security_sb_mnt_opts.patch new file mode 100644 index 0000000000..a1d95c5d31 --- /dev/null +++ b/queue-6.13/fs-prepend-statmount.mnt_opts-string-with-security_sb_mnt_opts.patch @@ -0,0 +1,40 @@ +From 056d33137bf9364456ee70aa265ccbb948daee49 Mon Sep 17 00:00:00 2001 +From: Jeff Layton +Date: Fri, 15 Nov 2024 10:35:53 -0500 +Subject: fs: prepend statmount.mnt_opts string with security_sb_mnt_opts() + +From: Jeff Layton + +commit 056d33137bf9364456ee70aa265ccbb948daee49 upstream. + +Currently these mount options aren't accessible via statmount(). + +The read handler for /proc/#/mountinfo calls security_sb_show_options() +to emit the security options after emitting superblock flag options, but +before calling sb->s_op->show_options. + +Have statmount_mnt_opts() call security_sb_show_options() before +calling ->show_options. + +Signed-off-by: Jeff Layton +Link: https://lore.kernel.org/r/20241115-statmount-v2-2-cd29aeff9cbb@kernel.org +Signed-off-by: Christian Brauner +Stable-dep-of: 5eb987105357 ("fs: fix adding security options to statmount.mnt_opt") +Signed-off-by: Greg Kroah-Hartman +--- + fs/namespace.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/fs/namespace.c ++++ b/fs/namespace.c +@@ -5042,6 +5042,10 @@ static int statmount_mnt_opts(struct kst + if (sb->s_op->show_options) { + size_t start = seq->count; + ++ err = security_sb_show_options(seq, sb); ++ if (err) ++ return err; ++ + err = sb->s_op->show_options(seq, mnt->mnt_root); + if (err) + return err; diff --git a/queue-6.13/revert-drm-amd-display-fix-green-screen-issue-after-suspend.patch b/queue-6.13/revert-drm-amd-display-fix-green-screen-issue-after-suspend.patch new file mode 100644 index 0000000000..ca5defe014 --- /dev/null +++ b/queue-6.13/revert-drm-amd-display-fix-green-screen-issue-after-suspend.patch @@ -0,0 +1,189 @@ +From 04d6273faed083e619fc39a738ab0372b6a4db20 Mon Sep 17 00:00:00 2001 +From: Rodrigo Siqueira +Date: Thu, 14 Nov 2024 15:32:52 -0700 +Subject: Revert "drm/amd/display: Fix green screen issue after suspend" + +From: Rodrigo Siqueira + +commit 04d6273faed083e619fc39a738ab0372b6a4db20 upstream. + +This reverts commit 87b7ebc2e16c14d32a912f18206a4d6cc9abc3e8. + +A long time ago, we had an issue with the Raven system when it was +connected to two displays: one with DP and another with HDMI. After the +system woke up from suspension, we saw a solid green screen caused by an +underflow generated by bad DCC metadata. To workaround this issue, the +'commit 87b7ebc2e16c ("drm/amd/display: Fix green screen issue after +suspend")' was introduced to disable the DCC for a few frames after in +the resume phase. However, in hindsight, this solution was probably a +workaround at the kernel level for some issues from another part +(probably other driver components or user space). After applying this +patch and trying to reproduce the green issue in a similar hardware +system but using the latest kernel and userspace, we cannot see the +issue, which makes this workaround obsolete and creates extra +unnecessary complexity to the code; for all of this reason, this commit +reverts the original change. + +Cc: Mario Limonciello +Cc: Pierre-Eric Pelloux-Prayer +Tested-by: Daniel Wheeler +Reviewed-by: Aurabindo Pillai +Signed-off-by: Rodrigo Siqueira +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 12 ++------ + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 22 +++++----------- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h | 3 -- + 3 files changed, 13 insertions(+), 24 deletions(-) + +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -5530,8 +5530,7 @@ fill_dc_plane_info_and_addr(struct amdgp + const u64 tiling_flags, + struct dc_plane_info *plane_info, + struct dc_plane_address *address, +- bool tmz_surface, +- bool force_disable_dcc) ++ bool tmz_surface) + { + const struct drm_framebuffer *fb = plane_state->fb; + const struct amdgpu_framebuffer *afb = +@@ -5630,7 +5629,7 @@ fill_dc_plane_info_and_addr(struct amdgp + &plane_info->tiling_info, + &plane_info->plane_size, + &plane_info->dcc, address, +- tmz_surface, force_disable_dcc); ++ tmz_surface); + if (ret) + return ret; + +@@ -5651,7 +5650,6 @@ static int fill_dc_plane_attributes(stru + struct dc_scaling_info scaling_info; + struct dc_plane_info plane_info; + int ret; +- bool force_disable_dcc = false; + + ret = amdgpu_dm_plane_fill_dc_scaling_info(adev, plane_state, &scaling_info); + if (ret) +@@ -5662,13 +5660,11 @@ static int fill_dc_plane_attributes(stru + dc_plane_state->clip_rect = scaling_info.clip_rect; + dc_plane_state->scaling_quality = scaling_info.scaling_quality; + +- force_disable_dcc = adev->asic_type == CHIP_RAVEN && adev->in_suspend; + ret = fill_dc_plane_info_and_addr(adev, plane_state, + afb->tiling_flags, + &plane_info, + &dc_plane_state->address, +- afb->tmz_surface, +- force_disable_dcc); ++ afb->tmz_surface); + if (ret) + return ret; + +@@ -9076,7 +9072,7 @@ static void amdgpu_dm_commit_planes(stru + afb->tiling_flags, + &bundle->plane_infos[planes_count], + &bundle->flip_addrs[planes_count].address, +- afb->tmz_surface, false); ++ afb->tmz_surface); + + drm_dbg_state(state->dev, "plane: id=%d dcc_en=%d\n", + new_plane_state->plane->index, +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +@@ -309,8 +309,7 @@ static int amdgpu_dm_plane_fill_gfx9_pla + const struct plane_size *plane_size, + union dc_tiling_info *tiling_info, + struct dc_plane_dcc_param *dcc, +- struct dc_plane_address *address, +- const bool force_disable_dcc) ++ struct dc_plane_address *address) + { + const uint64_t modifier = afb->base.modifier; + int ret = 0; +@@ -318,7 +317,7 @@ static int amdgpu_dm_plane_fill_gfx9_pla + amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier(adev, tiling_info, modifier); + tiling_info->gfx9.swizzle = amdgpu_dm_plane_modifier_gfx9_swizzle_mode(modifier); + +- if (amdgpu_dm_plane_modifier_has_dcc(modifier) && !force_disable_dcc) { ++ if (amdgpu_dm_plane_modifier_has_dcc(modifier)) { + uint64_t dcc_address = afb->address + afb->base.offsets[1]; + bool independent_64b_blks = AMD_FMT_MOD_GET(DCC_INDEPENDENT_64B, modifier); + bool independent_128b_blks = AMD_FMT_MOD_GET(DCC_INDEPENDENT_128B, modifier); +@@ -360,8 +359,7 @@ static int amdgpu_dm_plane_fill_gfx12_pl + const struct plane_size *plane_size, + union dc_tiling_info *tiling_info, + struct dc_plane_dcc_param *dcc, +- struct dc_plane_address *address, +- const bool force_disable_dcc) ++ struct dc_plane_address *address) + { + const uint64_t modifier = afb->base.modifier; + int ret = 0; +@@ -371,7 +369,7 @@ static int amdgpu_dm_plane_fill_gfx12_pl + + tiling_info->gfx9.swizzle = amdgpu_dm_plane_modifier_gfx9_swizzle_mode(modifier); + +- if (amdgpu_dm_plane_modifier_has_dcc(modifier) && !force_disable_dcc) { ++ if (amdgpu_dm_plane_modifier_has_dcc(modifier)) { + int max_compressed_block = AMD_FMT_MOD_GET(DCC_MAX_COMPRESSED_BLOCK, modifier); + + dcc->enable = 1; +@@ -839,8 +837,7 @@ int amdgpu_dm_plane_fill_plane_buffer_at + struct plane_size *plane_size, + struct dc_plane_dcc_param *dcc, + struct dc_plane_address *address, +- bool tmz_surface, +- bool force_disable_dcc) ++ bool tmz_surface) + { + const struct drm_framebuffer *fb = &afb->base; + int ret; +@@ -900,16 +897,14 @@ int amdgpu_dm_plane_fill_plane_buffer_at + ret = amdgpu_dm_plane_fill_gfx12_plane_attributes_from_modifiers(adev, afb, format, + rotation, plane_size, + tiling_info, dcc, +- address, +- force_disable_dcc); ++ address); + if (ret) + return ret; + } else if (adev->family >= AMDGPU_FAMILY_AI) { + ret = amdgpu_dm_plane_fill_gfx9_plane_attributes_from_modifiers(adev, afb, format, + rotation, plane_size, + tiling_info, dcc, +- address, +- force_disable_dcc); ++ address); + if (ret) + return ret; + } else { +@@ -1000,14 +995,13 @@ static int amdgpu_dm_plane_helper_prepar + dm_plane_state_old->dc_state != dm_plane_state_new->dc_state) { + struct dc_plane_state *plane_state = + dm_plane_state_new->dc_state; +- bool force_disable_dcc = !plane_state->dcc.enable; + + amdgpu_dm_plane_fill_plane_buffer_attributes( + adev, afb, plane_state->format, plane_state->rotation, + afb->tiling_flags, + &plane_state->tiling_info, &plane_state->plane_size, + &plane_state->dcc, &plane_state->address, +- afb->tmz_surface, force_disable_dcc); ++ afb->tmz_surface); + } + + return 0; +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h +@@ -51,8 +51,7 @@ int amdgpu_dm_plane_fill_plane_buffer_at + struct plane_size *plane_size, + struct dc_plane_dcc_param *dcc, + struct dc_plane_address *address, +- bool tmz_surface, +- bool force_disable_dcc); ++ bool tmz_surface); + + int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm, + struct drm_plane *plane, diff --git a/queue-6.13/series b/queue-6.13/series index 7e395b0b24..b6c0a6315e 100644 --- a/queue-6.13/series +++ b/queue-6.13/series @@ -437,3 +437,7 @@ spi-atmel-qspi-memory-barriers-after-memory-mapped-i-o.patch x86-mm-convert-unreachable-to-bug.patch md-md-linear-fix-a-null-vs-is_err-bug-in-linear_add.patch md-fix-linear_set_limits.patch +revert-drm-amd-display-fix-green-screen-issue-after-suspend.patch +wifi-rtw89-pci-disable-pcie-wake-bit-when-pcie-deinit.patch +fs-prepend-statmount.mnt_opts-string-with-security_sb_mnt_opts.patch +fs-fix-adding-security-options-to-statmount.mnt_opt.patch diff --git a/queue-6.13/wifi-rtw89-pci-disable-pcie-wake-bit-when-pcie-deinit.patch b/queue-6.13/wifi-rtw89-pci-disable-pcie-wake-bit-when-pcie-deinit.patch new file mode 100644 index 0000000000..1dbdb4edba --- /dev/null +++ b/queue-6.13/wifi-rtw89-pci-disable-pcie-wake-bit-when-pcie-deinit.patch @@ -0,0 +1,113 @@ +From 9c1df813e08832c3836c254bc8a2f83ff22dbc06 Mon Sep 17 00:00:00 2001 +From: Ping-Ke Shih +Date: Mon, 11 Nov 2024 14:38:35 +0800 +Subject: wifi: rtw89: pci: disable PCIE wake bit when PCIE deinit + +From: Ping-Ke Shih + +commit 9c1df813e08832c3836c254bc8a2f83ff22dbc06 upstream. + +The PCIE wake bit is to control PCIE wake signal to host. When PCIE is +going down, clear this bit to prevent waking up host unexpectedly. + +Signed-off-by: Ping-Ke Shih +Link: https://patch.msgid.link/20241111063835.15454-1-pkshih@realtek.com +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/wireless/realtek/rtw89/pci.c | 16 +++++++++++++--- + drivers/net/wireless/realtek/rtw89/pci.h | 9 +++++++++ + drivers/net/wireless/realtek/rtw89/pci_be.c | 1 + + 3 files changed, 23 insertions(+), 3 deletions(-) + +--- a/drivers/net/wireless/realtek/rtw89/pci.c ++++ b/drivers/net/wireless/realtek/rtw89/pci.c +@@ -2516,7 +2516,7 @@ static int rtw89_pci_dphy_delay(struct r + PCIE_DPHY_DLY_25US, PCIE_PHY_GEN1); + } + +-static void rtw89_pci_power_wake(struct rtw89_dev *rtwdev, bool pwr_up) ++static void rtw89_pci_power_wake_ax(struct rtw89_dev *rtwdev, bool pwr_up) + { + if (pwr_up) + rtw89_write32_set(rtwdev, R_AX_HCI_OPT_CTRL, BIT_WAKE_CTRL); +@@ -2825,6 +2825,8 @@ static int rtw89_pci_ops_deinit(struct r + { + const struct rtw89_pci_info *info = rtwdev->pci_info; + ++ rtw89_pci_power_wake(rtwdev, false); ++ + if (rtwdev->chip->chip_id == RTL8852A) { + /* ltr sw trigger */ + rtw89_write32_set(rtwdev, R_AX_LTR_CTRL_0, B_AX_APP_LTR_IDLE); +@@ -2867,7 +2869,7 @@ static int rtw89_pci_ops_mac_pre_init_ax + return ret; + } + +- rtw89_pci_power_wake(rtwdev, true); ++ rtw89_pci_power_wake_ax(rtwdev, true); + rtw89_pci_autoload_hang(rtwdev); + rtw89_pci_l12_vmain(rtwdev); + rtw89_pci_gen2_force_ib(rtwdev); +@@ -2912,6 +2914,13 @@ static int rtw89_pci_ops_mac_pre_init_ax + return 0; + } + ++static int rtw89_pci_ops_mac_pre_deinit_ax(struct rtw89_dev *rtwdev) ++{ ++ rtw89_pci_power_wake_ax(rtwdev, false); ++ ++ return 0; ++} ++ + int rtw89_pci_ltr_set(struct rtw89_dev *rtwdev, bool en) + { + u32 val; +@@ -4325,7 +4334,7 @@ const struct rtw89_pci_gen_def rtw89_pci + B_AX_RDU_INT}, + + .mac_pre_init = rtw89_pci_ops_mac_pre_init_ax, +- .mac_pre_deinit = NULL, ++ .mac_pre_deinit = rtw89_pci_ops_mac_pre_deinit_ax, + .mac_post_init = rtw89_pci_ops_mac_post_init_ax, + + .clr_idx_all = rtw89_pci_clr_idx_all_ax, +@@ -4343,6 +4352,7 @@ const struct rtw89_pci_gen_def rtw89_pci + .l1ss_set = rtw89_pci_l1ss_set_ax, + + .disable_eq = rtw89_pci_disable_eq_ax, ++ .power_wake = rtw89_pci_power_wake_ax, + }; + EXPORT_SYMBOL(rtw89_pci_gen_ax); + +--- a/drivers/net/wireless/realtek/rtw89/pci.h ++++ b/drivers/net/wireless/realtek/rtw89/pci.h +@@ -1290,6 +1290,7 @@ struct rtw89_pci_gen_def { + void (*l1ss_set)(struct rtw89_dev *rtwdev, bool enable); + + void (*disable_eq)(struct rtw89_dev *rtwdev); ++ void (*power_wake)(struct rtw89_dev *rtwdev, bool pwr_up); + }; + + #define RTW89_PCI_SSID(v, d, ssv, ssd, cust) \ +@@ -1805,4 +1806,12 @@ static inline void rtw89_pci_disable_eq( + gen_def->disable_eq(rtwdev); + } + ++static inline void rtw89_pci_power_wake(struct rtw89_dev *rtwdev, bool pwr_up) ++{ ++ const struct rtw89_pci_info *info = rtwdev->pci_info; ++ const struct rtw89_pci_gen_def *gen_def = info->gen_def; ++ ++ gen_def->power_wake(rtwdev, pwr_up); ++} ++ + #endif +--- a/drivers/net/wireless/realtek/rtw89/pci_be.c ++++ b/drivers/net/wireless/realtek/rtw89/pci_be.c +@@ -691,5 +691,6 @@ const struct rtw89_pci_gen_def rtw89_pci + .l1ss_set = rtw89_pci_l1ss_set_be, + + .disable_eq = rtw89_pci_disable_eq_be, ++ .power_wake = _patch_pcie_power_wake_be, + }; + EXPORT_SYMBOL(rtw89_pci_gen_be);