From: nobody <>
Date: Wed, 26 Apr 2006 16:02:41 +0000 (+0000)
Subject: This commit was manufactured by cvs2svn to create branch 'binutils-csl-
X-Git-Tag: binutils-csl-morpho-4_1-4~6
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=961c0e3bfb01b566eb6418703c7e4edfe7952c02;p=thirdparty%2Fbinutils-gdb.git

This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.

Cherrypick from master 2006-04-26 16:02:40 UTC Julian Brown <julian@codesourcery.com> '	* gas/testsuite/gas/arm/neon-const.s: New testcase. Neon floating-point':
    gas/testsuite/gas/arm/neon-const.d
    gas/testsuite/gas/arm/neon-const.s
    gas/testsuite/gas/mips/vxworks1.s
    gas/testsuite/gas/sparc/vxworks-pic.d
    gas/testsuite/gas/sparc/vxworks-pic.s
    ld/elf-hints-local.h
    ld/emulparams/elf32_sparc_vxworks.sh
    ld/emulparams/elf32ebmipvxworks.sh
    ld/emulparams/elf32elmipvxworks.sh
    ld/testsuite/ld-mips-elf/tls-hidden3.d
    ld/testsuite/ld-mips-elf/tls-hidden3.got
    ld/testsuite/ld-mips-elf/tls-hidden3.ld
    ld/testsuite/ld-mips-elf/tls-hidden3.r
    ld/testsuite/ld-mips-elf/tls-hidden3a.s
    ld/testsuite/ld-mips-elf/tls-hidden3b.s
    ld/testsuite/ld-mips-elf/tls-hidden4.got
    ld/testsuite/ld-mips-elf/tls-hidden4.r
    ld/testsuite/ld-mips-elf/tls-hidden4a.s
    ld/testsuite/ld-mips-elf/tls-hidden4b.s
    ld/testsuite/ld-mips-elf/vxworks1-lib.dd
    ld/testsuite/ld-mips-elf/vxworks1-lib.nd
    ld/testsuite/ld-mips-elf/vxworks1-lib.rd
    ld/testsuite/ld-mips-elf/vxworks1-lib.s
    ld/testsuite/ld-mips-elf/vxworks1-static.d
    ld/testsuite/ld-mips-elf/vxworks1.dd
    ld/testsuite/ld-mips-elf/vxworks1.ld
    ld/testsuite/ld-mips-elf/vxworks1.rd
    ld/testsuite/ld-mips-elf/vxworks1.s
    ld/testsuite/ld-mips-elf/vxworks2-static.sd
    ld/testsuite/ld-mips-elf/vxworks2.s
    ld/testsuite/ld-mips-elf/vxworks2.sd
    ld/testsuite/ld-sparc/vxworks1-lib.dd
    ld/testsuite/ld-sparc/vxworks1-lib.nd
    ld/testsuite/ld-sparc/vxworks1-lib.rd
    ld/testsuite/ld-sparc/vxworks1-lib.s
    ld/testsuite/ld-sparc/vxworks1-static.d
    ld/testsuite/ld-sparc/vxworks1.dd
    ld/testsuite/ld-sparc/vxworks1.ld
    ld/testsuite/ld-sparc/vxworks1.rd
    ld/testsuite/ld-sparc/vxworks1.s
    ld/testsuite/ld-sparc/vxworks2-static.sd
    ld/testsuite/ld-sparc/vxworks2.s
    ld/testsuite/ld-sparc/vxworks2.sd
---

diff --git a/gas/testsuite/gas/arm/neon-const.d b/gas/testsuite/gas/arm/neon-const.d
new file mode 100644
index 00000000000..a1bc97cf381
--- /dev/null
+++ b/gas/testsuite/gas/arm/neon-const.d
@@ -0,0 +1,265 @@
+# name: Neon floating-point constants
+# as: -mfpu=neon
+# objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0[0-9a-f]+ <[^>]+> f2800050 	vmov\.i32	q0, #0	; 0x00000000
+0[0-9a-f]+ <[^>]+> f2800f50 	vmov\.f32	q0, #2	; 0x40000000
+0[0-9a-f]+ <[^>]+> f2810f50 	vmov\.f32	q0, #4	; 0x40800000
+0[0-9a-f]+ <[^>]+> f2820f50 	vmov\.f32	q0, #8	; 0x41000000
+0[0-9a-f]+ <[^>]+> f2830f50 	vmov\.f32	q0, #16	; 0x41800000
+0[0-9a-f]+ <[^>]+> f2840f50 	vmov\.f32	q0, #0\.125	; 0x3e000000
+0[0-9a-f]+ <[^>]+> f2850f50 	vmov\.f32	q0, #0\.25	; 0x3e800000
+0[0-9a-f]+ <[^>]+> f2860f50 	vmov\.f32	q0, #0\.5	; 0x3f000000
+0[0-9a-f]+ <[^>]+> f2870f50 	vmov\.f32	q0, #1	; 0x3f800000
+0[0-9a-f]+ <[^>]+> f2800f51 	vmov\.f32	q0, #2\.125	; 0x40080000
+0[0-9a-f]+ <[^>]+> f2810f51 	vmov\.f32	q0, #4\.25	; 0x40880000
+0[0-9a-f]+ <[^>]+> f2820f51 	vmov\.f32	q0, #8\.5	; 0x41080000
+0[0-9a-f]+ <[^>]+> f2830f51 	vmov\.f32	q0, #17	; 0x41880000
+0[0-9a-f]+ <[^>]+> f2840f51 	vmov\.f32	q0, #0\.1328125	; 0x3e080000
+0[0-9a-f]+ <[^>]+> f2850f51 	vmov\.f32	q0, #0\.265625	; 0x3e880000
+0[0-9a-f]+ <[^>]+> f2860f51 	vmov\.f32	q0, #0\.53125	; 0x3f080000
+0[0-9a-f]+ <[^>]+> f2870f51 	vmov\.f32	q0, #1\.0625	; 0x3f880000
+0[0-9a-f]+ <[^>]+> f2800f52 	vmov\.f32	q0, #2\.25	; 0x40100000
+0[0-9a-f]+ <[^>]+> f2810f52 	vmov\.f32	q0, #4\.5	; 0x40900000
+0[0-9a-f]+ <[^>]+> f2820f52 	vmov\.f32	q0, #9	; 0x41100000
+0[0-9a-f]+ <[^>]+> f2830f52 	vmov\.f32	q0, #18	; 0x41900000
+0[0-9a-f]+ <[^>]+> f2840f52 	vmov\.f32	q0, #0\.140625	; 0x3e100000
+0[0-9a-f]+ <[^>]+> f2850f52 	vmov\.f32	q0, #0\.28125	; 0x3e900000
+0[0-9a-f]+ <[^>]+> f2860f52 	vmov\.f32	q0, #0\.5625	; 0x3f100000
+0[0-9a-f]+ <[^>]+> f2870f52 	vmov\.f32	q0, #1\.125	; 0x3f900000
+0[0-9a-f]+ <[^>]+> f2800f53 	vmov\.f32	q0, #2\.375	; 0x40180000
+0[0-9a-f]+ <[^>]+> f2810f53 	vmov\.f32	q0, #4\.75	; 0x40980000
+0[0-9a-f]+ <[^>]+> f2820f53 	vmov\.f32	q0, #9\.5	; 0x41180000
+0[0-9a-f]+ <[^>]+> f2830f53 	vmov\.f32	q0, #19	; 0x41980000
+0[0-9a-f]+ <[^>]+> f2840f53 	vmov\.f32	q0, #0\.1484375	; 0x3e180000
+0[0-9a-f]+ <[^>]+> f2850f53 	vmov\.f32	q0, #0\.296875	; 0x3e980000
+0[0-9a-f]+ <[^>]+> f2860f53 	vmov\.f32	q0, #0\.59375	; 0x3f180000
+0[0-9a-f]+ <[^>]+> f2870f53 	vmov\.f32	q0, #1\.1875	; 0x3f980000
+0[0-9a-f]+ <[^>]+> f2800f54 	vmov\.f32	q0, #2\.5	; 0x40200000
+0[0-9a-f]+ <[^>]+> f2810f54 	vmov\.f32	q0, #5	; 0x40a00000
+0[0-9a-f]+ <[^>]+> f2820f54 	vmov\.f32	q0, #10	; 0x41200000
+0[0-9a-f]+ <[^>]+> f2830f54 	vmov\.f32	q0, #20	; 0x41a00000
+0[0-9a-f]+ <[^>]+> f2840f54 	vmov\.f32	q0, #0\.15625	; 0x3e200000
+0[0-9a-f]+ <[^>]+> f2850f54 	vmov\.f32	q0, #0\.3125	; 0x3ea00000
+0[0-9a-f]+ <[^>]+> f2860f54 	vmov\.f32	q0, #0\.625	; 0x3f200000
+0[0-9a-f]+ <[^>]+> f2870f54 	vmov\.f32	q0, #1\.25	; 0x3fa00000
+0[0-9a-f]+ <[^>]+> f2800f55 	vmov\.f32	q0, #2\.625	; 0x40280000
+0[0-9a-f]+ <[^>]+> f2810f55 	vmov\.f32	q0, #5\.25	; 0x40a80000
+0[0-9a-f]+ <[^>]+> f2820f55 	vmov\.f32	q0, #10\.5	; 0x41280000
+0[0-9a-f]+ <[^>]+> f2830f55 	vmov\.f32	q0, #21	; 0x41a80000
+0[0-9a-f]+ <[^>]+> f2840f55 	vmov\.f32	q0, #0\.1640625	; 0x3e280000
+0[0-9a-f]+ <[^>]+> f2850f55 	vmov\.f32	q0, #0\.328125	; 0x3ea80000
+0[0-9a-f]+ <[^>]+> f2860f55 	vmov\.f32	q0, #0\.65625	; 0x3f280000
+0[0-9a-f]+ <[^>]+> f2870f55 	vmov\.f32	q0, #1\.3125	; 0x3fa80000
+0[0-9a-f]+ <[^>]+> f2800f56 	vmov\.f32	q0, #2\.75	; 0x40300000
+0[0-9a-f]+ <[^>]+> f2810f56 	vmov\.f32	q0, #5\.5	; 0x40b00000
+0[0-9a-f]+ <[^>]+> f2820f56 	vmov\.f32	q0, #11	; 0x41300000
+0[0-9a-f]+ <[^>]+> f2830f56 	vmov\.f32	q0, #22	; 0x41b00000
+0[0-9a-f]+ <[^>]+> f2840f56 	vmov\.f32	q0, #0\.171875	; 0x3e300000
+0[0-9a-f]+ <[^>]+> f2850f56 	vmov\.f32	q0, #0\.34375	; 0x3eb00000
+0[0-9a-f]+ <[^>]+> f2860f56 	vmov\.f32	q0, #0\.6875	; 0x3f300000
+0[0-9a-f]+ <[^>]+> f2870f56 	vmov\.f32	q0, #1\.375	; 0x3fb00000
+0[0-9a-f]+ <[^>]+> f2800f57 	vmov\.f32	q0, #2\.875	; 0x40380000
+0[0-9a-f]+ <[^>]+> f2810f57 	vmov\.f32	q0, #5\.75	; 0x40b80000
+0[0-9a-f]+ <[^>]+> f2820f57 	vmov\.f32	q0, #11\.5	; 0x41380000
+0[0-9a-f]+ <[^>]+> f2830f57 	vmov\.f32	q0, #23	; 0x41b80000
+0[0-9a-f]+ <[^>]+> f2840f57 	vmov\.f32	q0, #0\.1796875	; 0x3e380000
+0[0-9a-f]+ <[^>]+> f2850f57 	vmov\.f32	q0, #0\.359375	; 0x3eb80000
+0[0-9a-f]+ <[^>]+> f2860f57 	vmov\.f32	q0, #0\.71875	; 0x3f380000
+0[0-9a-f]+ <[^>]+> f2870f57 	vmov\.f32	q0, #1\.4375	; 0x3fb80000
+0[0-9a-f]+ <[^>]+> f2800f58 	vmov\.f32	q0, #3	; 0x40400000
+0[0-9a-f]+ <[^>]+> f2810f58 	vmov\.f32	q0, #6	; 0x40c00000
+0[0-9a-f]+ <[^>]+> f2820f58 	vmov\.f32	q0, #12	; 0x41400000
+0[0-9a-f]+ <[^>]+> f2830f58 	vmov\.f32	q0, #24	; 0x41c00000
+0[0-9a-f]+ <[^>]+> f2840f58 	vmov\.f32	q0, #0\.1875	; 0x3e400000
+0[0-9a-f]+ <[^>]+> f2850f58 	vmov\.f32	q0, #0\.375	; 0x3ec00000
+0[0-9a-f]+ <[^>]+> f2860f58 	vmov\.f32	q0, #0\.75	; 0x3f400000
+0[0-9a-f]+ <[^>]+> f2870f58 	vmov\.f32	q0, #1\.5	; 0x3fc00000
+0[0-9a-f]+ <[^>]+> f2800f59 	vmov\.f32	q0, #3\.125	; 0x40480000
+0[0-9a-f]+ <[^>]+> f2810f59 	vmov\.f32	q0, #6\.25	; 0x40c80000
+0[0-9a-f]+ <[^>]+> f2820f59 	vmov\.f32	q0, #12\.5	; 0x41480000
+0[0-9a-f]+ <[^>]+> f2830f59 	vmov\.f32	q0, #25	; 0x41c80000
+0[0-9a-f]+ <[^>]+> f2840f59 	vmov\.f32	q0, #0\.1953125	; 0x3e480000
+0[0-9a-f]+ <[^>]+> f2850f59 	vmov\.f32	q0, #0\.390625	; 0x3ec80000
+0[0-9a-f]+ <[^>]+> f2860f59 	vmov\.f32	q0, #0\.78125	; 0x3f480000
+0[0-9a-f]+ <[^>]+> f2870f59 	vmov\.f32	q0, #1\.5625	; 0x3fc80000
+0[0-9a-f]+ <[^>]+> f2800f5a 	vmov\.f32	q0, #3\.25	; 0x40500000
+0[0-9a-f]+ <[^>]+> f2810f5a 	vmov\.f32	q0, #6\.5	; 0x40d00000
+0[0-9a-f]+ <[^>]+> f2820f5a 	vmov\.f32	q0, #13	; 0x41500000
+0[0-9a-f]+ <[^>]+> f2830f5a 	vmov\.f32	q0, #26	; 0x41d00000
+0[0-9a-f]+ <[^>]+> f2840f5a 	vmov\.f32	q0, #0\.203125	; 0x3e500000
+0[0-9a-f]+ <[^>]+> f2850f5a 	vmov\.f32	q0, #0\.40625	; 0x3ed00000
+0[0-9a-f]+ <[^>]+> f2860f5a 	vmov\.f32	q0, #0\.8125	; 0x3f500000
+0[0-9a-f]+ <[^>]+> f2870f5a 	vmov\.f32	q0, #1\.625	; 0x3fd00000
+0[0-9a-f]+ <[^>]+> f2800f5b 	vmov\.f32	q0, #3\.375	; 0x40580000
+0[0-9a-f]+ <[^>]+> f2810f5b 	vmov\.f32	q0, #6\.75	; 0x40d80000
+0[0-9a-f]+ <[^>]+> f2820f5b 	vmov\.f32	q0, #13\.5	; 0x41580000
+0[0-9a-f]+ <[^>]+> f2830f5b 	vmov\.f32	q0, #27	; 0x41d80000
+0[0-9a-f]+ <[^>]+> f2840f5b 	vmov\.f32	q0, #0\.2109375	; 0x3e580000
+0[0-9a-f]+ <[^>]+> f2850f5b 	vmov\.f32	q0, #0\.421875	; 0x3ed80000
+0[0-9a-f]+ <[^>]+> f2860f5b 	vmov\.f32	q0, #0\.84375	; 0x3f580000
+0[0-9a-f]+ <[^>]+> f2870f5b 	vmov\.f32	q0, #1\.6875	; 0x3fd80000
+0[0-9a-f]+ <[^>]+> f2800f5c 	vmov\.f32	q0, #3\.5	; 0x40600000
+0[0-9a-f]+ <[^>]+> f2810f5c 	vmov\.f32	q0, #7	; 0x40e00000
+0[0-9a-f]+ <[^>]+> f2820f5c 	vmov\.f32	q0, #14	; 0x41600000
+0[0-9a-f]+ <[^>]+> f2830f5c 	vmov\.f32	q0, #28	; 0x41e00000
+0[0-9a-f]+ <[^>]+> f2840f5c 	vmov\.f32	q0, #0\.21875	; 0x3e600000
+0[0-9a-f]+ <[^>]+> f2850f5c 	vmov\.f32	q0, #0\.4375	; 0x3ee00000
+0[0-9a-f]+ <[^>]+> f2860f5c 	vmov\.f32	q0, #0\.875	; 0x3f600000
+0[0-9a-f]+ <[^>]+> f2870f5c 	vmov\.f32	q0, #1\.75	; 0x3fe00000
+0[0-9a-f]+ <[^>]+> f2800f5d 	vmov\.f32	q0, #3\.625	; 0x40680000
+0[0-9a-f]+ <[^>]+> f2810f5d 	vmov\.f32	q0, #7\.25	; 0x40e80000
+0[0-9a-f]+ <[^>]+> f2820f5d 	vmov\.f32	q0, #14\.5	; 0x41680000
+0[0-9a-f]+ <[^>]+> f2830f5d 	vmov\.f32	q0, #29	; 0x41e80000
+0[0-9a-f]+ <[^>]+> f2840f5d 	vmov\.f32	q0, #0\.2265625	; 0x3e680000
+0[0-9a-f]+ <[^>]+> f2850f5d 	vmov\.f32	q0, #0\.453125	; 0x3ee80000
+0[0-9a-f]+ <[^>]+> f2860f5d 	vmov\.f32	q0, #0\.90625	; 0x3f680000
+0[0-9a-f]+ <[^>]+> f2870f5d 	vmov\.f32	q0, #1\.8125	; 0x3fe80000
+0[0-9a-f]+ <[^>]+> f2800f5e 	vmov\.f32	q0, #3\.75	; 0x40700000
+0[0-9a-f]+ <[^>]+> f2810f5e 	vmov\.f32	q0, #7\.5	; 0x40f00000
+0[0-9a-f]+ <[^>]+> f2820f5e 	vmov\.f32	q0, #15	; 0x41700000
+0[0-9a-f]+ <[^>]+> f2830f5e 	vmov\.f32	q0, #30	; 0x41f00000
+0[0-9a-f]+ <[^>]+> f2840f5e 	vmov\.f32	q0, #0\.234375	; 0x3e700000
+0[0-9a-f]+ <[^>]+> f2850f5e 	vmov\.f32	q0, #0\.46875	; 0x3ef00000
+0[0-9a-f]+ <[^>]+> f2860f5e 	vmov\.f32	q0, #0\.9375	; 0x3f700000
+0[0-9a-f]+ <[^>]+> f2870f5e 	vmov\.f32	q0, #1\.875	; 0x3ff00000
+0[0-9a-f]+ <[^>]+> f2800f5f 	vmov\.f32	q0, #3\.875	; 0x40780000
+0[0-9a-f]+ <[^>]+> f2810f5f 	vmov\.f32	q0, #7\.75	; 0x40f80000
+0[0-9a-f]+ <[^>]+> f2820f5f 	vmov\.f32	q0, #15\.5	; 0x41780000
+0[0-9a-f]+ <[^>]+> f2830f5f 	vmov\.f32	q0, #31	; 0x41f80000
+0[0-9a-f]+ <[^>]+> f2840f5f 	vmov\.f32	q0, #0\.2421875	; 0x3e780000
+0[0-9a-f]+ <[^>]+> f2850f5f 	vmov\.f32	q0, #0\.484375	; 0x3ef80000
+0[0-9a-f]+ <[^>]+> f2860f5f 	vmov\.f32	q0, #0\.96875	; 0x3f780000
+0[0-9a-f]+ <[^>]+> f2870f5f 	vmov\.f32	q0, #1\.9375	; 0x3ff80000
+0[0-9a-f]+ <[^>]+> f3800650 	vmov\.i32	q0, #-2147483648	; 0x80000000
+0[0-9a-f]+ <[^>]+> f3800f50 	vmov\.f32	q0, #-2	; 0xc0000000
+0[0-9a-f]+ <[^>]+> f3810f50 	vmov\.f32	q0, #-4	; 0xc0800000
+0[0-9a-f]+ <[^>]+> f3820f50 	vmov\.f32	q0, #-8	; 0xc1000000
+0[0-9a-f]+ <[^>]+> f3830f50 	vmov\.f32	q0, #-16	; 0xc1800000
+0[0-9a-f]+ <[^>]+> f3840f50 	vmov\.f32	q0, #-0\.125	; 0xbe000000
+0[0-9a-f]+ <[^>]+> f3850f50 	vmov\.f32	q0, #-0\.25	; 0xbe800000
+0[0-9a-f]+ <[^>]+> f3860f50 	vmov\.f32	q0, #-0\.5	; 0xbf000000
+0[0-9a-f]+ <[^>]+> f3870f50 	vmov\.f32	q0, #-1	; 0xbf800000
+0[0-9a-f]+ <[^>]+> f3800f51 	vmov\.f32	q0, #-2\.125	; 0xc0080000
+0[0-9a-f]+ <[^>]+> f3810f51 	vmov\.f32	q0, #-4\.25	; 0xc0880000
+0[0-9a-f]+ <[^>]+> f3820f51 	vmov\.f32	q0, #-8\.5	; 0xc1080000
+0[0-9a-f]+ <[^>]+> f3830f51 	vmov\.f32	q0, #-17	; 0xc1880000
+0[0-9a-f]+ <[^>]+> f3840f51 	vmov\.f32	q0, #-0\.1328125	; 0xbe080000
+0[0-9a-f]+ <[^>]+> f3850f51 	vmov\.f32	q0, #-0\.265625	; 0xbe880000
+0[0-9a-f]+ <[^>]+> f3860f51 	vmov\.f32	q0, #-0\.53125	; 0xbf080000
+0[0-9a-f]+ <[^>]+> f3870f51 	vmov\.f32	q0, #-1\.0625	; 0xbf880000
+0[0-9a-f]+ <[^>]+> f3800f52 	vmov\.f32	q0, #-2\.25	; 0xc0100000
+0[0-9a-f]+ <[^>]+> f3810f52 	vmov\.f32	q0, #-4\.5	; 0xc0900000
+0[0-9a-f]+ <[^>]+> f3820f52 	vmov\.f32	q0, #-9	; 0xc1100000
+0[0-9a-f]+ <[^>]+> f3830f52 	vmov\.f32	q0, #-18	; 0xc1900000
+0[0-9a-f]+ <[^>]+> f3840f52 	vmov\.f32	q0, #-0\.140625	; 0xbe100000
+0[0-9a-f]+ <[^>]+> f3850f52 	vmov\.f32	q0, #-0\.28125	; 0xbe900000
+0[0-9a-f]+ <[^>]+> f3860f52 	vmov\.f32	q0, #-0\.5625	; 0xbf100000
+0[0-9a-f]+ <[^>]+> f3870f52 	vmov\.f32	q0, #-1\.125	; 0xbf900000
+0[0-9a-f]+ <[^>]+> f3800f53 	vmov\.f32	q0, #-2\.375	; 0xc0180000
+0[0-9a-f]+ <[^>]+> f3810f53 	vmov\.f32	q0, #-4\.75	; 0xc0980000
+0[0-9a-f]+ <[^>]+> f3820f53 	vmov\.f32	q0, #-9\.5	; 0xc1180000
+0[0-9a-f]+ <[^>]+> f3830f53 	vmov\.f32	q0, #-19	; 0xc1980000
+0[0-9a-f]+ <[^>]+> f3840f53 	vmov\.f32	q0, #-0\.1484375	; 0xbe180000
+0[0-9a-f]+ <[^>]+> f3850f53 	vmov\.f32	q0, #-0\.296875	; 0xbe980000
+0[0-9a-f]+ <[^>]+> f3860f53 	vmov\.f32	q0, #-0\.59375	; 0xbf180000
+0[0-9a-f]+ <[^>]+> f3870f53 	vmov\.f32	q0, #-1\.1875	; 0xbf980000
+0[0-9a-f]+ <[^>]+> f3800f54 	vmov\.f32	q0, #-2\.5	; 0xc0200000
+0[0-9a-f]+ <[^>]+> f3810f54 	vmov\.f32	q0, #-5	; 0xc0a00000
+0[0-9a-f]+ <[^>]+> f3820f54 	vmov\.f32	q0, #-10	; 0xc1200000
+0[0-9a-f]+ <[^>]+> f3830f54 	vmov\.f32	q0, #-20	; 0xc1a00000
+0[0-9a-f]+ <[^>]+> f3840f54 	vmov\.f32	q0, #-0\.15625	; 0xbe200000
+0[0-9a-f]+ <[^>]+> f3850f54 	vmov\.f32	q0, #-0\.3125	; 0xbea00000
+0[0-9a-f]+ <[^>]+> f3860f54 	vmov\.f32	q0, #-0\.625	; 0xbf200000
+0[0-9a-f]+ <[^>]+> f3870f54 	vmov\.f32	q0, #-1\.25	; 0xbfa00000
+0[0-9a-f]+ <[^>]+> f3800f55 	vmov\.f32	q0, #-2\.625	; 0xc0280000
+0[0-9a-f]+ <[^>]+> f3810f55 	vmov\.f32	q0, #-5\.25	; 0xc0a80000
+0[0-9a-f]+ <[^>]+> f3820f55 	vmov\.f32	q0, #-10\.5	; 0xc1280000
+0[0-9a-f]+ <[^>]+> f3830f55 	vmov\.f32	q0, #-21	; 0xc1a80000
+0[0-9a-f]+ <[^>]+> f3840f55 	vmov\.f32	q0, #-0\.1640625	; 0xbe280000
+0[0-9a-f]+ <[^>]+> f3850f55 	vmov\.f32	q0, #-0\.328125	; 0xbea80000
+0[0-9a-f]+ <[^>]+> f3860f55 	vmov\.f32	q0, #-0\.65625	; 0xbf280000
+0[0-9a-f]+ <[^>]+> f3870f55 	vmov\.f32	q0, #-1\.3125	; 0xbfa80000
+0[0-9a-f]+ <[^>]+> f3800f56 	vmov\.f32	q0, #-2\.75	; 0xc0300000
+0[0-9a-f]+ <[^>]+> f3810f56 	vmov\.f32	q0, #-5\.5	; 0xc0b00000
+0[0-9a-f]+ <[^>]+> f3820f56 	vmov\.f32	q0, #-11	; 0xc1300000
+0[0-9a-f]+ <[^>]+> f3830f56 	vmov\.f32	q0, #-22	; 0xc1b00000
+0[0-9a-f]+ <[^>]+> f3840f56 	vmov\.f32	q0, #-0\.171875	; 0xbe300000
+0[0-9a-f]+ <[^>]+> f3850f56 	vmov\.f32	q0, #-0\.34375	; 0xbeb00000
+0[0-9a-f]+ <[^>]+> f3860f56 	vmov\.f32	q0, #-0\.6875	; 0xbf300000
+0[0-9a-f]+ <[^>]+> f3870f56 	vmov\.f32	q0, #-1\.375	; 0xbfb00000
+0[0-9a-f]+ <[^>]+> f3800f57 	vmov\.f32	q0, #-2\.875	; 0xc0380000
+0[0-9a-f]+ <[^>]+> f3810f57 	vmov\.f32	q0, #-5\.75	; 0xc0b80000
+0[0-9a-f]+ <[^>]+> f3820f57 	vmov\.f32	q0, #-11\.5	; 0xc1380000
+0[0-9a-f]+ <[^>]+> f3830f57 	vmov\.f32	q0, #-23	; 0xc1b80000
+0[0-9a-f]+ <[^>]+> f3840f57 	vmov\.f32	q0, #-0\.1796875	; 0xbe380000
+0[0-9a-f]+ <[^>]+> f3850f57 	vmov\.f32	q0, #-0\.359375	; 0xbeb80000
+0[0-9a-f]+ <[^>]+> f3860f57 	vmov\.f32	q0, #-0\.71875	; 0xbf380000
+0[0-9a-f]+ <[^>]+> f3870f57 	vmov\.f32	q0, #-1\.4375	; 0xbfb80000
+0[0-9a-f]+ <[^>]+> f3800f58 	vmov\.f32	q0, #-3	; 0xc0400000
+0[0-9a-f]+ <[^>]+> f3810f58 	vmov\.f32	q0, #-6	; 0xc0c00000
+0[0-9a-f]+ <[^>]+> f3820f58 	vmov\.f32	q0, #-12	; 0xc1400000
+0[0-9a-f]+ <[^>]+> f3830f58 	vmov\.f32	q0, #-24	; 0xc1c00000
+0[0-9a-f]+ <[^>]+> f3840f58 	vmov\.f32	q0, #-0\.1875	; 0xbe400000
+0[0-9a-f]+ <[^>]+> f3850f58 	vmov\.f32	q0, #-0\.375	; 0xbec00000
+0[0-9a-f]+ <[^>]+> f3860f58 	vmov\.f32	q0, #-0\.75	; 0xbf400000
+0[0-9a-f]+ <[^>]+> f3870f58 	vmov\.f32	q0, #-1\.5	; 0xbfc00000
+0[0-9a-f]+ <[^>]+> f3800f59 	vmov\.f32	q0, #-3\.125	; 0xc0480000
+0[0-9a-f]+ <[^>]+> f3810f59 	vmov\.f32	q0, #-6\.25	; 0xc0c80000
+0[0-9a-f]+ <[^>]+> f3820f59 	vmov\.f32	q0, #-12\.5	; 0xc1480000
+0[0-9a-f]+ <[^>]+> f3830f59 	vmov\.f32	q0, #-25	; 0xc1c80000
+0[0-9a-f]+ <[^>]+> f3840f59 	vmov\.f32	q0, #-0\.1953125	; 0xbe480000
+0[0-9a-f]+ <[^>]+> f3850f59 	vmov\.f32	q0, #-0\.390625	; 0xbec80000
+0[0-9a-f]+ <[^>]+> f3860f59 	vmov\.f32	q0, #-0\.78125	; 0xbf480000
+0[0-9a-f]+ <[^>]+> f3870f59 	vmov\.f32	q0, #-1\.5625	; 0xbfc80000
+0[0-9a-f]+ <[^>]+> f3800f5a 	vmov\.f32	q0, #-3\.25	; 0xc0500000
+0[0-9a-f]+ <[^>]+> f3810f5a 	vmov\.f32	q0, #-6\.5	; 0xc0d00000
+0[0-9a-f]+ <[^>]+> f3820f5a 	vmov\.f32	q0, #-13	; 0xc1500000
+0[0-9a-f]+ <[^>]+> f3830f5a 	vmov\.f32	q0, #-26	; 0xc1d00000
+0[0-9a-f]+ <[^>]+> f3840f5a 	vmov\.f32	q0, #-0\.203125	; 0xbe500000
+0[0-9a-f]+ <[^>]+> f3850f5a 	vmov\.f32	q0, #-0\.40625	; 0xbed00000
+0[0-9a-f]+ <[^>]+> f3860f5a 	vmov\.f32	q0, #-0\.8125	; 0xbf500000
+0[0-9a-f]+ <[^>]+> f3870f5a 	vmov\.f32	q0, #-1\.625	; 0xbfd00000
+0[0-9a-f]+ <[^>]+> f3800f5b 	vmov\.f32	q0, #-3\.375	; 0xc0580000
+0[0-9a-f]+ <[^>]+> f3810f5b 	vmov\.f32	q0, #-6\.75	; 0xc0d80000
+0[0-9a-f]+ <[^>]+> f3820f5b 	vmov\.f32	q0, #-13\.5	; 0xc1580000
+0[0-9a-f]+ <[^>]+> f3830f5b 	vmov\.f32	q0, #-27	; 0xc1d80000
+0[0-9a-f]+ <[^>]+> f3840f5b 	vmov\.f32	q0, #-0\.2109375	; 0xbe580000
+0[0-9a-f]+ <[^>]+> f3850f5b 	vmov\.f32	q0, #-0\.421875	; 0xbed80000
+0[0-9a-f]+ <[^>]+> f3860f5b 	vmov\.f32	q0, #-0\.84375	; 0xbf580000
+0[0-9a-f]+ <[^>]+> f3870f5b 	vmov\.f32	q0, #-1\.6875	; 0xbfd80000
+0[0-9a-f]+ <[^>]+> f3800f5c 	vmov\.f32	q0, #-3\.5	; 0xc0600000
+0[0-9a-f]+ <[^>]+> f3810f5c 	vmov\.f32	q0, #-7	; 0xc0e00000
+0[0-9a-f]+ <[^>]+> f3820f5c 	vmov\.f32	q0, #-14	; 0xc1600000
+0[0-9a-f]+ <[^>]+> f3830f5c 	vmov\.f32	q0, #-28	; 0xc1e00000
+0[0-9a-f]+ <[^>]+> f3840f5c 	vmov\.f32	q0, #-0\.21875	; 0xbe600000
+0[0-9a-f]+ <[^>]+> f3850f5c 	vmov\.f32	q0, #-0\.4375	; 0xbee00000
+0[0-9a-f]+ <[^>]+> f3860f5c 	vmov\.f32	q0, #-0\.875	; 0xbf600000
+0[0-9a-f]+ <[^>]+> f3870f5c 	vmov\.f32	q0, #-1\.75	; 0xbfe00000
+0[0-9a-f]+ <[^>]+> f3800f5d 	vmov\.f32	q0, #-3\.625	; 0xc0680000
+0[0-9a-f]+ <[^>]+> f3810f5d 	vmov\.f32	q0, #-7\.25	; 0xc0e80000
+0[0-9a-f]+ <[^>]+> f3820f5d 	vmov\.f32	q0, #-14\.5	; 0xc1680000
+0[0-9a-f]+ <[^>]+> f3830f5d 	vmov\.f32	q0, #-29	; 0xc1e80000
+0[0-9a-f]+ <[^>]+> f3840f5d 	vmov\.f32	q0, #-0\.2265625	; 0xbe680000
+0[0-9a-f]+ <[^>]+> f3850f5d 	vmov\.f32	q0, #-0\.453125	; 0xbee80000
+0[0-9a-f]+ <[^>]+> f3860f5d 	vmov\.f32	q0, #-0\.90625	; 0xbf680000
+0[0-9a-f]+ <[^>]+> f3870f5d 	vmov\.f32	q0, #-1\.8125	; 0xbfe80000
+0[0-9a-f]+ <[^>]+> f3800f5e 	vmov\.f32	q0, #-3\.75	; 0xc0700000
+0[0-9a-f]+ <[^>]+> f3810f5e 	vmov\.f32	q0, #-7\.5	; 0xc0f00000
+0[0-9a-f]+ <[^>]+> f3820f5e 	vmov\.f32	q0, #-15	; 0xc1700000
+0[0-9a-f]+ <[^>]+> f3830f5e 	vmov\.f32	q0, #-30	; 0xc1f00000
+0[0-9a-f]+ <[^>]+> f3840f5e 	vmov\.f32	q0, #-0\.234375	; 0xbe700000
+0[0-9a-f]+ <[^>]+> f3850f5e 	vmov\.f32	q0, #-0\.46875	; 0xbef00000
+0[0-9a-f]+ <[^>]+> f3860f5e 	vmov\.f32	q0, #-0\.9375	; 0xbf700000
+0[0-9a-f]+ <[^>]+> f3870f5e 	vmov\.f32	q0, #-1\.875	; 0xbff00000
+0[0-9a-f]+ <[^>]+> f3800f5f 	vmov\.f32	q0, #-3\.875	; 0xc0780000
+0[0-9a-f]+ <[^>]+> f3810f5f 	vmov\.f32	q0, #-7\.75	; 0xc0f80000
+0[0-9a-f]+ <[^>]+> f3820f5f 	vmov\.f32	q0, #-15\.5	; 0xc1780000
+0[0-9a-f]+ <[^>]+> f3830f5f 	vmov\.f32	q0, #-31	; 0xc1f80000
+0[0-9a-f]+ <[^>]+> f3840f5f 	vmov\.f32	q0, #-0\.2421875	; 0xbe780000
+0[0-9a-f]+ <[^>]+> f3850f5f 	vmov\.f32	q0, #-0\.484375	; 0xbef80000
+0[0-9a-f]+ <[^>]+> f3860f5f 	vmov\.f32	q0, #-0\.96875	; 0xbf780000
+0[0-9a-f]+ <[^>]+> f3870f5f 	vmov\.f32	q0, #-1\.9375	; 0xbff80000
diff --git a/gas/testsuite/gas/arm/neon-const.s b/gas/testsuite/gas/arm/neon-const.s
new file mode 100644
index 00000000000..3a5a312da8d
--- /dev/null
+++ b/gas/testsuite/gas/arm/neon-const.s
@@ -0,0 +1,297 @@
+@ test floating-point constant parsing.
+
+	.arm
+	.text
+	.syntax unified
+
+        vmov.f32 q0, 0
+
+	vmov.f32 q0, 2.0
+        vmov.f32 q0, 4.0
+        vmov.f32 q0, 8.0
+        vmov.f32 q0, 16.0
+        vmov.f32 q0, 0.125
+        vmov.f32 q0, 0.25
+        vmov.f32 q0, 0.5
+        vmov.f32 q0, 1.0
+
+        vmov.f32 q0, 2.125
+        vmov.f32 q0, 4.25
+        vmov.f32 q0, 8.5
+        vmov.f32 q0, 17.0
+        vmov.f32 q0, 0.1328125
+        vmov.f32 q0, 0.265625
+        vmov.f32 q0, 0.53125
+        vmov.f32 q0, 1.0625
+        
+        vmov.f32 q0, 2.25
+        vmov.f32 q0, 4.5
+        vmov.f32 q0, 9.0
+        vmov.f32 q0, 18.0
+        vmov.f32 q0, 0.140625
+        vmov.f32 q0, 0.28125
+        vmov.f32 q0, 0.5625
+        vmov.f32 q0, 1.125
+        
+        vmov.f32 q0, 2.375
+        vmov.f32 q0, 4.75
+        vmov.f32 q0, 9.5
+        vmov.f32 q0, 19.0
+        vmov.f32 q0, 0.1484375
+        vmov.f32 q0, 0.296875
+        vmov.f32 q0, 0.59375
+        vmov.f32 q0, 1.1875
+        
+        vmov.f32 q0, 2.5
+        vmov.f32 q0, 5.0
+        vmov.f32 q0, 10.0
+        vmov.f32 q0, 20.0
+        vmov.f32 q0, 0.15625
+        vmov.f32 q0, 0.3125
+        vmov.f32 q0, 0.625
+        vmov.f32 q0, 1.25
+        
+        vmov.f32 q0, 2.625
+        vmov.f32 q0, 5.25
+        vmov.f32 q0, 10.5
+        vmov.f32 q0, 21.0
+        vmov.f32 q0, 0.1640625
+        vmov.f32 q0, 0.328125
+        vmov.f32 q0, 0.65625
+        vmov.f32 q0, 1.3125
+        
+        vmov.f32 q0, 2.75
+        vmov.f32 q0, 5.5
+        vmov.f32 q0, 11.0
+        vmov.f32 q0, 22.0
+        vmov.f32 q0, 0.171875
+        vmov.f32 q0, 0.34375
+        vmov.f32 q0, 0.6875
+        vmov.f32 q0, 1.375
+        
+        vmov.f32 q0, 2.875
+        vmov.f32 q0, 5.75
+        vmov.f32 q0, 11.5
+        vmov.f32 q0, 23.0
+        vmov.f32 q0, 0.1796875
+        vmov.f32 q0, 0.359375
+        vmov.f32 q0, 0.71875
+        vmov.f32 q0, 1.4375
+        
+        vmov.f32 q0, 3.0
+        vmov.f32 q0, 6.0
+        vmov.f32 q0, 12.0
+        vmov.f32 q0, 24.0
+        vmov.f32 q0, 0.1875
+        vmov.f32 q0, 0.375
+        vmov.f32 q0, 0.75
+        vmov.f32 q0, 1.5
+        
+        vmov.f32 q0, 3.125
+        vmov.f32 q0, 6.25
+        vmov.f32 q0, 12.5
+        vmov.f32 q0, 25.0
+        vmov.f32 q0, 0.1953125
+        vmov.f32 q0, 0.390625
+        vmov.f32 q0, 0.78125
+        vmov.f32 q0, 1.5625
+        
+        vmov.f32 q0, 3.25
+        vmov.f32 q0, 6.5
+        vmov.f32 q0, 13.0
+        vmov.f32 q0, 26.0
+        vmov.f32 q0, 0.203125
+        vmov.f32 q0, 0.40625
+        vmov.f32 q0, 0.8125
+        vmov.f32 q0, 1.625
+        
+        vmov.f32 q0, 3.375
+        vmov.f32 q0, 6.75
+        vmov.f32 q0, 13.5
+        vmov.f32 q0, 27.0
+        vmov.f32 q0, 0.2109375
+        vmov.f32 q0, 0.421875
+        vmov.f32 q0, 0.84375
+        vmov.f32 q0, 1.6875
+
+        vmov.f32 q0, 3.5
+        vmov.f32 q0, 7.0
+        vmov.f32 q0, 14.0
+        vmov.f32 q0, 28.0
+        vmov.f32 q0, 0.21875
+        vmov.f32 q0, 0.4375
+        vmov.f32 q0, 0.875
+        vmov.f32 q0, 1.75
+        
+        vmov.f32 q0, 3.625
+        vmov.f32 q0, 7.25
+        vmov.f32 q0, 14.5
+        vmov.f32 q0, 29.0
+        vmov.f32 q0, 0.2265625
+        vmov.f32 q0, 0.453125
+        vmov.f32 q0, 0.90625
+        vmov.f32 q0, 1.8125
+        
+        vmov.f32 q0, 3.75
+        vmov.f32 q0, 7.5
+        vmov.f32 q0, 15.0
+        vmov.f32 q0, 30.0
+        vmov.f32 q0, 0.234375
+        vmov.f32 q0, 0.46875
+        vmov.f32 q0, 0.9375
+        vmov.f32 q0, 1.875
+        
+        vmov.f32 q0, 3.875
+        vmov.f32 q0, 7.75
+        vmov.f32 q0, 15.5
+        vmov.f32 q0, 31.0
+        vmov.f32 q0, 0.2421875
+        vmov.f32 q0, 0.484375
+        vmov.f32 q0, 0.96875
+        vmov.f32 q0, 1.9375
+
+        vmov.f32 q0, -0
+
+	vmov.f32 q0, -2.0
+        vmov.f32 q0, -4.0
+        vmov.f32 q0, -8.0
+        vmov.f32 q0, -16.0
+        vmov.f32 q0, -0.125
+        vmov.f32 q0, -0.25
+        vmov.f32 q0, -0.5
+        vmov.f32 q0, -1.0
+
+        vmov.f32 q0, -2.125
+        vmov.f32 q0, -4.25
+        vmov.f32 q0, -8.5
+        vmov.f32 q0, -17.0
+        vmov.f32 q0, -0.1328125
+        vmov.f32 q0, -0.265625
+        vmov.f32 q0, -0.53125
+        vmov.f32 q0, -1.0625
+        
+        vmov.f32 q0, -2.25
+        vmov.f32 q0, -4.5
+        vmov.f32 q0, -9.0
+        vmov.f32 q0, -18.0
+        vmov.f32 q0, -0.140625
+        vmov.f32 q0, -0.28125
+        vmov.f32 q0, -0.5625
+        vmov.f32 q0, -1.125
+        
+        vmov.f32 q0, -2.375
+        vmov.f32 q0, -4.75
+        vmov.f32 q0, -9.5
+        vmov.f32 q0, -19.0
+        vmov.f32 q0, -0.1484375
+        vmov.f32 q0, -0.296875
+        vmov.f32 q0, -0.59375
+        vmov.f32 q0, -1.1875
+        
+        vmov.f32 q0, -2.5
+        vmov.f32 q0, -5.0
+        vmov.f32 q0, -10.0
+        vmov.f32 q0, -20.0
+        vmov.f32 q0, -0.15625
+        vmov.f32 q0, -0.3125
+        vmov.f32 q0, -0.625
+        vmov.f32 q0, -1.25
+        
+        vmov.f32 q0, -2.625
+        vmov.f32 q0, -5.25
+        vmov.f32 q0, -10.5
+        vmov.f32 q0, -21.0
+        vmov.f32 q0, -0.1640625
+        vmov.f32 q0, -0.328125
+        vmov.f32 q0, -0.65625
+        vmov.f32 q0, -1.3125
+        
+        vmov.f32 q0, -2.75
+        vmov.f32 q0, -5.5
+        vmov.f32 q0, -11.0
+        vmov.f32 q0, -22.0
+        vmov.f32 q0, -0.171875
+        vmov.f32 q0, -0.34375
+        vmov.f32 q0, -0.6875
+        vmov.f32 q0, -1.375
+        
+        vmov.f32 q0, -2.875
+        vmov.f32 q0, -5.75
+        vmov.f32 q0, -11.5
+        vmov.f32 q0, -23.0
+        vmov.f32 q0, -0.1796875
+        vmov.f32 q0, -0.359375
+        vmov.f32 q0, -0.71875
+        vmov.f32 q0, -1.4375
+        
+        vmov.f32 q0, -3.0
+        vmov.f32 q0, -6.0
+        vmov.f32 q0, -12.0
+        vmov.f32 q0, -24.0
+        vmov.f32 q0, -0.1875
+        vmov.f32 q0, -0.375
+        vmov.f32 q0, -0.75
+        vmov.f32 q0, -1.5
+        
+        vmov.f32 q0, -3.125
+        vmov.f32 q0, -6.25
+        vmov.f32 q0, -12.5
+        vmov.f32 q0, -25.0
+        vmov.f32 q0, -0.1953125
+        vmov.f32 q0, -0.390625
+        vmov.f32 q0, -0.78125
+        vmov.f32 q0, -1.5625
+        
+        vmov.f32 q0, -3.25
+        vmov.f32 q0, -6.5
+        vmov.f32 q0, -13.0
+        vmov.f32 q0, -26.0
+        vmov.f32 q0, -0.203125
+        vmov.f32 q0, -0.40625
+        vmov.f32 q0, -0.8125
+        vmov.f32 q0, -1.625
+        
+        vmov.f32 q0, -3.375
+        vmov.f32 q0, -6.75
+        vmov.f32 q0, -13.5
+        vmov.f32 q0, -27.0
+        vmov.f32 q0, -0.2109375
+        vmov.f32 q0, -0.421875
+        vmov.f32 q0, -0.84375
+        vmov.f32 q0, -1.6875
+
+        vmov.f32 q0, -3.5
+        vmov.f32 q0, -7.0
+        vmov.f32 q0, -14.0
+        vmov.f32 q0, -28.0
+        vmov.f32 q0, -0.21875
+        vmov.f32 q0, -0.4375
+        vmov.f32 q0, -0.875
+        vmov.f32 q0, -1.75
+        
+        vmov.f32 q0, -3.625
+        vmov.f32 q0, -7.25
+        vmov.f32 q0, -14.5
+        vmov.f32 q0, -29.0
+        vmov.f32 q0, -0.2265625
+        vmov.f32 q0, -0.453125
+        vmov.f32 q0, -0.90625
+        vmov.f32 q0, -1.8125
+        
+        vmov.f32 q0, -3.75
+        vmov.f32 q0, -7.5
+        vmov.f32 q0, -15.0
+        vmov.f32 q0, -30.0
+        vmov.f32 q0, -0.234375
+        vmov.f32 q0, -0.46875
+        vmov.f32 q0, -0.9375
+        vmov.f32 q0, -1.875
+        
+        vmov.f32 q0, -3.875
+        vmov.f32 q0, -7.75
+        vmov.f32 q0, -15.5
+        vmov.f32 q0, -31.0
+        vmov.f32 q0, -0.2421875
+        vmov.f32 q0, -0.484375
+        vmov.f32 q0, -0.96875
+        vmov.f32 q0, -1.9375
diff --git a/gas/testsuite/gas/mips/vxworks1.s b/gas/testsuite/gas/mips/vxworks1.s
new file mode 100644
index 00000000000..4d670a320cd
--- /dev/null
+++ b/gas/testsuite/gas/mips/vxworks1.s
@@ -0,0 +1,16 @@
+	la	$4,local
+	la	$4,global
+	lw	$4,local
+	lw	$4,global
+	sw	$4,local
+	sw	$4,global
+	ulw	$4,local
+	ulw	$4,global
+	usw	$4,local
+	usw	$4,global
+	.space	16
+
+	.data
+	.global global
+local:	.word	4
+global:	.word	8
diff --git a/gas/testsuite/gas/sparc/vxworks-pic.d b/gas/testsuite/gas/sparc/vxworks-pic.d
new file mode 100644
index 00000000000..7e238fbdc45
--- /dev/null
+++ b/gas/testsuite/gas/sparc/vxworks-pic.d
@@ -0,0 +1,27 @@
+#as: -KPIC
+#objdump: -dr
+#name: VxWorks PIC
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+   0:	2f 00 00 00 	sethi  %hi\(0\), %l7
+			0: R_SPARC_HI22	__GOTT_BASE__
+   4:	ee 05 e0 00 	ld  \[ %l7 \], %l7
+			4: R_SPARC_LO10	__GOTT_BASE__
+   8:	ee 05 e0 00 	ld  \[ %l7 \], %l7
+			8: R_SPARC_LO10	__GOTT_INDEX__
+   c:	03 00 00 00 	sethi  %hi\(0\), %g1
+			c: R_SPARC_HI22	__GOTT_BASE__
+  10:	82 10 60 00 	mov  %g1, %g1	! 0x0
+			10: R_SPARC_LO10	__GOTT_BASE__
+  14:	03 00 00 00 	sethi  %hi\(0\), %g1
+			14: R_SPARC_HI22	__GOTT_INDEX__
+  18:	82 10 60 00 	mov  %g1, %g1	! 0x0
+			18: R_SPARC_LO10	__GOTT_INDEX__
+  1c:	03 00 00 00 	sethi  %hi\(0\), %g1
+			1c: R_SPARC_GOT22	__GOT_BASE__
+  20:	82 10 60 00 	mov  %g1, %g1	! 0x0
+			20: R_SPARC_GOT10	__GOT_BASE__
diff --git a/gas/testsuite/gas/sparc/vxworks-pic.s b/gas/testsuite/gas/sparc/vxworks-pic.s
new file mode 100644
index 00000000000..9d49e007904
--- /dev/null
+++ b/gas/testsuite/gas/sparc/vxworks-pic.s
@@ -0,0 +1,11 @@
+	sethi	%hi(__GOTT_BASE__), %l7
+	ld	[%l7+%lo(__GOTT_BASE__)],%l7
+	ld	[%l7+%lo(__GOTT_INDEX__)],%l7
+
+	sethi	%hi(__GOTT_BASE__), %g1
+	or	%g1, %lo(__GOTT_BASE__), %g1
+	sethi	%hi(__GOTT_INDEX__), %g1
+	or	%g1, %lo(__GOTT_INDEX__), %g1
+
+	sethi	%hi(__GOT_BASE__), %g1
+	or	%g1, %lo(__GOT_BASE__), %g1
diff --git a/ld/elf-hints-local.h b/ld/elf-hints-local.h
new file mode 100644
index 00000000000..69408180ce4
--- /dev/null
+++ b/ld/elf-hints-local.h
@@ -0,0 +1,44 @@
+/* Copyright (c) 1997 John D. Polstra.
+   All rights reserved.
+ 
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions
+   are met:
+   1. Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+   2. Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in the
+      documentation and/or other materials provided with the distribution.
+ 
+   THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+   ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+   FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+   DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+   OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+   HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+   LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+   OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+   SUCH DAMAGE.  */
+
+#ifndef	_ELF_HINTS_H_
+#define	_ELF_HINTS_H_
+
+/* Hints file produced by ldconfig.  */
+struct elfhints_hdr
+{
+  u_int32_t magic;		/* Magic number.  */
+  u_int32_t version;		/* File version (1).  */
+  u_int32_t strtab;		/* Offset of string table in file.  */
+  u_int32_t strsize;		/* Size of string table.  */
+  u_int32_t dirlist;		/* Offset of directory list in string table.  */
+  u_int32_t dirlistlen;		/* strlen(dirlist).  */
+  u_int32_t spare[26];		/* Room for expansion.  */
+};
+
+#define ELFHINTS_MAGIC	0x746e6845
+
+#define _PATH_ELF_HINTS	"/var/run/ld-elf.so.hints"
+
+#endif /* !_ELF_HINTS_H_ */
diff --git a/ld/emulparams/elf32_sparc_vxworks.sh b/ld/emulparams/elf32_sparc_vxworks.sh
new file mode 100644
index 00000000000..12a9b384408
--- /dev/null
+++ b/ld/emulparams/elf32_sparc_vxworks.sh
@@ -0,0 +1,4 @@
+. ${srcdir}/emulparams/elf32_sparc.sh
+OUTPUT_FORMAT="elf32-sparc-vxworks"
+unset DATA_PLT
+. ${srcdir}/emulparams/vxworks.sh
diff --git a/ld/emulparams/elf32ebmipvxworks.sh b/ld/emulparams/elf32ebmipvxworks.sh
new file mode 100644
index 00000000000..4145488ae28
--- /dev/null
+++ b/ld/emulparams/elf32ebmipvxworks.sh
@@ -0,0 +1,11 @@
+. ${srcdir}/emulparams/elf32bmip.sh
+
+OUTPUT_FORMAT="elf32-bigmips-vxworks"
+BIG_OUTPUT_FORMAT="elf32-bigmips-vxworks"
+LITTLE_OUTPUT_FORMAT="elf32-littlemips-vxworks"
+unset OTHER_GOT_SYMBOLS
+SHLIB_TEXT_START_ADDR=0
+unset TEXT_DYNAMIC
+unset DATA_ADDR
+
+. ${srcdir}/emulparams/vxworks.sh
diff --git a/ld/emulparams/elf32elmipvxworks.sh b/ld/emulparams/elf32elmipvxworks.sh
new file mode 100644
index 00000000000..c1239441c4e
--- /dev/null
+++ b/ld/emulparams/elf32elmipvxworks.sh
@@ -0,0 +1,11 @@
+. ${srcdir}/emulparams/elf32bmip.sh
+
+OUTPUT_FORMAT="elf32-littlemips-vxworks"
+BIG_OUTPUT_FORMAT="elf32-bigmips-vxworks"
+LITTLE_OUTPUT_FORMAT="elf32-littlemips-vxworks"
+unset OTHER_GOT_SYMBOLS
+SHLIB_TEXT_START_ADDR=0
+unset TEXT_DYNAMIC
+unset DATA_ADDR
+
+. ${srcdir}/emulparams/vxworks.sh
diff --git a/ld/testsuite/ld-mips-elf/tls-hidden3.d b/ld/testsuite/ld-mips-elf/tls-hidden3.d
new file mode 100644
index 00000000000..6d586869bfa
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/tls-hidden3.d
@@ -0,0 +1,24 @@
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+#
+# The TLS entries are ordered as follows:
+#
+#	foo0	(-0x7ff0 + 0x20)
+#	foo2	(-0x7ff0 + 0x24)
+#	foo3	(-0x7ff0 + 0x28)
+#	foo1	(-0x7ff0 + 0x2c)
+#
+# Any order would be acceptable, but it must match the .got dump.
+#
+00080c00 <\.text>:
+   80c00:	8f848030 	lw	a0,-32720\(gp\)
+   80c04:	8f84803c 	lw	a0,-32708\(gp\)
+   80c08:	8f848034 	lw	a0,-32716\(gp\)
+   80c0c:	8f848038 	lw	a0,-32712\(gp\)
+   80c10:	8f848030 	lw	a0,-32720\(gp\)
+   80c14:	8f84803c 	lw	a0,-32708\(gp\)
+   80c18:	8f848034 	lw	a0,-32716\(gp\)
+   80c1c:	8f848038 	lw	a0,-32712\(gp\)
diff --git a/ld/testsuite/ld-mips-elf/tls-hidden3.got b/ld/testsuite/ld-mips-elf/tls-hidden3.got
new file mode 100644
index 00000000000..8b9c87f86e2
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/tls-hidden3.got
@@ -0,0 +1,24 @@
+
+.*:     file format .*
+
+#
+# The GOT layout is:
+#
+#	- 2 reserved entries
+#	- 5 local page entries
+#	- 1 global entry for "undef"
+#	- 4 TLS entries
+#
+# The order of the TLS entries is:
+#
+#	foo0	(offset 0x20)
+#	foo2	(offset 0x24)
+#	foo3	(offset 0x28)
+#	foo1	(offset 0x2c)
+#
+# Any order would be acceptable, but it must match the .d dump.
+#
+Contents of section \.got:
+ 90000 00000000 80000000 00000000 00000000  .*
+ 90010 00000000 00000000 00000000 00000000  .*
+ 90020 0000abc0 0000abc8 0000abcc 0000abc4  .*
diff --git a/ld/testsuite/ld-mips-elf/tls-hidden3.ld b/ld/testsuite/ld-mips-elf/tls-hidden3.ld
new file mode 100644
index 00000000000..b3d0584c881
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/tls-hidden3.ld
@@ -0,0 +1,31 @@
+SECTIONS
+{
+  . = 0x80000;
+  .interp : { *(.interp) }
+  .hash : { *(.hash) }
+  .dynsym : { *(.dynsym) }
+  .dynstr : { *(.dynstr) }
+
+  . = ALIGN (0x400);
+  .rel.dyn : { *(.rel.dyn) }
+
+  . = ALIGN (0x400);
+  .MIPS.stubs : { *(.MIPS.stubs) }
+
+  . = ALIGN (0x400);
+  .text : { *(.text) }
+
+  . = ALIGN (0x10000);
+  _gp = . + 0x7ff0;
+  .got : { *(.got) }
+
+  . = ALIGN (0x400);
+  .tdata : { *(.tdata) }
+
+  /DISCARD/ : { *(.reginfo) }
+}
+
+VERSION
+{
+  { local: *; };
+}
diff --git a/ld/testsuite/ld-mips-elf/tls-hidden3.r b/ld/testsuite/ld-mips-elf/tls-hidden3.r
new file mode 100644
index 00000000000..500e7b17072
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/tls-hidden3.r
@@ -0,0 +1,13 @@
+
+Relocation section '\.rel\.dyn' at offset .* contains 6 entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name
+00000000  00000000 R_MIPS_NONE      
+#
+# The order of the next four entries doesn't matter.  The important thing
+# is that there is exactly one entry per GOT TLS slot.
+#
+00090020  0000002f R_MIPS_TLS_TPREL3
+0009002c  0000002f R_MIPS_TLS_TPREL3
+00090024  0000002f R_MIPS_TLS_TPREL3
+00090028  0000002f R_MIPS_TLS_TPREL3
+00090030  .*03 R_MIPS_REL32      00000000   undef
diff --git a/ld/testsuite/ld-mips-elf/tls-hidden3a.s b/ld/testsuite/ld-mips-elf/tls-hidden3a.s
new file mode 100644
index 00000000000..d1e6d646e7c
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/tls-hidden3a.s
@@ -0,0 +1,10 @@
+	.macro	load
+	lw	$4,%gottprel(foo\@)($gp)
+	.endm
+
+	.rept	4
+	load
+	.endr
+
+	.section .tdata,"awT",@progbits
+	.fill	0xabc0
diff --git a/ld/testsuite/ld-mips-elf/tls-hidden3b.s b/ld/testsuite/ld-mips-elf/tls-hidden3b.s
new file mode 100644
index 00000000000..0744b078f88
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/tls-hidden3b.s
@@ -0,0 +1,18 @@
+	.macro	load
+	.text
+	lw	$4,%gottprel(foo\@)($gp)
+
+	.global foo\@
+	.type   foo\@,@object
+	.size   foo\@,4
+	.section .tdata,"awT",@progbits
+foo\@:
+	.word   \@
+	.endm
+
+	.rept	4
+	load
+	.endr
+
+	.data
+	.word	undef
diff --git a/ld/testsuite/ld-mips-elf/tls-hidden4.got b/ld/testsuite/ld-mips-elf/tls-hidden4.got
new file mode 100644
index 00000000000..84120c04522
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/tls-hidden4.got
@@ -0,0 +1,28 @@
+
+.*:     file format .*
+
+Contents of section \.got:
+#
+# The order of the TLS entries in this GOT is:
+#
+#     foo2
+#     foo3
+#     foo0
+#     foo1
+#
+# The order and address don't matter; the important thing is that the
+# addresses match the relocs in the .r dump and that there is a separate
+# entry for each symbol.
+#
+#...
+ 1c4080 0000abc8 0000abcc 0000abc0 0000abc4  .*
+#
+# Likewise, but the order of the entries in this GOT is:
+#
+#     foo3
+#     foo2
+#     foo0
+#     foo1
+#...
+ 1d00c0 00000000 00000000 00000000 0000abcc  .*
+ 1d00d0 0000abc8 0000abc0 0000abc4           .*
diff --git a/ld/testsuite/ld-mips-elf/tls-hidden4.r b/ld/testsuite/ld-mips-elf/tls-hidden4.r
new file mode 100644
index 00000000000..f6809b5280c
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/tls-hidden4.r
@@ -0,0 +1,19 @@
+
+Relocation section '\.rel\.dyn' at offset .* contains .* entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name
+00000000  00000000 R_MIPS_NONE      
+#
+# The order and addresses of the next eight entries don't matter.  The
+# important thing is that there is exactly one entry per GOT TLS slot
+# and that the addresses match those in the .got dump.
+#
+001d00d4  0000002f R_MIPS_TLS_TPREL3
+001d00d8  0000002f R_MIPS_TLS_TPREL3
+001d00d0  0000002f R_MIPS_TLS_TPREL3
+001d00cc  0000002f R_MIPS_TLS_TPREL3
+001c4088  0000002f R_MIPS_TLS_TPREL3
+001c408c  0000002f R_MIPS_TLS_TPREL3
+001c4080  0000002f R_MIPS_TLS_TPREL3
+001c4084  0000002f R_MIPS_TLS_TPREL3
+.* R_MIPS_REL32 .*
+#pass
diff --git a/ld/testsuite/ld-mips-elf/tls-hidden4a.s b/ld/testsuite/ld-mips-elf/tls-hidden4a.s
new file mode 100644
index 00000000000..02a0d35b73e
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/tls-hidden4a.s
@@ -0,0 +1,18 @@
+	.macro	load
+	lw	$4,%gottprel(foo\@)($gp)
+	.endm
+
+	.rept	4
+	load
+	.endr
+
+	.macro	load2
+	lw	$4,%got(undefa\@)($gp)
+	.endm
+
+	.rept	0x3000
+	load2
+	.endr
+
+	.section .tdata,"awT",@progbits
+	.fill	0xabc0
diff --git a/ld/testsuite/ld-mips-elf/tls-hidden4b.s b/ld/testsuite/ld-mips-elf/tls-hidden4b.s
new file mode 100644
index 00000000000..d6deb002d62
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/tls-hidden4b.s
@@ -0,0 +1,27 @@
+	.macro	load
+	.text
+	lw	$4,%gottprel(foo\@)($gp)
+
+	.global foo\@
+	.type   foo\@,@object
+	.size   foo\@,4
+	.section .tdata,"awT",@progbits
+foo\@:
+	.word   \@
+	.endm
+
+	.rept	4
+	load
+	.endr
+
+	.text
+	.macro	load2
+	lw	$4,%got(undefb\@)($gp)
+	.endm
+
+	.rept	0x3000
+	load2
+	.endr
+
+	.data
+	.word	undef
diff --git a/ld/testsuite/ld-mips-elf/vxworks1-lib.dd b/ld/testsuite/ld-mips-elf/vxworks1-lib.dd
new file mode 100644
index 00000000000..ab060d98dd4
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks1-lib.dd
@@ -0,0 +1,50 @@
+
+.*:     file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+   80800:	8f990008 	lw	t9,8\(gp\)
+   80804:	00000000 	nop
+   80808:	03200008 	jr	t9
+   8080c:	00000000 	nop
+	\.\.\.
+   80818:	1000fff9 	b	80800 <_PROCEDURE_LINKAGE_TABLE_>
+   8081c:	24180000 	li	t8,0
+   80820:	1000fff7 	b	80800 <_PROCEDURE_LINKAGE_TABLE_>
+   80824:	24180001 	li	t8,1
+Disassembly of section \.text:
+
+00080c00 <foo>:
+   80c00:	27bdffe0 	addiu	sp,sp,-32
+   80c04:	afbf0000 	sw	ra,0\(sp\)
+   80c08:	afbc0004 	sw	gp,4\(sp\)
+   80c0c:	3c1c0000 	lui	gp,0x0
+   80c10:	8f9c0000 	lw	gp,0\(gp\)
+   80c14:	8f9c0000 	lw	gp,0\(gp\)
+   80c18:	8f820014 	lw	v0,20\(gp\)
+   80c1c:	8c430000 	lw	v1,0\(v0\)
+   80c20:	24630001 	addiu	v1,v1,1
+   80c24:	ac430000 	sw	v1,0\(v0\)
+   80c28:	8f99000c 	lw	t9,12\(gp\)
+   80c2c:	0320f809 	jalr	t9
+   80c30:	00000000 	nop
+   80c34:	8f99fff4 	lw	t9,-12\(gp\)
+   80c38:	0320f809 	jalr	t9
+   80c3c:	00000000 	nop
+   80c40:	8f99fff0 	lw	t9,-16\(gp\)
+   80c44:	0320f809 	jalr	t9
+   80c48:	00000000 	nop
+   80c4c:	8fbf0000 	lw	ra,0\(sp\)
+   80c50:	8fbc0004 	lw	gp,4\(sp\)
+   80c54:	03e00008 	jr	ra
+   80c58:	27bd0020 	addiu	sp,sp,32
+
+00080c5c <slocal>:
+   80c5c:	03e00008 	jr	ra
+   80c60:	00000000 	nop
+
+00080c64 <sglobal>:
+   80c64:	03e00008 	jr	ra
+   80c68:	00000000 	nop
+#pass
diff --git a/ld/testsuite/ld-mips-elf/vxworks1-lib.nd b/ld/testsuite/ld-mips-elf/vxworks1-lib.nd
new file mode 100644
index 00000000000..adbf7d77a32
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks1-lib.nd
@@ -0,0 +1,9 @@
+#...
+Symbol table '\.dynsym' .*:
+#...
+.*: 00081410 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#...
+Symbol table '\.symtab' .*:
+#...
+.*: 00081410 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#pass
diff --git a/ld/testsuite/ld-mips-elf/vxworks1-lib.rd b/ld/testsuite/ld-mips-elf/vxworks1-lib.rd
new file mode 100644
index 00000000000..9a8b35e7802
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks1-lib.rd
@@ -0,0 +1,18 @@
+
+Relocation section '\.rela\.dyn' at offset .* contains .* entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
+00080c0c  .*05 R_MIPS_HI16       00000000   __GOTT_BASE__ \+ 0
+00080c10  .*06 R_MIPS_LO16       00000000   __GOTT_BASE__ \+ 0
+00080c14  .*01 R_MIPS_16         00000000   __GOTT_INDEX__ \+ 0
+0008141c  .*02 R_MIPS_32         00080c00   \.text \+ 5c
+00081c00  00000002 R_MIPS_32                                    00080c5c
+00081c04  00000002 R_MIPS_32                                    00081c00
+00081c08  .*02 R_MIPS_32         00081c08   dglobal \+ 0
+00081c0c  .*02 R_MIPS_32         00000000   dexternal \+ 0
+00081424  .*02 R_MIPS_32         00081800   x \+ 0
+00000000  00000000 R_MIPS_NONE                                  00000000
+#...
+Relocation section '\.rela\.plt' at offset .* contains 2 entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
+00081400  .*7f R_MIPS_JUMP_SLOT  00000000   sexternal \+ 0
+00081404  .*7f R_MIPS_JUMP_SLOT  00080c64   sglobal \+ 0
diff --git a/ld/testsuite/ld-mips-elf/vxworks1-lib.s b/ld/testsuite/ld-mips-elf/vxworks1-lib.s
new file mode 100644
index 00000000000..827332c0c18
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks1-lib.s
@@ -0,0 +1,52 @@
+	.text
+	.globl	foo
+	.type	foo, @function
+foo:
+	addiu	$sp,$sp,-32
+	sw	$31,($sp)
+	sw	$28,4($sp)
+	lui	$28,%hi(__GOTT_BASE__)
+	lw	$28,%lo(__GOTT_BASE__)($28)
+	lw	$28,%half(__GOTT_INDEX__)($28)
+	lw	$2,%got(x)($28)
+	lw	$3,($2)
+	addiu	$3,$3,1
+	sw	$3,($2)
+	lw	$25,%got(slocal)($gp)
+	jalr	$25
+	lw	$25,%call16(sglobal)($gp)
+	jalr	$25
+	lw	$25,%call16(sexternal)($gp)
+	jalr	$25
+	lw	$31,($sp)
+	lw	$28,4($sp)
+	addiu	$sp,$sp,32
+	jr	$31
+	.size	foo, .-foo
+
+	.type	slocal, @function
+slocal:
+	jr	$31
+	.size	slocal, .-slocal
+
+	.globl	sglobal
+	.type	sglobal, @function
+sglobal:
+	jr	$31
+	.size	sglobal, .-sglobal
+
+	.comm	x,4,4
+
+	.data
+	.type	dlocal, @object
+dlocal:
+	.word	slocal
+	.word	dlocal
+	.size	dlocal, .-dlocal
+
+	.globl	dglobal
+	.type	dglobal, @object
+dglobal:
+	.word	dglobal
+	.word	dexternal
+	.size	dglobal, .-dglobal
diff --git a/ld/testsuite/ld-mips-elf/vxworks1-static.d b/ld/testsuite/ld-mips-elf/vxworks1-static.d
new file mode 100644
index 00000000000..88c0baf1bbb
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks1-static.d
@@ -0,0 +1,4 @@
+#name: VxWorks executable test 1 (static)
+#source: vxworks1.s
+#ld: tmpdir/libvxworks1.so -Tvxworks1.ld
+#error: Dynamic sections created in non-dynamic link
diff --git a/ld/testsuite/ld-mips-elf/vxworks1.dd b/ld/testsuite/ld-mips-elf/vxworks1.dd
new file mode 100644
index 00000000000..af9e3543240
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks1.dd
@@ -0,0 +1,51 @@
+
+.*:     file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+   80800:	3c190008 	lui	t9,0x8
+			80800: R_MIPS_HI16	_GLOBAL_OFFSET_TABLE_
+   80804:	27391410 	addiu	t9,t9,5136
+			80804: R_MIPS_LO16	_GLOBAL_OFFSET_TABLE_
+   80808:	8f390008 	lw	t9,8\(t9\)
+   8080c:	00000000 	nop
+   80810:	03200008 	jr	t9
+   80814:	00000000 	nop
+   80818:	1000fff9 	b	80800 <_PROCEDURE_LINKAGE_TABLE_>
+   8081c:	24180000 	li	t8,0
+   80820:	3c190008 	lui	t9,0x8
+			80820: R_MIPS_HI16	_GLOBAL_OFFSET_TABLE_\+0xfffffff0
+   80824:	27391400 	addiu	t9,t9,5120
+			80824: R_MIPS_LO16	_GLOBAL_OFFSET_TABLE_\+0xfffffff0
+   80828:	8f390000 	lw	t9,0\(t9\)
+   8082c:	00000000 	nop
+   80830:	03200008 	jr	t9
+   80834:	00000000 	nop
+   80838:	1000fff1 	b	80800 <_PROCEDURE_LINKAGE_TABLE_>
+   8083c:	24180001 	li	t8,1
+   80840:	3c190008 	lui	t9,0x8
+			80840: R_MIPS_HI16	_GLOBAL_OFFSET_TABLE_\+0xfffffff4
+   80844:	27391404 	addiu	t9,t9,5124
+			80844: R_MIPS_LO16	_GLOBAL_OFFSET_TABLE_\+0xfffffff4
+   80848:	8f390000 	lw	t9,0\(t9\)
+   8084c:	00000000 	nop
+   80850:	03200008 	jr	t9
+   80854:	00000000 	nop
+Disassembly of section \.text:
+
+00080c00 <_start>:
+   80c00:	0c020210 	jal	80840 <_PROCEDURE_LINKAGE_TABLE_\+0x40>
+			80c00: R_MIPS_26	\.plt\+0x40
+   80c04:	00000000 	nop
+   80c08:	0c020306 	jal	80c18 <sexternal>
+			80c08: R_MIPS_26	sexternal
+   80c0c:	00000000 	nop
+   80c10:	08020208 	j	80820 <_PROCEDURE_LINKAGE_TABLE_\+0x20>
+			80c10: R_MIPS_26	\.plt\+0x20
+   80c14:	00000000 	nop
+
+00080c18 <sexternal>:
+   80c18:	03e00008 	jr	ra
+   80c1c:	00000000 	nop
+#pass
diff --git a/ld/testsuite/ld-mips-elf/vxworks1.ld b/ld/testsuite/ld-mips-elf/vxworks1.ld
new file mode 100644
index 00000000000..74e2c2612a9
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks1.ld
@@ -0,0 +1,32 @@
+SECTIONS
+{
+  . = 0x80000;
+  .interp : { *(.interp) }
+  .hash : { *(.hash) }
+  .dynsym : { *(.dynsym) }
+  .dynstr : { *(.dynstr) }
+
+  . = ALIGN (0x400);
+  .rela.dyn : { *(.rela.dyn) }
+  .rela.plt : { *(.rela.plt) }
+
+  . = ALIGN (0x400);
+  .plt : { *(.plt) }
+
+  . = ALIGN (0x400);
+  .text : { *(.text) }
+
+  . = ALIGN (0x1000);
+  .dynamic : { *(.dynamic) }
+
+  . = ALIGN (0x400);
+  .got : { *(.got.plt) *(.got) }
+
+  . = ALIGN (0x400);
+  .bss : { *(.bss) *(.dynbss) }
+
+  . = ALIGN (0x400);
+  .data : { *(.data) }
+
+  /DISCARD/ : { *(.reginfo) }
+}
diff --git a/ld/testsuite/ld-mips-elf/vxworks1.rd b/ld/testsuite/ld-mips-elf/vxworks1.rd
new file mode 100644
index 00000000000..f4793a22e0d
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks1.rd
@@ -0,0 +1,32 @@
+
+Relocation section '\.rela\.dyn' at offset .* contains 1 entries:
+ Offset     Info    Type            Sym.Value  Sym. Name \+ Addend
+00081800  .*7e R_MIPS_COPY       00081800   dglobal \+ 0
+
+Relocation section '\.rela\.plt' at offset .* contains 2 entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
+00081400  .*7f R_MIPS_JUMP_SLOT  00080820   sglobal \+ 0
+00081404  .*7f R_MIPS_JUMP_SLOT  00080840   foo \+ 0
+
+Relocation section '\.rela\.text' at offset .* contains 3 entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
+00080c00  .*04 R_MIPS_26         00080800   \.plt \+ 40
+00080c08  .*04 R_MIPS_26         00080c18   sexternal \+ 0
+00080c10  .*04 R_MIPS_26         00080800   \.plt \+ 20
+
+Relocation section '\.rela\.data' at offset .* contains 3 entries:
+ Offset     Info    Type            Sym.Value  Sym. Name \+ Addend
+00081c00  .*02 R_MIPS_32         00081c00   .data \+ 0
+00081c04  .*02 R_MIPS_32         00081800   .bss \+ 0
+00081c08  .*02 R_MIPS_32         00081c04   dexternal \+ 0
+
+Relocation section '\.rela\.plt\.unloaded' at offset .* contains 8 entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
+00080800  .*05 R_MIPS_HI16       00081410   _GLOBAL_OFFSET_TABLE_ \+ 0
+00080804  .*06 R_MIPS_LO16       00081410   _GLOBAL_OFFSET_TABLE_ \+ 0
+00081400  .*02 R_MIPS_32         00080800   _PROCEDURE_LINKAGE_TAB.* \+ 18
+00080820  .*05 R_MIPS_HI16       00081410   _GLOBAL_OFFSET_TABLE_ \+ fffffff0
+00080824  .*06 R_MIPS_LO16       00081410   _GLOBAL_OFFSET_TABLE_ \+ fffffff0
+00081404  .*02 R_MIPS_32         00080800   _PROCEDURE_LINKAGE_TAB.* \+ 38
+00080840  .*05 R_MIPS_HI16       00081410   _GLOBAL_OFFSET_TABLE_ \+ fffffff4
+00080844  .*06 R_MIPS_LO16       00081410   _GLOBAL_OFFSET_TABLE_ \+ fffffff4
diff --git a/ld/testsuite/ld-mips-elf/vxworks1.s b/ld/testsuite/ld-mips-elf/vxworks1.s
new file mode 100644
index 00000000000..33a247f7f69
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks1.s
@@ -0,0 +1,27 @@
+	.text
+	.globl	_start
+	.type	_start, @function
+_start:
+	jal	foo
+	jal	sexternal
+	j	sglobal
+	.size	_start, .-_start
+
+	.globl	sexternal
+	.type	sexternal, @function
+sexternal:
+	jr	$31
+	.size	sexternal, .-sexternal
+
+	.data
+	.type	dlocal, @object
+dlocal:
+	.word	dlocal
+	.size	dlocal, .-dlocal
+
+	.globl	dexternal
+	.type	dexternal, @object
+dexternal:
+	.word	dglobal
+	.word	dexternal
+	.size	dexternal, .-dexternal
diff --git a/ld/testsuite/ld-mips-elf/vxworks2-static.sd b/ld/testsuite/ld-mips-elf/vxworks2-static.sd
new file mode 100644
index 00000000000..912755bc472
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks2-static.sd
@@ -0,0 +1,9 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80000
+#...
+Program Headers:
+  Type .*
+  LOAD .* 0x00080000 0x00080000 .* R E 0x1000
+
+#...
diff --git a/ld/testsuite/ld-mips-elf/vxworks2.s b/ld/testsuite/ld-mips-elf/vxworks2.s
new file mode 100644
index 00000000000..25f078e8acd
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks2.s
@@ -0,0 +1,5 @@
+	.globl	_start
+	.type	_start, @function
+_start:
+	jr	$31
+	.size	_start, .-_start
diff --git a/ld/testsuite/ld-mips-elf/vxworks2.sd b/ld/testsuite/ld-mips-elf/vxworks2.sd
new file mode 100644
index 00000000000..5ff87d3bef8
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks2.sd
@@ -0,0 +1,13 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80400
+#...
+Program Headers:
+  Type .*
+  PHDR .*
+#...
+  LOAD .* 0x00080000 0x00080000 .* R E 0x1000
+  LOAD .* 0x00081000 0x00081000 .* RW  0x1000
+  DYNAMIC .*
+
+#...
diff --git a/ld/testsuite/ld-sparc/vxworks1-lib.dd b/ld/testsuite/ld-sparc/vxworks1-lib.dd
new file mode 100644
index 00000000000..49dab7bc4a8
--- /dev/null
+++ b/ld/testsuite/ld-sparc/vxworks1-lib.dd
@@ -0,0 +1,45 @@
+
+.*:     file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+   80800:	c4 05 e0 08 	ld  \[ %l7 \+ 8 \], %g2
+   80804:	81 c0 80 00 	jmp  %g2
+   80808:	01 00 00 00 	nop 
+   8080c:	03 00 00 00 	sethi  %hi\(0\), %g1
+   80810:	82 10 60 0c 	or  %g1, 0xc, %g1	! c <_PROCEDURE_LINKAGE_TABLE_-0x807f4>
+   80814:	c2 05 c0 01 	ld  \[ %l7 \+ %g1 \], %g1
+   80818:	81 c0 40 00 	jmp  %g1
+   8081c:	01 00 00 00 	nop 
+   80820:	03 00 00 00 	sethi  %hi\(0\), %g1
+   80824:	10 bf ff f7 	b  80800 <_PROCEDURE_LINKAGE_TABLE_>
+   80828:	82 10 60 00 	mov  %g1, %g1	! 0 <_PROCEDURE_LINKAGE_TABLE_-0x80800>
+Disassembly of section \.text:
+
+00080c00 <foo>:
+   80c00:	9d e3 bf 98 	save  %sp, -104, %sp
+   80c04:	2f 00 00 00 	sethi  %hi\(0\), %l7
+   80c08:	ee 05 e0 00 	ld  \[ %l7 \], %l7
+   80c0c:	ee 05 e0 00 	ld  \[ %l7 \], %l7
+   80c10:	03 00 00 00 	sethi  %hi\(0\), %g1
+   80c14:	82 10 60 10 	or  %g1, 0x10, %g1	! 10 <_PROCEDURE_LINKAGE_TABLE_-0x807f0>
+   80c18:	c2 05 c0 01 	ld  \[ %l7 \+ %g1 \], %g1
+   80c1c:	c4 00 40 00 	ld  \[ %g1 \], %g2
+   80c20:	84 00 a0 01 	inc  %g2
+   80c24:	40 00 00 08 	call  80c44 <slocal>
+   80c28:	c4 20 40 00 	st  %g2, \[ %g1 \]
+   80c2c:	7f ff fe f8 	call  8080c <_PROCEDURE_LINKAGE_TABLE_\+0xc>
+   80c30:	01 00 00 00 	nop 
+   80c34:	7f ff fe f6 	call  8080c <_PROCEDURE_LINKAGE_TABLE_\+0xc>
+   80c38:	01 00 00 00 	nop 
+   80c3c:	81 c7 e0 08 	ret 
+   80c40:	81 e8 00 00 	restore 
+
+00080c44 <slocal>:
+   80c44:	81 c3 e0 08 	retl 
+   80c48:	01 00 00 00 	nop 
+
+00080c4c <sglobal>:
+   80c4c:	81 c3 e0 08 	retl 
+   80c50:	01 00 00 00 	nop 
diff --git a/ld/testsuite/ld-sparc/vxworks1-lib.nd b/ld/testsuite/ld-sparc/vxworks1-lib.nd
new file mode 100644
index 00000000000..cbc1c8c40f8
--- /dev/null
+++ b/ld/testsuite/ld-sparc/vxworks1-lib.nd
@@ -0,0 +1,9 @@
+#...
+Symbol table '\.dynsym' .*:
+#...
+.*: 00090400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#...
+Symbol table '\.symtab' .*:
+#...
+.*: 00090400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#pass
diff --git a/ld/testsuite/ld-sparc/vxworks1-lib.rd b/ld/testsuite/ld-sparc/vxworks1-lib.rd
new file mode 100644
index 00000000000..1390e78ab36
--- /dev/null
+++ b/ld/testsuite/ld-sparc/vxworks1-lib.rd
@@ -0,0 +1,12 @@
+
+Relocation section '\.rela\.plt' at offset .* contains 1 entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
+0009040c  .*15 R_SPARC_JMP_SLOT  00000000   sexternal \+ 0
+
+Relocation section '\.rela\.dyn' at offset .* contains 5 entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
+00090c00  00000016 R_SPARC_RELATIVE                             00080c44
+00080c04  .*09 R_SPARC_HI22      00000000   __GOTT_BASE__ \+ 0
+00080c08  .*0c R_SPARC_LO10      00000000   __GOTT_BASE__ \+ 0
+00080c0c  .*0c R_SPARC_LO10      00000000   __GOTT_INDEX__ \+ 0
+00090410  .*14 R_SPARC_GLOB_DAT  00090800   x \+ 0
diff --git a/ld/testsuite/ld-sparc/vxworks1-lib.s b/ld/testsuite/ld-sparc/vxworks1-lib.s
new file mode 100644
index 00000000000..e1221a22153
--- /dev/null
+++ b/ld/testsuite/ld-sparc/vxworks1-lib.s
@@ -0,0 +1,44 @@
+	.text
+	.globl	foo
+	.type	foo, %function
+foo:
+	save	%sp, -104, %sp
+	sethi	%hi(__GOTT_BASE__), %l7
+	ld	[%l7+%lo(__GOTT_BASE__)],%l7
+	ld	[%l7+%lo(__GOTT_INDEX__)],%l7
+	sethi	%hi(x), %g1
+	or	%g1, %lo(x), %g1
+	ld	[%l7+%g1], %g1
+	ld	[%g1], %g2
+	add	%g2, 1, %g2
+
+	call	slocal, 0
+	st	%g2, [%g1]
+
+	call	sexternal, 0
+	nop
+
+	call	sexternal, 0
+	nop
+
+	ret
+	restore
+	.size	foo, .-foo
+
+	.type	slocal, %function
+slocal:
+	retl
+	nop
+	.size	slocal, .-slocal
+
+	.globl	sglobal
+	.type	sglobal, %function
+sglobal:
+	retl
+	nop
+	.size	sglobal, .-sglobal
+
+	.data
+	.4byte	slocal
+
+	.comm	x,4,4
diff --git a/ld/testsuite/ld-sparc/vxworks1-static.d b/ld/testsuite/ld-sparc/vxworks1-static.d
new file mode 100644
index 00000000000..88c0baf1bbb
--- /dev/null
+++ b/ld/testsuite/ld-sparc/vxworks1-static.d
@@ -0,0 +1,4 @@
+#name: VxWorks executable test 1 (static)
+#source: vxworks1.s
+#ld: tmpdir/libvxworks1.so -Tvxworks1.ld
+#error: Dynamic sections created in non-dynamic link
diff --git a/ld/testsuite/ld-sparc/vxworks1.dd b/ld/testsuite/ld-sparc/vxworks1.dd
new file mode 100644
index 00000000000..16e72fdac31
--- /dev/null
+++ b/ld/testsuite/ld-sparc/vxworks1.dd
@@ -0,0 +1,52 @@
+
+.*:     file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+   80800:	05 00 02 41 	sethi  %hi\(0x90400\), %g2
+			80800: R_SPARC_HI22	_GLOBAL_OFFSET_TABLE_\+0x8
+   80804:	84 10 a0 08 	or  %g2, 8, %g2	! 90408 <_GLOBAL_OFFSET_TABLE_\+0x8>
+			80804: R_SPARC_LO10	_GLOBAL_OFFSET_TABLE_\+0x8
+   80808:	c4 00 80 00 	ld  \[ %g2 \], %g2
+   8080c:	81 c0 80 00 	jmp  %g2
+   80810:	01 00 00 00 	nop 
+   80814:	03 00 02 41 	sethi  %hi\(0x90400\), %g1
+			80814: R_SPARC_HI22	_GLOBAL_OFFSET_TABLE_\+0xc
+   80818:	82 10 60 0c 	or  %g1, 0xc, %g1	! 9040c <sglobal@plt>
+			80818: R_SPARC_LO10	_GLOBAL_OFFSET_TABLE_\+0xc
+   8081c:	c2 00 40 00 	ld  \[ %g1 \], %g1
+   80820:	81 c0 40 00 	jmp  %g1
+   80824:	01 00 00 00 	nop 
+   80828:	03 00 00 00 	sethi  %hi\(0\), %g1
+   8082c:	10 bf ff f5 	b  80800 <_PROCEDURE_LINKAGE_TABLE_>
+   80830:	82 10 60 00 	mov  %g1, %g1	! 0 <_PROCEDURE_LINKAGE_TABLE_-0x80800>
+   80834:	03 00 02 41 	sethi  %hi\(0x90400\), %g1
+			80834: R_SPARC_HI22	_GLOBAL_OFFSET_TABLE_\+0x10
+   80838:	82 10 60 10 	or  %g1, 0x10, %g1	! 90410 <foo@plt>
+			80838: R_SPARC_LO10	_GLOBAL_OFFSET_TABLE_\+0x10
+   8083c:	c2 00 40 00 	ld  \[ %g1 \], %g1
+   80840:	81 c0 40 00 	jmp  %g1
+   80844:	01 00 00 00 	nop 
+   80848:	03 00 00 00 	sethi  %hi\(0\), %g1
+   8084c:	10 bf ff ed 	b  80800 <_PROCEDURE_LINKAGE_TABLE_>
+   80850:	82 10 60 01 	or  %g1, 1, %g1	! 1 <_PROCEDURE_LINKAGE_TABLE_-0x807ff>
+Disassembly of section \.text:
+
+00080c00 <_start>:
+   80c00:	9d e3 bf 98 	save  %sp, -104, %sp
+   80c04:	7f ff ff 0c 	call  80834 <_PROCEDURE_LINKAGE_TABLE_\+0x34>
+			80c04: R_SPARC_WDISP30	\.plt\+0x34
+   80c08:	01 00 00 00 	nop 
+   80c0c:	40 00 00 06 	call  80c24 <sexternal>
+			80c0c: R_SPARC_WDISP30	sexternal
+   80c10:	01 00 00 00 	nop 
+   80c14:	7f ff ff 00 	call  80814 <_PROCEDURE_LINKAGE_TABLE_\+0x14>
+			80c14: R_SPARC_WDISP30	\.plt\+0x14
+   80c18:	01 00 00 00 	nop 
+   80c1c:	81 c7 e0 08 	ret 
+   80c20:	81 e8 00 00 	restore 
+
+00080c24 <sexternal>:
+   80c24:	81 c3 e0 08 	retl 
+   80c28:	01 00 00 00 	nop 
diff --git a/ld/testsuite/ld-sparc/vxworks1.ld b/ld/testsuite/ld-sparc/vxworks1.ld
new file mode 100644
index 00000000000..979d7733548
--- /dev/null
+++ b/ld/testsuite/ld-sparc/vxworks1.ld
@@ -0,0 +1,30 @@
+SECTIONS
+{
+  . = 0x80000;
+  .interp : { *(.interp) }
+  .hash : { *(.hash) }
+  .dynsym : { *(.dynsym) }
+  .dynstr : { *(.dynstr) }
+
+  . = ALIGN (0x400);
+  .rela.dyn : { *(.rela.dyn) }
+  .rela.plt : { *(.rela.plt) }
+
+  . = ALIGN (0x400);
+  .plt : { *(.plt) }
+
+  . = ALIGN (0x400);
+  .text : { *(.text) }
+
+  . = ALIGN (0x10000);
+  .dynamic : { *(.dynamic) }
+
+  . = ALIGN (0x400);
+  .got : { *(.got.plt) *(.got) }
+
+  . = ALIGN (0x400);
+  .bss : { *(.bss) }
+
+  . = ALIGN (0x400);
+  .data : { *(.data) }
+}
diff --git a/ld/testsuite/ld-sparc/vxworks1.rd b/ld/testsuite/ld-sparc/vxworks1.rd
new file mode 100644
index 00000000000..e02146b4f87
--- /dev/null
+++ b/ld/testsuite/ld-sparc/vxworks1.rd
@@ -0,0 +1,22 @@
+
+Relocation section '\.rela\.plt' at offset .* contains 2 entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
+0009040c  .*15 R_SPARC_JMP_SLOT  00080814   sglobal \+ 0
+00090410  .*15 R_SPARC_JMP_SLOT  00080834   foo \+ 0
+
+Relocation section '\.rela\.text' at offset .* contains 3 entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
+00080c04  .*07 R_SPARC_WDISP30   00080800   \.plt \+ 34
+00080c0c  .*07 R_SPARC_WDISP30   00080c24   sexternal \+ 0
+00080c14  .*07 R_SPARC_WDISP30   00080800   \.plt \+ 14
+
+Relocation section '\.rela\.plt\.unloaded' at offset .* contains 8 entries:
+ Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
+00080800  .*09 R_SPARC_HI22      00090400   _GLOBAL_OFFSET_TABLE_ \+ 8
+00080804  .*0c R_SPARC_LO10      00090400   _GLOBAL_OFFSET_TABLE_ \+ 8
+00080814  .*09 R_SPARC_HI22      00090400   _GLOBAL_OFFSET_TABLE_ \+ c
+00080818  .*0c R_SPARC_LO10      00090400   _GLOBAL_OFFSET_TABLE_ \+ c
+0009040c  .*03 R_SPARC_32        00080800   _PROCEDURE_LINKAGE_TAB.* \+ 28
+00080834  .*09 R_SPARC_HI22      00090400   _GLOBAL_OFFSET_TABLE_ \+ 10
+00080838  .*0c R_SPARC_LO10      00090400   _GLOBAL_OFFSET_TABLE_ \+ 10
+00090410  .*03 R_SPARC_32        00080800   _PROCEDURE_LINKAGE_TAB.* \+ 48
diff --git a/ld/testsuite/ld-sparc/vxworks1.s b/ld/testsuite/ld-sparc/vxworks1.s
new file mode 100644
index 00000000000..82106c8107b
--- /dev/null
+++ b/ld/testsuite/ld-sparc/vxworks1.s
@@ -0,0 +1,25 @@
+	.text
+	.globl	_start
+	.type	_start, %function
+_start:
+	save	%sp, -104, %sp
+
+	call	foo, 0
+	nop
+
+	call	sexternal, 0
+	nop
+
+	call	sglobal, 0
+	nop
+
+	ret
+	restore
+	.size	_start, .-_start
+
+	.globl	sexternal
+	.type	sexternal, %function
+sexternal:
+	retl
+	nop
+	.size	sexternal, .-sexternal
diff --git a/ld/testsuite/ld-sparc/vxworks2-static.sd b/ld/testsuite/ld-sparc/vxworks2-static.sd
new file mode 100644
index 00000000000..55fc529619b
--- /dev/null
+++ b/ld/testsuite/ld-sparc/vxworks2-static.sd
@@ -0,0 +1,9 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80000
+#...
+Program Headers:
+  Type .*
+  LOAD .* 0x00080000 0x00080000 .* R E 0x10000
+
+#...
diff --git a/ld/testsuite/ld-sparc/vxworks2.s b/ld/testsuite/ld-sparc/vxworks2.s
new file mode 100644
index 00000000000..0a883a97d38
--- /dev/null
+++ b/ld/testsuite/ld-sparc/vxworks2.s
@@ -0,0 +1,6 @@
+	.globl	_start
+	.type	_start, %function
+_start:
+	retl
+	nop
+	.end	_start
diff --git a/ld/testsuite/ld-sparc/vxworks2.sd b/ld/testsuite/ld-sparc/vxworks2.sd
new file mode 100644
index 00000000000..087656882a0
--- /dev/null
+++ b/ld/testsuite/ld-sparc/vxworks2.sd
@@ -0,0 +1,13 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80400
+#...
+Program Headers:
+  Type .*
+  PHDR .*
+#...
+  LOAD .* 0x00080000 0x00080000 .* R E 0x10000
+  LOAD .* 0x00090000 0x00090000 .* RW  0x10000
+  DYNAMIC .*
+
+#...