From: Philippe Mathieu-Daudé Date: Sun, 30 May 2021 09:36:29 +0000 (+0200) Subject: target/mips: Fix TCG temporary leaks in gen_pool32a5_nanomips_insn() X-Git-Tag: v6.1.0-rc0~55^2~13 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=96342d53a881a5686b1e4797aead1c025985772e;p=thirdparty%2Fqemu.git target/mips: Fix TCG temporary leaks in gen_pool32a5_nanomips_insn() Fix a pair of TCG temporary leak when translating nanoMIPS SHILO opcode. Fixes: 3285a3e4445 ("target/mips: Add emulation of DSP ASE for nanoMIPS") Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20210530094538.1275329-1-f4bug@amsat.org> --- diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 797eba44347..120484a6c06 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -20182,6 +20182,8 @@ static void gen_pool32a5_nanomips_insn(DisasContext *ctx, int opc, tcg_gen_movi_tl(tv0, rd >> 3); tcg_gen_movi_tl(tv1, imm); gen_helper_shilo(tv0, tv1, cpu_env); + tcg_temp_free(tv1); + tcg_temp_free(tv0); } break; case NM_MULEQ_S_W_PHL: