From: jakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Wed, 9 Mar 2016 14:10:58 +0000 (+0000)
Subject: 	PR target/70049
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=96abb9f5abc45fd93c63f5f4a3646c462e95125d;p=thirdparty%2Fgcc.git

	PR target/70049
	* config/i386/sse.md (*vec_extract<mode>): Use %0 instead of %k0
	if the operand is "m".

	* gcc.target/i386/pr70049.c: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@234085 138bc75d-0d04-0410-961f-82ee72b054a4
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2b0801a4ee42..c99bf6415b24 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-03-09  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/70049
+	* config/i386/sse.md (*vec_extract<mode>): Use %0 instead of %k0
+	if the operand is "m".
+
 2016-03-09  Nathan Sidwell  <nathan@acm.org>
 
 	* config/nvptx/nvptx.c (nvptx_option_override): Don't kill debug level.
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 3dd787c6abb2..00e385aee2a3 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -13307,7 +13307,9 @@
 	  (parallel
 	    [(match_operand:SI 2 "const_0_to_<ssescalarnummask>_operand")])))]
   "TARGET_SSE2"
-  "%vpextr<ssemodesuffix>\t{%2, %1, %k0|%k0, %1, %2}"
+  "@
+   %vpextr<ssemodesuffix>\t{%2, %1, %k0|%k0, %1, %2}
+   %vpextr<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "isa" "*,sse4")
    (set_attr "type" "sselog1")
    (set_attr "prefix_data16" "1")
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 9ea56a7b9fc9..131ed75c624e 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-03-09  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/70049
+	* gcc.target/i386/pr70049.c: New test.
+
 2016-03-09  Richard Biener  <rguenther@suse.de>
 
 	PR c/70143
diff --git a/gcc/testsuite/gcc.target/i386/pr70049.c b/gcc/testsuite/gcc.target/i386/pr70049.c
new file mode 100644
index 000000000000..a659bb35b0d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr70049.c
@@ -0,0 +1,20 @@
+/* PR target/70049 */
+/* { dg-do assemble { target avx } } */
+/* { dg-require-effective-target masm_intel } */
+/* { dg-options "-Og -mavx -masm=intel" } */
+
+typedef unsigned short A;
+typedef unsigned short B __attribute__ ((vector_size (32)));
+typedef unsigned int C;
+typedef unsigned int D __attribute__ ((vector_size (32)));
+typedef unsigned long long E;
+typedef unsigned long long F __attribute__ ((vector_size (32)));
+
+C
+foo(A a, C b, E c, F d, B e, D f, F g)
+{
+  b <<= 28;
+  e[1] += b;
+  d %= (F) { 0, f[4] } | 1;
+  return a + b + c + d[3] + e[1] + g[3];
+}