From: Tim Lee Date: Mon, 28 Apr 2025 02:29:34 +0000 (+0800) Subject: hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=97cdd1b0a7a010702a1d118b74c3af3bb2edb35c;p=thirdparty%2Fqemu.git hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC NPCM8XX SoC is the successor of the NPCM7XX. It features quad-core Cortex-A35 (Armv8, 64-bit) CPUs and some additional peripherals. Correct the `valid_cpu_types` setting to match the NPCM8XX SoC. Cc: qemu-stable@nongnu.org Fixes: 7e70eb3cad7c83 ("hw/arm: Add NPCM845 Evaluation board") Signed-off-by: Tim Lee Message-id: 20250428022934.3081139-1-timlee660101@gmail.com Reviewed-by: Peter Maydell Reviewed-by: Tyrone Ting Signed-off-by: Peter Maydell --- diff --git a/hw/arm/npcm8xx_boards.c b/hw/arm/npcm8xx_boards.c index 9d9f6d0c9a..3bf3e1f8f1 100644 --- a/hw/arm/npcm8xx_boards.c +++ b/hw/arm/npcm8xx_boards.c @@ -213,7 +213,7 @@ static void npcm8xx_machine_class_init(ObjectClass *oc, const void *data) { MachineClass *mc = MACHINE_CLASS(oc); static const char * const valid_cpu_types[] = { - ARM_CPU_TYPE_NAME("cortex-a9"), + ARM_CPU_TYPE_NAME("cortex-a35"), NULL };