From: Chao-ying Fu Date: Fri, 5 Nov 2010 00:28:54 +0000 (+0000) Subject: mips32-dsp.c: Add tests for madd, maddu, msub, msubu, mult, multu. X-Git-Tag: releases/gcc-4.6.0~2897 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9804d4ecb057dfad2d03387c7b4b8c9e8d3cb04f;p=thirdparty%2Fgcc.git mips32-dsp.c: Add tests for madd, maddu, msub, msubu, mult, multu. 2010-11-04 Chao-ying Fu * gcc.target/mips/mips32-dsp.c: Add tests for madd, maddu, msub, msubu, mult, multu. * gcc.target/mips/mips32-dsp-run.c: Likewise. From-SVN: r166345 --- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3b1dcab04054..7bac010f78a3 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2010-11-04 Chao-ying Fu + + * gcc.target/mips/mips32-dsp.c: Add tests for madd, maddu, msub, + msubu, mult, multu. + * gcc.target/mips/mips32-dsp-run.c: Likewise. + 2010-11-04 Nicola Pero Fixed using the Objective-C 2.0 dot-syntax with class names. diff --git a/gcc/testsuite/gcc.target/mips/mips32-dsp-run.c b/gcc/testsuite/gcc.target/mips/mips32-dsp-run.c index e6a271e246bb..ccbdef553ee0 100644 --- a/gcc/testsuite/gcc.target/mips/mips32-dsp-run.c +++ b/gcc/testsuite/gcc.target/mips/mips32-dsp-run.c @@ -10,6 +10,7 @@ typedef short v2q15 __attribute__ ((vector_size(4))); typedef int q31; typedef int i32; +typedef unsigned int ui32; typedef long long a64; NOMIPS16 void test_MIPS_DSP (void); @@ -59,6 +60,7 @@ NOMIPS16 void test_MIPS_DSP () v2q15 v2q15_a,v2q15_b,v2q15_c,v2q15_r,v2q15_s; q31 q31_a,q31_b,q31_c,q31_r,q31_s; i32 i32_a,i32_b,i32_c,i32_r,i32_s; + ui32 ui32_a,ui32_b,ui32_c; a64 a64_a,a64_b,a64_c,a64_r,a64_s; void *ptr_a; @@ -997,5 +999,63 @@ NOMIPS16 void test_MIPS_DSP () i32_r = __builtin_mips_bposge32 (); if (i32_r != i32_s) abort (); + +#ifndef __mips64 + a64_a = 0x12345678; + i32_b = 0x80000000; + i32_c = 0x11112222; + a64_s = 0xF7776EEF12345678LL; + a64_r = __builtin_mips_madd (a64_a, i32_b, i32_c); + if (a64_r != a64_s) + abort (); +#endif + +#ifndef __mips64 + a64_a = 0x12345678; + ui32_b = 0x80000000; + ui32_c = 0x11112222; + a64_s = 0x0888911112345678LL; + a64_r = __builtin_mips_maddu (a64_a, ui32_b, ui32_c); + if (a64_r != a64_s) + abort (); +#endif + +#ifndef __mips64 + a64_a = 0x12345678; + i32_b = 0x80000000; + i32_c = 0x11112222; + a64_s = 0x0888911112345678LL; + a64_r = __builtin_mips_msub (a64_a, i32_b, i32_c); + if (a64_r != a64_s) + abort (); +#endif + +#ifndef __mips64 + a64_a = 0x12345678; + ui32_b = 0x80000000; + ui32_c = 0x11112222; + a64_s = 0xF7776EEF12345678LL; + a64_r = __builtin_mips_msubu (a64_a, ui32_b, ui32_c); + if (a64_r != a64_s) + abort (); +#endif + +#ifndef __mips64 + i32_a = 0x80000000; + i32_b = 0x11112222; + a64_s = 0xF7776EEF00000000LL; + a64_r = __builtin_mips_mult (i32_a, i32_b); + if (a64_r != a64_s) + abort (); +#endif + +#ifndef __mips64 + ui32_a = 0x80000000; + ui32_b = 0x11112222; + a64_s = 0x888911100000000LL; + a64_r = __builtin_mips_multu (ui32_a, ui32_b); + if (a64_r != a64_s) + abort (); +#endif } diff --git a/gcc/testsuite/gcc.target/mips/mips32-dsp.c b/gcc/testsuite/gcc.target/mips/mips32-dsp.c index c00ea3e0b494..c2a8ae775051 100644 --- a/gcc/testsuite/gcc.target/mips/mips32-dsp.c +++ b/gcc/testsuite/gcc.target/mips/mips32-dsp.c @@ -92,6 +92,12 @@ /* { dg-final { scan-assembler "lhx?" } } */ /* { dg-final { scan-assembler "lwx?" } } */ /* { dg-final { scan-assembler "bposge32" } } */ +/* { dg-final { scan-assembler "madd" } } */ +/* { dg-final { scan-assembler "maddu" } } */ +/* { dg-final { scan-assembler "msub" } } */ +/* { dg-final { scan-assembler "msubu" } } */ +/* { dg-final { scan-assembler "mult" } } */ +/* { dg-final { scan-assembler "multu" } } */ #include #include @@ -101,6 +107,7 @@ typedef short v2q15 __attribute__ ((vector_size(4))); typedef int q31; typedef int i32; +typedef unsigned int ui32; typedef long long a64; NOMIPS16 void test_MIPS_DSP (void); @@ -150,6 +157,7 @@ NOMIPS16 void test_MIPS_DSP () v2q15 v2q15_a,v2q15_b,v2q15_c,v2q15_r,v2q15_s; q31 q31_a,q31_b,q31_c,q31_r,q31_s; i32 i32_a,i32_b,i32_c,i32_r,i32_s; + ui32 ui32_a,ui32_b,ui32_c; a64 a64_a,a64_b,a64_c,a64_r,a64_s; void *ptr_a; @@ -1088,5 +1096,63 @@ NOMIPS16 void test_MIPS_DSP () i32_r = __builtin_mips_bposge32 (); if (i32_r != i32_s) abort (); + +#ifndef __mips64 + a64_a = 0x12345678; + i32_b = 0x80000000; + i32_c = 0x11112222; + a64_s = 0xF7776EEF12345678LL; + a64_r = __builtin_mips_madd (a64_a, i32_b, i32_c); + if (a64_r != a64_s) + abort (); +#endif + +#ifndef __mips64 + a64_a = 0x12345678; + ui32_b = 0x80000000; + ui32_c = 0x11112222; + a64_s = 0x0888911112345678LL; + a64_r = __builtin_mips_maddu (a64_a, ui32_b, ui32_c); + if (a64_r != a64_s) + abort (); +#endif + +#ifndef __mips64 + a64_a = 0x12345678; + i32_b = 0x80000000; + i32_c = 0x11112222; + a64_s = 0x0888911112345678LL; + a64_r = __builtin_mips_msub (a64_a, i32_b, i32_c); + if (a64_r != a64_s) + abort (); +#endif + +#ifndef __mips64 + a64_a = 0x12345678; + ui32_b = 0x80000000; + ui32_c = 0x11112222; + a64_s = 0xF7776EEF12345678LL; + a64_r = __builtin_mips_msubu (a64_a, ui32_b, ui32_c); + if (a64_r != a64_s) + abort (); +#endif + +#ifndef __mips64 + i32_a = 0x80000000; + i32_b = 0x11112222; + a64_s = 0xF7776EEF00000000LL; + a64_r = __builtin_mips_mult (i32_a, i32_b); + if (a64_r != a64_s) + abort (); +#endif + +#ifndef __mips64 + ui32_a = 0x80000000; + ui32_b = 0x11112222; + a64_s = 0x888911100000000LL; + a64_r = __builtin_mips_multu (ui32_a, ui32_b); + if (a64_r != a64_s) + abort (); +#endif }