From: Karel Zak Date: Wed, 15 Mar 2017 10:49:22 +0000 (+0100) Subject: tests: refresh lscpu tests X-Git-Tag: v2.30-rc1~181 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=999448d86609cef27a481c6e0ed9006b27f19558;p=thirdparty%2Futil-linux.git tests: refresh lscpu tests .. due to libsmartcols use for the default output. The output does not contain extra unnecessary blank space anymore. Signed-off-by: Karel Zak --- diff --git a/tests/expected/lscpu/lscpu-armv7 b/tests/expected/lscpu/lscpu-armv7 index 6f7db2b6b8..e67af47626 100644 --- a/tests/expected/lscpu/lscpu-armv7 +++ b/tests/expected/lscpu/lscpu-armv7 @@ -1,13 +1,13 @@ -CPU(s): 2 -On-line CPU(s) list: 0,1 -Thread(s) per core: 1 -Core(s) per socket: 2 -Socket(s): 1 -Model: 4 -CPU max MHz: 1700.0000 -CPU min MHz: 200.0000 -BogoMIPS: 1694.10 -Flags: swp half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpv4 idiva idivt +CPU(s): 2 +On-line CPU(s) list: 0,1 +Thread(s) per core: 1 +Core(s) per socket: 2 +Socket(s): 1 +Model: 4 +CPU max MHz: 1700.0000 +CPU min MHz: 200.0000 +BogoMIPS: 1694.10 +Flags: swp half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpv4 idiva idivt # The following is the parsable format, which can be fed to other # programs. Each different item in every column has an unique ID diff --git a/tests/expected/lscpu/lscpu-ppc-qemu b/tests/expected/lscpu/lscpu-ppc-qemu index e6cc68bbd2..bf8e49e48c 100644 --- a/tests/expected/lscpu/lscpu-ppc-qemu +++ b/tests/expected/lscpu/lscpu-ppc-qemu @@ -1,13 +1,13 @@ -CPU(s): 1 -On-line CPU(s) list: 0 -Thread(s) per core: 1 -Core(s) per socket: 1 -Socket(s): 1 -Model: 3.1 (pvr 0008 0301) -Model name: 740/750 -BogoMIPS: 33.25 -L1d cache: unknown size -L1i cache: unknown size +CPU(s): 1 +On-line CPU(s) list: 0 +Thread(s) per core: 1 +Core(s) per socket: 1 +Socket(s): 1 +Model: 3.1 (pvr 0008 0301) +Model name: 740/750 +BogoMIPS: 33.25 +L1d cache: unknown size +L1i cache: unknown size # The following is the parsable format, which can be fed to other # programs. Each different item in every column has an unique ID diff --git a/tests/expected/lscpu/lscpu-ppc64-POWER7 b/tests/expected/lscpu/lscpu-ppc64-POWER7 index 7ae7ea14eb..8c4dca0f04 100644 --- a/tests/expected/lscpu/lscpu-ppc64-POWER7 +++ b/tests/expected/lscpu/lscpu-ppc64-POWER7 @@ -1,14 +1,14 @@ -CPU(s): 16 -On-line CPU(s) list: 0-15 -Thread(s) per core: 4 -Core(s) per socket: 1 -Socket(s): 4 -NUMA node(s): 1 -Model: 2.1 (pvr 003f 0201) -Model name: POWER7 (architected), altivec supported -L1d cache: 32K -L1i cache: 32K -NUMA node0 CPU(s): 0-15 +CPU(s): 16 +On-line CPU(s) list: 0-15 +Thread(s) per core: 4 +Core(s) per socket: 1 +Socket(s): 4 +NUMA node(s): 1 +Model: 2.1 (pvr 003f 0201) +Model name: POWER7 (architected), altivec supported +L1d cache: 32K +L1i cache: 32K +NUMA node0 CPU(s): 0-15 # The following is the parsable format, which can be fed to other # programs. Each different item in every column has an unique ID diff --git a/tests/expected/lscpu/lscpu-ppc64-POWER7-64cpu b/tests/expected/lscpu/lscpu-ppc64-POWER7-64cpu index 1a9b91053d..2157b1776a 100644 --- a/tests/expected/lscpu/lscpu-ppc64-POWER7-64cpu +++ b/tests/expected/lscpu/lscpu-ppc64-POWER7-64cpu @@ -1,17 +1,17 @@ -CPU(s): 64 -On-line CPU(s) list: 0-63 -Thread(s) per core: 4 -Core(s) per socket: 1 -Socket(s): 16 -NUMA node(s): 2 -Model: 2.1 (pvr 003f 0201) -Model name: POWER7 (architected), altivec supported -Hypervisor vendor: pHyp -Virtualization type: para -L1d cache: 32K -L1i cache: 32K -NUMA node0 CPU(s): 0-63 -NUMA node1 CPU(s): +CPU(s): 64 +On-line CPU(s) list: 0-63 +Thread(s) per core: 4 +Core(s) per socket: 1 +Socket(s): 16 +NUMA node(s): 2 +Model: 2.1 (pvr 003f 0201) +Model name: POWER7 (architected), altivec supported +Hypervisor vendor: pHyp +Virtualization type: para +L1d cache: 32K +L1i cache: 32K +NUMA node0 CPU(s): 0-63 +NUMA node1 CPU(s): # The following is the parsable format, which can be fed to other # programs. Each different item in every column has an unique ID diff --git a/tests/expected/lscpu/lscpu-s390-kvm b/tests/expected/lscpu/lscpu-s390-kvm index 77c06f53e2..661d84d1c6 100644 --- a/tests/expected/lscpu/lscpu-s390-kvm +++ b/tests/expected/lscpu/lscpu-s390-kvm @@ -1,18 +1,18 @@ -CPU op-mode(s): 32-bit, 64-bit -CPU(s): 3 -On-line CPU(s) list: 0-2 -Thread(s) per core: 1 -Core(s) per socket: 1 -Socket(s) per book: 1 -Book(s): 3 -Vendor ID: IBM/S390 -Machine type: 2817 -BogoMIPS: 14367.00 -Hypervisor: KVM/Linux -Hypervisor vendor: KVM -Virtualization type: full -Dispatching mode: horizontal -Flags: esan3 zarch stfle msa ldisp eimm dfp edat etf3eh highgprs +CPU op-mode(s): 32-bit, 64-bit +CPU(s): 3 +On-line CPU(s) list: 0-2 +Thread(s) per core: 1 +Core(s) per socket: 1 +Socket(s) per book: 1 +Book(s): 3 +Vendor ID: IBM/S390 +Machine type: 2817 +BogoMIPS: 14367.00 +Hypervisor: KVM/Linux +Hypervisor vendor: KVM +Virtualization type: full +Dispatching mode: horizontal +Flags: esan3 zarch stfle msa ldisp eimm dfp edat etf3eh highgprs # The following is the parsable format, which can be fed to other # programs. Each different item in every column has an unique ID diff --git a/tests/expected/lscpu/lscpu-s390-lpar b/tests/expected/lscpu/lscpu-s390-lpar index b9daf07c34..af02cf5dca 100644 --- a/tests/expected/lscpu/lscpu-s390-lpar +++ b/tests/expected/lscpu/lscpu-s390-lpar @@ -1,19 +1,19 @@ -CPU op-mode(s): 32-bit, 64-bit -CPU(s): 20 -On-line CPU(s) list: 1-5,8-19 -Off-line CPU(s) list: 0,6,7 -Thread(s) per core: 1 -Core(s) per socket: 4 -Socket(s) per book: 6 -Book(s): 4 -Vendor ID: IBM/S390 -Machine type: 2817 -BogoMIPS: 14367.00 -Hypervisor: PR/SM -Hypervisor vendor: IBM -Virtualization type: full -Dispatching mode: vertical -Flags: esan3 zarch stfle msa ldisp eimm dfp etf3eh highgprs +CPU op-mode(s): 32-bit, 64-bit +CPU(s): 20 +On-line CPU(s) list: 1-5,8-19 +Off-line CPU(s) list: 0,6,7 +Thread(s) per core: 1 +Core(s) per socket: 4 +Socket(s) per book: 6 +Book(s): 4 +Vendor ID: IBM/S390 +Machine type: 2817 +BogoMIPS: 14367.00 +Hypervisor: PR/SM +Hypervisor vendor: IBM +Virtualization type: full +Dispatching mode: vertical +Flags: esan3 zarch stfle msa ldisp eimm dfp etf3eh highgprs # The following is the parsable format, which can be fed to other # programs. Each different item in every column has an unique ID diff --git a/tests/expected/lscpu/lscpu-s390-lpar-drawer b/tests/expected/lscpu/lscpu-s390-lpar-drawer index e5f3af99f8..d223009d6d 100644 --- a/tests/expected/lscpu/lscpu-s390-lpar-drawer +++ b/tests/expected/lscpu/lscpu-s390-lpar-drawer @@ -1,29 +1,29 @@ -CPU op-mode(s): 32-bit, 64-bit -CPU(s): 8 -On-line CPU(s) list: 0-7 -Thread(s) per core: 1 -Core(s) per socket: 8 -Socket(s) per book: 3 -Book(s) per drawer: 2 -Drawer(s): 4 -NUMA node(s): 1 -Vendor ID: IBM/S390 -Machine type: 2964 -CPU dynamic MHz: 5000 -CPU static MHz: 5000 -BogoMIPS: 20325.00 -Hypervisor: PR/SM -Hypervisor vendor: IBM -Virtualization type: full -Dispatching mode: horizontal -L1d cache: 128K -L1i cache: 96K -L2d cache: 2048K -L2i cache: 2048K -L3 cache: 65536K -L4 cache: 491520K -NUMA node0 CPU(s): 0-140 -Flags: esan3 zarch stfle msa ldisp eimm dfp edat etf3eh highgprs te vx sie +CPU op-mode(s): 32-bit, 64-bit +CPU(s): 8 +On-line CPU(s) list: 0-7 +Thread(s) per core: 1 +Core(s) per socket: 8 +Socket(s) per book: 3 +Book(s) per drawer: 2 +Drawer(s): 4 +NUMA node(s): 1 +Vendor ID: IBM/S390 +Machine type: 2964 +CPU dynamic MHz: 5000 +CPU static MHz: 5000 +BogoMIPS: 20325.00 +Hypervisor: PR/SM +Hypervisor vendor: IBM +Virtualization type: full +Dispatching mode: horizontal +L1d cache: 128K +L1i cache: 96K +L2d cache: 2048K +L2i cache: 2048K +L3 cache: 65536K +L4 cache: 491520K +NUMA node0 CPU(s): 0-140 +Flags: esan3 zarch stfle msa ldisp eimm dfp edat etf3eh highgprs te vx sie # The following is the parsable format, which can be fed to other # programs. Each different item in every column has an unique ID diff --git a/tests/expected/lscpu/lscpu-s390-zvm b/tests/expected/lscpu/lscpu-s390-zvm index 4c02b037bb..5242b30be2 100644 --- a/tests/expected/lscpu/lscpu-s390-zvm +++ b/tests/expected/lscpu/lscpu-s390-zvm @@ -1,18 +1,18 @@ -CPU op-mode(s): 32-bit, 64-bit -CPU(s): 4 -On-line CPU(s) list: 0-3 -Thread(s) per core: 1 -Core(s) per socket: 1 -Socket(s) per book: 1 -Book(s): 4 -Vendor ID: IBM/S390 -Machine type: 2817 -BogoMIPS: 14367.00 -Hypervisor: z/VM 6.1.0 -Hypervisor vendor: IBM -Virtualization type: full -Dispatching mode: horizontal -Flags: esan3 zarch stfle msa ldisp eimm dfp etf3eh highgprs +CPU op-mode(s): 32-bit, 64-bit +CPU(s): 4 +On-line CPU(s) list: 0-3 +Thread(s) per core: 1 +Core(s) per socket: 1 +Socket(s) per book: 1 +Book(s): 4 +Vendor ID: IBM/S390 +Machine type: 2817 +BogoMIPS: 14367.00 +Hypervisor: z/VM 6.1.0 +Hypervisor vendor: IBM +Virtualization type: full +Dispatching mode: horizontal +Flags: esan3 zarch stfle msa ldisp eimm dfp etf3eh highgprs # The following is the parsable format, which can be fed to other # programs. Each different item in every column has an unique ID diff --git a/tests/expected/lscpu/lscpu-sparc64 b/tests/expected/lscpu/lscpu-sparc64 index fdc5e8b290..a12c136bc4 100644 --- a/tests/expected/lscpu/lscpu-sparc64 +++ b/tests/expected/lscpu/lscpu-sparc64 @@ -1,11 +1,11 @@ -CPU op-mode(s): 32-bit, 64-bit -CPU(s): 6 -On-line CPU(s) list: 6,7,10,11,14,15 -Thread(s) per core: 1 -Core(s) per socket: 1 -Socket(s): 6 -Model name: TI UltraSparc II (BlackBird) -Flags: sun4u +CPU op-mode(s): 32-bit, 64-bit +CPU(s): 6 +On-line CPU(s) list: 6,7,10,11,14,15 +Thread(s) per core: 1 +Core(s) per socket: 1 +Socket(s): 6 +Model name: TI UltraSparc II (BlackBird) +Flags: sun4u # The following is the parsable format, which can be fed to other # programs. Each different item in every column has an unique ID diff --git a/tests/expected/lscpu/lscpu-vbox-win b/tests/expected/lscpu/lscpu-vbox-win index 595824b937..34f61302ef 100644 --- a/tests/expected/lscpu/lscpu-vbox-win +++ b/tests/expected/lscpu/lscpu-vbox-win @@ -1,26 +1,26 @@ -CPU op-mode(s): 32-bit, 64-bit -CPU(s): 2 -On-line CPU(s) list: 0,1 -Thread(s) per core: 1 -Core(s) per socket: 2 -Socket(s): 1 -NUMA node(s): 1 -Vendor ID: GenuineIntel -CPU family: 6 -Model: 58 -Model name: Intel(R) Core(TM) i5-3317U CPU @ 1.70GHz -Stepping: 9 -CPU MHz: 1600.000 -CPU max MHz: 3800.0000 -CPU min MHz: 1600.0000 -BogoMIPS: 3355.62 -Hypervisor vendor: Oracle -Virtualization type: full -L1d cache: 32K -L1d cache: 32K -L2d cache: 6144K -NUMA node0 CPU(s): 0,1 -Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx rdtscp lm constant_tsc rep_good nopl pni ssse3 lahf_lm +CPU op-mode(s): 32-bit, 64-bit +CPU(s): 2 +On-line CPU(s) list: 0,1 +Thread(s) per core: 1 +Core(s) per socket: 2 +Socket(s): 1 +NUMA node(s): 1 +Vendor ID: GenuineIntel +CPU family: 6 +Model: 58 +Model name: Intel(R) Core(TM) i5-3317U CPU @ 1.70GHz +Stepping: 9 +CPU MHz: 1600.000 +CPU max MHz: 3800.0000 +CPU min MHz: 1600.0000 +BogoMIPS: 3355.62 +Hypervisor vendor: Oracle +Virtualization type: full +L1d cache: 32K +L1d cache: 32K +L2d cache: 6144K +NUMA node0 CPU(s): 0,1 +Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx rdtscp lm constant_tsc rep_good nopl pni ssse3 lahf_lm # The following is the parsable format, which can be fed to other # programs. Each different item in every column has an unique ID diff --git a/tests/expected/lscpu/lscpu-x86_64-64cpu b/tests/expected/lscpu/lscpu-x86_64-64cpu index cf5c57a63a..432ecaf844 100644 --- a/tests/expected/lscpu/lscpu-x86_64-64cpu +++ b/tests/expected/lscpu/lscpu-x86_64-64cpu @@ -1,28 +1,28 @@ -CPU op-mode(s): 32-bit, 64-bit -CPU(s): 64 -On-line CPU(s) list: 0-63 -Thread(s) per core: 2 -Core(s) per socket: 8 -Socket(s): 4 -NUMA node(s): 3 -Vendor ID: GenuineIntel -CPU family: 6 -Model: 46 -Model name: Intel(R) Xeon(R) CPU X7550 @ 2.00GHz -Stepping: 6 -CPU MHz: 1064.000 -CPU max MHz: 1996.0000 -CPU min MHz: 1064.0000 -BogoMIPS: 3990.31 -Virtualization: VT-x -L1d cache: 32K -L1i cache: 32K -L2 cache: 256K -L3 cache: 18432K -NUMA node0 CPU(s): 0,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62 -NUMA node2 CPU(s): 1,5,9,13,17,21,25,29,33,37,41,45,49,53,57,61 -NUMA node3 CPU(s): 3,7,11,15,19,23,27,31,35,39,43,47,51,55,59,63 -Flags: fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts rep_good xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 x2apic popcnt lahf_lm ida epb dts tpr_shadow vnmi flexpriority ept vpid +CPU op-mode(s): 32-bit, 64-bit +CPU(s): 64 +On-line CPU(s) list: 0-63 +Thread(s) per core: 2 +Core(s) per socket: 8 +Socket(s): 4 +NUMA node(s): 3 +Vendor ID: GenuineIntel +CPU family: 6 +Model: 46 +Model name: Intel(R) Xeon(R) CPU X7550 @ 2.00GHz +Stepping: 6 +CPU MHz: 1064.000 +CPU max MHz: 1996.0000 +CPU min MHz: 1064.0000 +BogoMIPS: 3990.31 +Virtualization: VT-x +L1d cache: 32K +L1i cache: 32K +L2 cache: 256K +L3 cache: 18432K +NUMA node0 CPU(s): 0,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62 +NUMA node2 CPU(s): 1,5,9,13,17,21,25,29,33,37,41,45,49,53,57,61 +NUMA node3 CPU(s): 3,7,11,15,19,23,27,31,35,39,43,47,51,55,59,63 +Flags: fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts rep_good xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 x2apic popcnt lahf_lm ida epb dts tpr_shadow vnmi flexpriority ept vpid # The following is the parsable format, which can be fed to other # programs. Each different item in every column has an unique ID diff --git a/tests/expected/lscpu/lscpu-x86_64-dell_e4310 b/tests/expected/lscpu/lscpu-x86_64-dell_e4310 index 7e3ea6ed6e..631887e3a3 100644 --- a/tests/expected/lscpu/lscpu-x86_64-dell_e4310 +++ b/tests/expected/lscpu/lscpu-x86_64-dell_e4310 @@ -1,26 +1,26 @@ -CPU op-mode(s): 32-bit, 64-bit -CPU(s): 4 -On-line CPU(s) list: 0-3 -Thread(s) per core: 2 -Core(s) per socket: 2 -Socket(s): 1 -NUMA node(s): 1 -Vendor ID: GenuineIntel -CPU family: 6 -Model: 37 -Model name: Intel(R) Core(TM) i5 CPU M 560 @ 2.67GHz -Stepping: 5 -CPU MHz: 1199.000 -CPU max MHz: 2667.0000 -CPU min MHz: 1199.0000 -BogoMIPS: 5319.92 -Virtualization: VT-x -L1d cache: 32K -L1i cache: 32K -L2 cache: 256K -L3 cache: 3072K -NUMA node0 CPU(s): 0-3 -Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 popcnt aes lahf_lm ida arat dts tpr_shadow vnmi flexpriority ept vpid +CPU op-mode(s): 32-bit, 64-bit +CPU(s): 4 +On-line CPU(s) list: 0-3 +Thread(s) per core: 2 +Core(s) per socket: 2 +Socket(s): 1 +NUMA node(s): 1 +Vendor ID: GenuineIntel +CPU family: 6 +Model: 37 +Model name: Intel(R) Core(TM) i5 CPU M 560 @ 2.67GHz +Stepping: 5 +CPU MHz: 1199.000 +CPU max MHz: 2667.0000 +CPU min MHz: 1199.0000 +BogoMIPS: 5319.92 +Virtualization: VT-x +L1d cache: 32K +L1i cache: 32K +L2 cache: 256K +L3 cache: 3072K +NUMA node0 CPU(s): 0-3 +Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 popcnt aes lahf_lm ida arat dts tpr_shadow vnmi flexpriority ept vpid # The following is the parsable format, which can be fed to other # programs. Each different item in every column has an unique ID