From: Richard Sandiford <rdsandiford@googlemail.com>
Date: Mon, 27 Aug 2012 08:50:38 +0000 (+0100)
Subject: Fix operands of RECIP2.S and RECIP2.PS
X-Git-Tag: v1.1.2~20
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9a32fb28244272f4e57145646a5f4b67edb6e111;p=thirdparty%2Fqemu.git

Fix operands of RECIP2.S and RECIP2.PS

Read the second input operand of RECIP2.S and RECIP2.PS from FT rather
than FD.  RECIP2.D is already correct.

Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
(cherry picked from commit d22d7289877ecd3ef86570f6f6d0574da40711dc)

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 7dd21f4f78d..79018f0f49b 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -6805,7 +6805,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp1 = tcg_temp_new_i32();
 
             gen_load_fpr32(fp0, fs);
-            gen_load_fpr32(fp1, fd);
+            gen_load_fpr32(fp1, ft);
             gen_helper_float_recip2_s(fp0, fp0, fp1);
             tcg_temp_free_i32(fp1);
             gen_store_fpr32(fp0, fd);
@@ -7543,7 +7543,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp1 = tcg_temp_new_i64();
 
             gen_load_fpr64(ctx, fp0, fs);
-            gen_load_fpr64(ctx, fp1, fd);
+            gen_load_fpr64(ctx, fp1, ft);
             gen_helper_float_recip2_ps(fp0, fp0, fp1);
             tcg_temp_free_i64(fp1);
             gen_store_fpr64(ctx, fp0, fd);