From: BALATON Zoltan Date: Sat, 9 Jan 2021 20:16:36 +0000 (+0100) Subject: vt82c686: Correctly reset all registers to default values on reset X-Git-Tag: v6.0.0-rc0~71^2~10 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9af8e529b91d6e8a0c2911281b39179f184f09bf;p=thirdparty%2Fqemu.git vt82c686: Correctly reset all registers to default values on reset Reset the registers in the DeviceReset() handler which is called on each device reset, not in DeviceRealize() which is called once. Bit 0 of 'Power Mgmt I/O Base' register (offset 0x48) is always set. Signed-off-by: BALATON Zoltan Message-Id: Reviewed-by: Philippe Mathieu-Daudé [PMD: Split original patch, this is part 3/4 (move to reset), document] Signed-off-by: Philippe Mathieu-Daudé --- diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index fe8ae24c421..48ead5af551 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -149,9 +149,12 @@ static void vt82c686b_pm_reset(DeviceState *d) { VT686PMState *s = VT82C686B_PM(d); + memset(s->dev.config + PCI_CONFIG_HEADER_SIZE, 0, + PCI_CONFIG_SPACE_SIZE - PCI_CONFIG_HEADER_SIZE); + /* Power Management IO base */ + pci_set_long(s->dev.config + 0x48, 1); /* SMBus IO base */ pci_set_long(s->dev.config + 0x90, 1); - s->dev.config[0xd2] = 0; smb_io_space_update(s); } @@ -166,9 +169,6 @@ static void vt82c686b_pm_realize(PCIDevice *dev, Error **errp) pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MEDIUM); - /* 0x48-0x4B is Power Management I/O Base */ - pci_set_long(pci_conf + 0x48, 0x00000001); - pm_smbus_init(DEVICE(s), &s->smb, false); memory_region_add_subregion(pci_address_space_io(dev), 0, &s->smb.io); memory_region_set_enabled(&s->smb.io, false);