From: Greg Kroah-Hartman Date: Sun, 12 Mar 2017 19:13:40 +0000 (+0100) Subject: 4.4-stable patches X-Git-Tag: v4.4.54~10 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9b270459002df378de806e5833126a77da0f390d;p=thirdparty%2Fkernel%2Fstable-queue.git 4.4-stable patches added patches: drm-amdgpu-add-more-cases-to-dce11-possible-crtc-mask-setup.patch drm-ast-call-open_key-before-enable_mmio-in-post-code.patch drm-ast-fix-ast2400-post-failure-without-bmc-fw-or-vbios.patch drm-ast-fix-test-for-vga-enabled.patch drm-atomic-fix-an-error-code-in-mode_fixup.patch drm-edid-add-edid_quirk_force_8bpc-quirk-for-rotel-rsx-1058.patch drm-ttm-make-sure-bos-being-swapped-out-are-cacheable.patch fakelb-fix-schedule-while-atomic.patch --- diff --git a/queue-4.4/drm-amdgpu-add-more-cases-to-dce11-possible-crtc-mask-setup.patch b/queue-4.4/drm-amdgpu-add-more-cases-to-dce11-possible-crtc-mask-setup.patch new file mode 100644 index 00000000000..cae811cc295 --- /dev/null +++ b/queue-4.4/drm-amdgpu-add-more-cases-to-dce11-possible-crtc-mask-setup.patch @@ -0,0 +1,45 @@ +From 4ce3bd45b351633f2a0512c587f7fcba2ce044e8 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Fri, 10 Feb 2017 00:00:52 -0500 +Subject: drm/amdgpu: add more cases to DCE11 possible crtc mask setup +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Alex Deucher + +commit 4ce3bd45b351633f2a0512c587f7fcba2ce044e8 upstream. + +Add cases for asics with 3 and 5 crtcs. Fixes an artificial +limitation on asics with 3 or 5 crtcs. + +Fixes: +https://bugs.freedesktop.org/show_bug.cgi?id=99744 + +Reviewed-by: Michel Dänzer +Reviewed-by: Christian König +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c +@@ -3704,9 +3704,15 @@ static void dce_v11_0_encoder_add(struct + default: + encoder->possible_crtcs = 0x3; + break; ++ case 3: ++ encoder->possible_crtcs = 0x7; ++ break; + case 4: + encoder->possible_crtcs = 0xf; + break; ++ case 5: ++ encoder->possible_crtcs = 0x1f; ++ break; + case 6: + encoder->possible_crtcs = 0x3f; + break; diff --git a/queue-4.4/drm-ast-call-open_key-before-enable_mmio-in-post-code.patch b/queue-4.4/drm-ast-call-open_key-before-enable_mmio-in-post-code.patch new file mode 100644 index 00000000000..d1dbe23ead7 --- /dev/null +++ b/queue-4.4/drm-ast-call-open_key-before-enable_mmio-in-post-code.patch @@ -0,0 +1,34 @@ +From 9bb92f51558f2ef5f56c257bdcea0588f31d857e Mon Sep 17 00:00:00 2001 +From: "Y.C. Chen" +Date: Wed, 22 Feb 2017 15:14:19 +1100 +Subject: drm/ast: Call open_key before enable_mmio in POST code + +From: Y.C. Chen + +commit 9bb92f51558f2ef5f56c257bdcea0588f31d857e upstream. + +open_key enables access the registers used by enable_mmio + +Signed-off-by: Y.C. Chen +Signed-off-by: Benjamin Herrenschmidt +Acked-by: Joel Stanley +Tested-by: Y.C. Chen +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/ast/ast_post.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/ast/ast_post.c ++++ b/drivers/gpu/drm/ast/ast_post.c +@@ -371,8 +371,8 @@ void ast_post_gpu(struct drm_device *dev + pci_write_config_dword(ast->dev->pdev, 0x04, reg); + + ast_enable_vga(dev); +- ast_enable_mmio(dev); + ast_open_key(ast); ++ ast_enable_mmio(dev); + ast_set_def_ext_reg(dev); + + if (ast->chip == AST2300 || ast->chip == AST2400) diff --git a/queue-4.4/drm-ast-fix-ast2400-post-failure-without-bmc-fw-or-vbios.patch b/queue-4.4/drm-ast-fix-ast2400-post-failure-without-bmc-fw-or-vbios.patch new file mode 100644 index 00000000000..6074ef14f07 --- /dev/null +++ b/queue-4.4/drm-ast-fix-ast2400-post-failure-without-bmc-fw-or-vbios.patch @@ -0,0 +1,74 @@ +From 3856081eede297b617560b85e948cfb00bb395ec Mon Sep 17 00:00:00 2001 +From: "Y.C. Chen" +Date: Thu, 23 Feb 2017 15:52:33 +0800 +Subject: drm/ast: Fix AST2400 POST failure without BMC FW or VBIOS + +From: Y.C. Chen + +commit 3856081eede297b617560b85e948cfb00bb395ec upstream. + +The current POST code for the AST2300/2400 family doesn't work properly +if the chip hasn't been initialized previously by either the BMC own FW +or the VBIOS. This fixes it. + +Signed-off-by: Y.C. Chen +Signed-off-by: Benjamin Herrenschmidt +Tested-by: Y.C. Chen +Acked-by: Joel Stanley +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/ast/ast_post.c | 38 +++++++++++++++++++++++++++++++++++--- + 1 file changed, 35 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/ast/ast_post.c ++++ b/drivers/gpu/drm/ast/ast_post.c +@@ -1626,12 +1626,44 @@ static void ast_init_dram_2300(struct dr + temp |= 0x73; + ast_write32(ast, 0x12008, temp); + ++ param.dram_freq = 396; + param.dram_type = AST_DDR3; ++ temp = ast_mindwm(ast, 0x1e6e2070); + if (temp & 0x01000000) + param.dram_type = AST_DDR2; +- param.dram_chipid = ast->dram_type; +- param.dram_freq = ast->mclk; +- param.vram_size = ast->vram_size; ++ switch (temp & 0x18000000) { ++ case 0: ++ param.dram_chipid = AST_DRAM_512Mx16; ++ break; ++ default: ++ case 0x08000000: ++ param.dram_chipid = AST_DRAM_1Gx16; ++ break; ++ case 0x10000000: ++ param.dram_chipid = AST_DRAM_2Gx16; ++ break; ++ case 0x18000000: ++ param.dram_chipid = AST_DRAM_4Gx16; ++ break; ++ } ++ switch (temp & 0x0c) { ++ default: ++ case 0x00: ++ param.vram_size = AST_VIDMEM_SIZE_8M; ++ break; ++ ++ case 0x04: ++ param.vram_size = AST_VIDMEM_SIZE_16M; ++ break; ++ ++ case 0x08: ++ param.vram_size = AST_VIDMEM_SIZE_32M; ++ break; ++ ++ case 0x0c: ++ param.vram_size = AST_VIDMEM_SIZE_64M; ++ break; ++ } + + if (param.dram_type == AST_DDR3) { + get_ddr3_info(ast, ¶m); diff --git a/queue-4.4/drm-ast-fix-test-for-vga-enabled.patch b/queue-4.4/drm-ast-fix-test-for-vga-enabled.patch new file mode 100644 index 00000000000..43df6ed4aa7 --- /dev/null +++ b/queue-4.4/drm-ast-fix-test-for-vga-enabled.patch @@ -0,0 +1,42 @@ +From 905f21a49d388de3e99438235f3301cabf0c0ef4 Mon Sep 17 00:00:00 2001 +From: "Y.C. Chen" +Date: Wed, 22 Feb 2017 15:10:50 +1100 +Subject: drm/ast: Fix test for VGA enabled + +From: Y.C. Chen + +commit 905f21a49d388de3e99438235f3301cabf0c0ef4 upstream. + +The test to see if VGA was already enabled is doing an unnecessary +second test from a register that may or may not have been initialized +to a valid value. Remove it. + +Signed-off-by: Y.C. Chen +Signed-off-by: Benjamin Herrenschmidt +Acked-by: Joel Stanley +Tested-by: Y.C. Chen +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/ast/ast_post.c | 8 ++------ + 1 file changed, 2 insertions(+), 6 deletions(-) + +--- a/drivers/gpu/drm/ast/ast_post.c ++++ b/drivers/gpu/drm/ast/ast_post.c +@@ -58,13 +58,9 @@ bool ast_is_vga_enabled(struct drm_devic + /* TODO 1180 */ + } else { + ch = ast_io_read8(ast, AST_IO_VGA_ENABLE_PORT); +- if (ch) { +- ast_open_key(ast); +- ch = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xff); +- return ch & 0x04; +- } ++ return !!(ch & 0x01); + } +- return 0; ++ return false; + } + + static const u8 extreginfo[] = { 0x0f, 0x04, 0x1c, 0xff }; diff --git a/queue-4.4/drm-atomic-fix-an-error-code-in-mode_fixup.patch b/queue-4.4/drm-atomic-fix-an-error-code-in-mode_fixup.patch new file mode 100644 index 00000000000..86d9e9209ef --- /dev/null +++ b/queue-4.4/drm-atomic-fix-an-error-code-in-mode_fixup.patch @@ -0,0 +1,38 @@ +From f9ad86e42d0303eeb8e0d41bb208153022ebd9d2 Mon Sep 17 00:00:00 2001 +From: Dan Carpenter +Date: Wed, 8 Feb 2017 02:46:01 +0300 +Subject: drm/atomic: fix an error code in mode_fixup() + +From: Dan Carpenter + +commit f9ad86e42d0303eeb8e0d41bb208153022ebd9d2 upstream. + +Having "ret" be a bool type works for everything except +ret = funcs->atomic_check(). The other functions all return zero on +error but ->atomic_check() returns negative error codes. We want to +propagate the error code but instead we return 1. + +I found this bug with static analysis and I don't know if it affects +run time. + +Fixes: 4cd4df8080a3 ("drm/atomic: Add ->atomic_check() to encoder helpers") +Signed-off-by: Dan Carpenter +Signed-off-by: Daniel Vetter +Link: http://patchwork.freedesktop.org/patch/msgid/20170207234601.GA23981@mwanda +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/drm_atomic_helper.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/drm_atomic_helper.c ++++ b/drivers/gpu/drm/drm_atomic_helper.c +@@ -265,7 +265,7 @@ mode_fixup(struct drm_atomic_state *stat + struct drm_connector *connector; + struct drm_connector_state *conn_state; + int i; +- bool ret; ++ int ret; + + for_each_crtc_in_state(state, crtc, crtc_state, i) { + if (!crtc_state->mode_changed && diff --git a/queue-4.4/drm-edid-add-edid_quirk_force_8bpc-quirk-for-rotel-rsx-1058.patch b/queue-4.4/drm-edid-add-edid_quirk_force_8bpc-quirk-for-rotel-rsx-1058.patch new file mode 100644 index 00000000000..5a2aad7c0e8 --- /dev/null +++ b/queue-4.4/drm-edid-add-edid_quirk_force_8bpc-quirk-for-rotel-rsx-1058.patch @@ -0,0 +1,51 @@ +From 36fc579761b50784b63dafd0f2e796b659e0f5ee Mon Sep 17 00:00:00 2001 +From: Tomeu Vizoso +Date: Mon, 20 Feb 2017 16:25:45 +0100 +Subject: drm/edid: Add EDID_QUIRK_FORCE_8BPC quirk for Rotel RSX-1058 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Tomeu Vizoso + +commit 36fc579761b50784b63dafd0f2e796b659e0f5ee upstream. + +Rotel RSX-1058 is a receiver with 4 HDMI inputs and a HDMI output, all +1.1. + +When a sink that supports deep color is connected to the output, the +receiver will send EDIDs that advertise this capability, even if it +isn't possible with HDMI versions earlier than 1.3. + +Currently the kernel is assuming that deep color is possible and the +sink displays an error. + +This quirk will make sure that deep color isn't used with this +particular receiver. + +Fixes: 7a0baa623446 ("Revert "drm/i915: Disable 12bpc hdmi for now"") +Signed-off-by: Tomeu Vizoso +Link: http://patchwork.freedesktop.org/patch/msgid/20170220152545.13153-1-tomeu.vizoso@collabora.com +Cc: Matt Horan +Tested-by: Matt Horan +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99869 +Reviewed-by: Ville Syrjälä +Signed-off-by: Ville Syrjälä +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/drm_edid.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/gpu/drm/drm_edid.c ++++ b/drivers/gpu/drm/drm_edid.c +@@ -144,6 +144,9 @@ static struct edid_quirk { + + /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */ + { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC }, ++ ++ /* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/ ++ { "ETR", 13896, EDID_QUIRK_FORCE_8BPC }, + }; + + /* diff --git a/queue-4.4/drm-ttm-make-sure-bos-being-swapped-out-are-cacheable.patch b/queue-4.4/drm-ttm-make-sure-bos-being-swapped-out-are-cacheable.patch new file mode 100644 index 00000000000..8ede7b76df8 --- /dev/null +++ b/queue-4.4/drm-ttm-make-sure-bos-being-swapped-out-are-cacheable.patch @@ -0,0 +1,51 @@ +From 239ac65fa5ffab71adf66e642750f940e7241d99 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Michel=20D=C3=A4nzer?= +Date: Wed, 25 Jan 2017 17:21:31 +0900 +Subject: drm/ttm: Make sure BOs being swapped out are cacheable +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Michel Dänzer + +commit 239ac65fa5ffab71adf66e642750f940e7241d99 upstream. + +The current caching state may not be tt_cached, even though the +placement contains TTM_PL_FLAG_CACHED, because placement can contain +multiple caching flags. Trying to swap out such a BO would trip up the + + BUG_ON(ttm->caching_state != tt_cached); + +in ttm_tt_swapout. + +Signed-off-by: Michel Dänzer +Reviewed-by: Thomas Hellstrom +Reviewed-by: Christian König . +Reviewed-by: Sinclair Yeh +Signed-off-by: Christian König +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/ttm/ttm_bo.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/ttm/ttm_bo.c ++++ b/drivers/gpu/drm/ttm/ttm_bo.c +@@ -1621,7 +1621,6 @@ static int ttm_bo_swapout(struct ttm_mem + struct ttm_buffer_object *bo; + int ret = -EBUSY; + int put_count; +- uint32_t swap_placement = (TTM_PL_FLAG_CACHED | TTM_PL_FLAG_SYSTEM); + + spin_lock(&glob->lru_lock); + list_for_each_entry(bo, &glob->swap_lru, swap) { +@@ -1657,7 +1656,8 @@ static int ttm_bo_swapout(struct ttm_mem + if (unlikely(ret != 0)) + goto out; + +- if ((bo->mem.placement & swap_placement) != swap_placement) { ++ if (bo->mem.mem_type != TTM_PL_SYSTEM || ++ bo->ttm->caching_state != tt_cached) { + struct ttm_mem_reg evict_mem; + + evict_mem = bo->mem; diff --git a/queue-4.4/fakelb-fix-schedule-while-atomic.patch b/queue-4.4/fakelb-fix-schedule-while-atomic.patch new file mode 100644 index 00000000000..c2adc17ef0f --- /dev/null +++ b/queue-4.4/fakelb-fix-schedule-while-atomic.patch @@ -0,0 +1,72 @@ +From bdca1fd9a6df745857e23c6056494b7fe062b4e6 Mon Sep 17 00:00:00 2001 +From: Alexander Aring +Date: Thu, 1 Sep 2016 11:24:57 +0200 +Subject: fakelb: fix schedule while atomic + +From: Alexander Aring + +commit bdca1fd9a6df745857e23c6056494b7fe062b4e6 upstream. + +This patch changes the spinlock to mutex for the available fakelb phy +list. When holding the spinlock the ieee802154_unregister_hw is called +which holding the rtnl_mutex, in that case we get a "BUG: sleeping function +called from invalid context" error. We simple change the spinlock to +mutex which allows to hold the rtnl lock there. + +Signed-off-by: Alexander Aring +Signed-off-by: Marcel Holtmann +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/ieee802154/fakelb.c | 14 +++++++------- + 1 file changed, 7 insertions(+), 7 deletions(-) + +--- a/drivers/net/ieee802154/fakelb.c ++++ b/drivers/net/ieee802154/fakelb.c +@@ -30,7 +30,7 @@ + static int numlbs = 2; + + static LIST_HEAD(fakelb_phys); +-static DEFINE_SPINLOCK(fakelb_phys_lock); ++static DEFINE_MUTEX(fakelb_phys_lock); + + static LIST_HEAD(fakelb_ifup_phys); + static DEFINE_RWLOCK(fakelb_ifup_phys_lock); +@@ -180,9 +180,9 @@ static int fakelb_add_one(struct device + if (err) + goto err_reg; + +- spin_lock(&fakelb_phys_lock); ++ mutex_lock(&fakelb_phys_lock); + list_add_tail(&phy->list, &fakelb_phys); +- spin_unlock(&fakelb_phys_lock); ++ mutex_unlock(&fakelb_phys_lock); + + return 0; + +@@ -214,10 +214,10 @@ static int fakelb_probe(struct platform_ + return 0; + + err_slave: +- spin_lock(&fakelb_phys_lock); ++ mutex_lock(&fakelb_phys_lock); + list_for_each_entry_safe(phy, tmp, &fakelb_phys, list) + fakelb_del(phy); +- spin_unlock(&fakelb_phys_lock); ++ mutex_unlock(&fakelb_phys_lock); + return err; + } + +@@ -225,10 +225,10 @@ static int fakelb_remove(struct platform + { + struct fakelb_phy *phy, *tmp; + +- spin_lock(&fakelb_phys_lock); ++ mutex_lock(&fakelb_phys_lock); + list_for_each_entry_safe(phy, tmp, &fakelb_phys, list) + fakelb_del(phy); +- spin_unlock(&fakelb_phys_lock); ++ mutex_unlock(&fakelb_phys_lock); + return 0; + } + diff --git a/queue-4.4/series b/queue-4.4/series index 472186fb66a..4518896c766 100644 --- a/queue-4.4/series +++ b/queue-4.4/series @@ -22,3 +22,11 @@ nlm-ensure-callback-code-also-checks-that-the-files-match.patch pwm-pca9685-fix-period-change-with-same-duty-cycle.patch xtensa-move-parse_tag_fdt-out-of-ifdef-config_blk_dev_initrd.patch mac80211-flush-delayed-work-when-entering-suspend.patch +drm-amdgpu-add-more-cases-to-dce11-possible-crtc-mask-setup.patch +drm-ast-fix-test-for-vga-enabled.patch +drm-ast-call-open_key-before-enable_mmio-in-post-code.patch +drm-ast-fix-ast2400-post-failure-without-bmc-fw-or-vbios.patch +drm-edid-add-edid_quirk_force_8bpc-quirk-for-rotel-rsx-1058.patch +drm-ttm-make-sure-bos-being-swapped-out-are-cacheable.patch +drm-atomic-fix-an-error-code-in-mode_fixup.patch +fakelb-fix-schedule-while-atomic.patch