From: Greg Kroah-Hartman Date: Thu, 20 Feb 2014 22:23:30 +0000 (-0800) Subject: 3.13-stable patches X-Git-Tag: v3.4.82~18 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9c1b816d7b844dfd0e0d36ab16390f73e4ba821a;p=thirdparty%2Fkernel%2Fstable-queue.git 3.13-stable patches added patches: drm-i915-fix-intel_pipe_to_cpu_transcoder-for-ums.patch drm-i915-pair-va_copy-with-va_end-in-i915_error_vprintf.patch drm-i915-vlv-fix-dp-phy-lockup-due-to-invalid-pp-sequencer-setup.patch drm-radeon-cik-use-poll_reg_mem-special-op-for-sdma-hdp.patch drm-radeon-consolidate-sdma-hdp-flushing-code-for-cik.patch drm-radeon-fix-uvd-irq-support-on-7xx.patch drm-radeon-fix-uvd-irq-support-on-si.patch --- diff --git a/queue-3.13/drm-i915-fix-intel_pipe_to_cpu_transcoder-for-ums.patch b/queue-3.13/drm-i915-fix-intel_pipe_to_cpu_transcoder-for-ums.patch new file mode 100644 index 00000000000..0bc834d5dfd --- /dev/null +++ b/queue-3.13/drm-i915-fix-intel_pipe_to_cpu_transcoder-for-ums.patch @@ -0,0 +1,44 @@ +From a2d213dd77da4710bcb75f8efe85a32e3db8b39b Mon Sep 17 00:00:00 2001 +From: Daniel Vetter +Date: Fri, 7 Feb 2014 16:34:05 +0100 +Subject: drm/i915: Fix intel_pipe_to_cpu_transcoder for UMS +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Daniel Vetter + +commit a2d213dd77da4710bcb75f8efe85a32e3db8b39b upstream. + +We don't have all the drm_crtc&co hanging around in that case. + +This regression has been introduced in + +commit 391f75e2bf13f105d9e4a120736ccdd8e3bc638b +Author: Ville Syrjälä +Date: Wed Sep 25 19:55:26 2013 +0300 + + drm/i915: Fix pre-CTG vblank counter + +Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=69521 +Cc: Ville Syrjälä +Reviewed-by: Paulo Zanoni +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_irq.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/drivers/gpu/drm/i915/i915_irq.c ++++ b/drivers/gpu/drm/i915/i915_irq.c +@@ -567,8 +567,7 @@ static u32 i915_get_vblank_counter(struc + + vbl_start = mode->crtc_vblank_start * mode->crtc_htotal; + } else { +- enum transcoder cpu_transcoder = +- intel_pipe_to_cpu_transcoder(dev_priv, pipe); ++ enum transcoder cpu_transcoder = (enum transcoder) pipe; + u32 htotal; + + htotal = ((I915_READ(HTOTAL(cpu_transcoder)) >> 16) & 0x1fff) + 1; diff --git a/queue-3.13/drm-i915-pair-va_copy-with-va_end-in-i915_error_vprintf.patch b/queue-3.13/drm-i915-pair-va_copy-with-va_end-in-i915_error_vprintf.patch new file mode 100644 index 00000000000..11177aff8e0 --- /dev/null +++ b/queue-3.13/drm-i915-pair-va_copy-with-va_end-in-i915_error_vprintf.patch @@ -0,0 +1,43 @@ +From 1d2cb9a54abc6e1d239f28f07661366d5662a94a Mon Sep 17 00:00:00 2001 +From: Mika Kuoppala +Date: Fri, 7 Feb 2014 17:40:50 +0200 +Subject: drm/i915: Pair va_copy with va_end in i915_error_vprintf + +From: Mika Kuoppala + +commit 1d2cb9a54abc6e1d239f28f07661366d5662a94a upstream. + +Each invocation of va_copy() must be matched by a corresponding +invocation of va_end() in the same function. + +This regression has been introduced in + +commit e29bb4ebbf000ff9ac081d29784a3331618f012e +Author: Chris Wilson +Date: Fri Sep 20 10:20:59 2013 +0100 + + drm/i915: Use a temporary va_list for two-pass string handling + +Signed-off-by: Mika Kuoppala +Reviewed-by: Chris Wilson +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_gpu_error.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/i915/i915_gpu_error.c ++++ b/drivers/gpu/drm/i915/i915_gpu_error.c +@@ -146,7 +146,10 @@ static void i915_error_vprintf(struct dr + va_list tmp; + + va_copy(tmp, args); +- if (!__i915_error_seek(e, vsnprintf(NULL, 0, f, tmp))) ++ len = vsnprintf(NULL, 0, f, tmp); ++ va_end(tmp); ++ ++ if (!__i915_error_seek(e, len)) + return; + } + diff --git a/queue-3.13/drm-i915-vlv-fix-dp-phy-lockup-due-to-invalid-pp-sequencer-setup.patch b/queue-3.13/drm-i915-vlv-fix-dp-phy-lockup-due-to-invalid-pp-sequencer-setup.patch new file mode 100644 index 00000000000..5481702ad42 --- /dev/null +++ b/queue-3.13/drm-i915-vlv-fix-dp-phy-lockup-due-to-invalid-pp-sequencer-setup.patch @@ -0,0 +1,72 @@ +From 2cac613be8d4d661edd359cdab3c474286c4f5f0 Mon Sep 17 00:00:00 2001 +From: Imre Deak +Date: Thu, 30 Jan 2014 16:50:42 +0200 +Subject: drm/i915: vlv: fix DP PHY lockup due to invalid PP sequencer setup +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Imre Deak + +commit 2cac613be8d4d661edd359cdab3c474286c4f5f0 upstream. + +Atm we setup the HW panel power sequencer logic both for eDP and DP +ports. On eDP we then go on and start the power on sequence and commence +with link training when it's ready. On DP we don't do the power on +sequencing but do the link training immediately. At this point the DP +PHY block gets stuck, since - supposedly - it is waiting for the power +on sequence to finish. The actual register write that seems to hold off +the PHY is PIPEX_PP_ON_DELAYS[Panel Control Port Select]. Writing here +a non-0 value eventually sets PIPEX_PP_STATUS[Require Asset Status] to +1 and blocks the PHY until the panel power on is ready. + +Fix this by not doing any PP sequencing setup for DP ports. + +Thanks to Ville Syrjälä, Jesse Barnes and Todd Previte for the help in +tracking this down. + +Note that on older gmch platforms (where we have lvds instead of edp) +we've hacked around this by writing the magic ABCD unlock key to PP +registers, which disables the hw sanity checks. + +For edp all platforms thus far had the pch split, with the edp port in +the north display complex and the PP registers on the pch the hw +sanity checks (expressed through the "Require Asset Status" bit) was +never functional, hence never a real issue. + +This regression has been introduce in + +commit bf13e81b904a37d94d83dd6c3b53a147719a3ead +Author: Jani Nikula +Date: Fri Sep 6 07:40:05 2013 +0300 + + drm/i915: add support for per-pipe power sequencing on vlv + +Signed-off-by: Imre Deak +[danvet: Add note about the bigger story here.] +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_dp.c | 10 ++++++---- + 1 file changed, 6 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_dp.c ++++ b/drivers/gpu/drm/i915/intel_dp.c +@@ -1865,10 +1865,12 @@ static void vlv_pre_enable_dp(struct int + + mutex_unlock(&dev_priv->dpio_lock); + +- /* init power sequencer on this pipe and port */ +- intel_dp_init_panel_power_sequencer(dev, intel_dp, &power_seq); +- intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, +- &power_seq); ++ if (is_edp(intel_dp)) { ++ /* init power sequencer on this pipe and port */ ++ intel_dp_init_panel_power_sequencer(dev, intel_dp, &power_seq); ++ intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, ++ &power_seq); ++ } + + intel_enable_dp(encoder); + diff --git a/queue-3.13/drm-radeon-cik-use-poll_reg_mem-special-op-for-sdma-hdp.patch b/queue-3.13/drm-radeon-cik-use-poll_reg_mem-special-op-for-sdma-hdp.patch new file mode 100644 index 00000000000..8691d85cd61 --- /dev/null +++ b/queue-3.13/drm-radeon-cik-use-poll_reg_mem-special-op-for-sdma-hdp.patch @@ -0,0 +1,50 @@ +From da9e07e6f53eaac4e838bc8c987d87c5769be724 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Thu, 9 Jan 2014 16:35:39 -0500 +Subject: drm/radeon/cik: use POLL_REG_MEM special op for sDMA HDP + flush + +From: Alex Deucher + +commit da9e07e6f53eaac4e838bc8c987d87c5769be724 upstream. + +This is the preferred flushing method on CIK. + +Signed-off-by: Alex Deucher +Cc: Tom Stellard +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/cik_sdma.c | 20 ++++++++++++++------ + 1 file changed, 14 insertions(+), 6 deletions(-) + +--- a/drivers/gpu/drm/radeon/cik_sdma.c ++++ b/drivers/gpu/drm/radeon/cik_sdma.c +@@ -99,13 +99,21 @@ static void cik_sdma_hdp_flush_ring_emit + int ridx) + { + struct radeon_ring *ring = &rdev->ring[ridx]; ++ u32 extra_bits = (SDMA_POLL_REG_MEM_EXTRA_OP(1) | ++ SDMA_POLL_REG_MEM_EXTRA_FUNC(3)); /* == */ ++ u32 ref_and_mask; + +- /* We should be using the new POLL_REG_MEM special op packet here +- * but it causes sDMA to hang sometimes +- */ +- radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); +- radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2); +- radeon_ring_write(ring, 0); ++ if (ridx == R600_RING_TYPE_DMA_INDEX) ++ ref_and_mask = SDMA0; ++ else ++ ref_and_mask = SDMA1; ++ ++ radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_POLL_REG_MEM, 0, extra_bits)); ++ radeon_ring_write(ring, GPU_HDP_FLUSH_DONE); ++ radeon_ring_write(ring, GPU_HDP_FLUSH_REQ); ++ radeon_ring_write(ring, ref_and_mask); /* reference */ ++ radeon_ring_write(ring, ref_and_mask); /* mask */ ++ radeon_ring_write(ring, (0xfff << 16) | 10); /* retry count, poll interval */ + } + + /** diff --git a/queue-3.13/drm-radeon-consolidate-sdma-hdp-flushing-code-for-cik.patch b/queue-3.13/drm-radeon-consolidate-sdma-hdp-flushing-code-for-cik.patch new file mode 100644 index 00000000000..65f1c913fd3 --- /dev/null +++ b/queue-3.13/drm-radeon-consolidate-sdma-hdp-flushing-code-for-cik.patch @@ -0,0 +1,78 @@ +From ca113f6baeb314a66463c35565b4f7955c484000 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Thu, 9 Jan 2014 16:23:37 -0500 +Subject: drm/radeon: consolidate sdma hdp flushing code for CIK + +From: Alex Deucher + +commit ca113f6baeb314a66463c35565b4f7955c484000 upstream. + +It's used in several places so move to a common shared +function. + +Signed-off-by: Alex Deucher +Cc: Tom Stellard +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/cik_sdma.c | 35 +++++++++++++++++++++++------------ + 1 file changed, 23 insertions(+), 12 deletions(-) + +--- a/drivers/gpu/drm/radeon/cik_sdma.c ++++ b/drivers/gpu/drm/radeon/cik_sdma.c +@@ -88,6 +88,27 @@ void cik_sdma_ring_ib_execute(struct rad + } + + /** ++ * cik_sdma_hdp_flush_ring_emit - emit an hdp flush on the DMA ring ++ * ++ * @rdev: radeon_device pointer ++ * @ridx: radeon ring index ++ * ++ * Emit an hdp flush packet on the requested DMA ring. ++ */ ++static void cik_sdma_hdp_flush_ring_emit(struct radeon_device *rdev, ++ int ridx) ++{ ++ struct radeon_ring *ring = &rdev->ring[ridx]; ++ ++ /* We should be using the new POLL_REG_MEM special op packet here ++ * but it causes sDMA to hang sometimes ++ */ ++ radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); ++ radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2); ++ radeon_ring_write(ring, 0); ++} ++ ++/** + * cik_sdma_fence_ring_emit - emit a fence on the DMA ring + * + * @rdev: radeon_device pointer +@@ -111,12 +132,7 @@ void cik_sdma_fence_ring_emit(struct rad + /* generate an interrupt */ + radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_TRAP, 0, 0)); + /* flush HDP */ +- /* We should be using the new POLL_REG_MEM special op packet here +- * but it causes sDMA to hang sometimes +- */ +- radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); +- radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2); +- radeon_ring_write(ring, 0); ++ cik_sdma_hdp_flush_ring_emit(rdev, fence->ring); + } + + /** +@@ -747,12 +763,7 @@ void cik_dma_vm_flush(struct radeon_devi + radeon_ring_write(ring, VMID(0)); + + /* flush HDP */ +- /* We should be using the new POLL_REG_MEM special op packet here +- * but it causes sDMA to hang sometimes +- */ +- radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); +- radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2); +- radeon_ring_write(ring, 0); ++ cik_sdma_hdp_flush_ring_emit(rdev, ridx); + + /* flush TLB */ + radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); diff --git a/queue-3.13/drm-radeon-fix-uvd-irq-support-on-7xx.patch b/queue-3.13/drm-radeon-fix-uvd-irq-support-on-7xx.patch new file mode 100644 index 00000000000..93910eeb495 --- /dev/null +++ b/queue-3.13/drm-radeon-fix-uvd-irq-support-on-7xx.patch @@ -0,0 +1,31 @@ +From 858a41c853cef2cb01de34dae334c19c1c15b237 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Thu, 30 Jan 2014 14:35:04 -0500 +Subject: drm/radeon: fix UVD IRQ support on 7xx + +From: Alex Deucher + +commit 858a41c853cef2cb01de34dae334c19c1c15b237 upstream. + +Otherwise decoding isn't really useable. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/r600.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/gpu/drm/radeon/r600.c ++++ b/drivers/gpu/drm/radeon/r600.c +@@ -3904,6 +3904,10 @@ restart_ih: + break; + } + break; ++ case 124: /* UVD */ ++ DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data); ++ radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX); ++ break; + case 176: /* CP_INT in ring buffer */ + case 177: /* CP_INT in IB1 */ + case 178: /* CP_INT in IB2 */ diff --git a/queue-3.13/drm-radeon-fix-uvd-irq-support-on-si.patch b/queue-3.13/drm-radeon-fix-uvd-irq-support-on-si.patch new file mode 100644 index 00000000000..8cc8c2ae0a2 --- /dev/null +++ b/queue-3.13/drm-radeon-fix-uvd-irq-support-on-si.patch @@ -0,0 +1,38 @@ +From b927e1c20462c1ad9caf4c4fa3a30e838a2d4037 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= +Date: Thu, 30 Jan 2014 19:01:16 +0100 +Subject: drm/radeon: fix UVD IRQ support on SI +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: =?UTF-8?q?Christian=20K=C3=B6nig?= + +commit b927e1c20462c1ad9caf4c4fa3a30e838a2d4037 upstream. + +Otherwise decoding isn't really useable. + +bug: +https://bugs.freedesktop.org/show_bug.cgi?id=71448 + +Signed-off-by: Christian König +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/si.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/gpu/drm/radeon/si.c ++++ b/drivers/gpu/drm/radeon/si.c +@@ -6222,6 +6222,10 @@ restart_ih: + break; + } + break; ++ case 124: /* UVD */ ++ DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data); ++ radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX); ++ break; + case 146: + case 147: + addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR); diff --git a/queue-3.13/series b/queue-3.13/series index 0640345415d..73e0842df2f 100644 --- a/queue-3.13/series +++ b/queue-3.13/series @@ -34,3 +34,10 @@ lockd-send-correct-lock-when-granting-a-delayed-lock.patch tty-n_gsm-fix-for-modems-with-brk-in-modem-status-control.patch tty-set-correct-tty-name-in-active-sysfs-attribute.patch n_tty-fix-stale-echo-output.patch +drm-radeon-fix-uvd-irq-support-on-7xx.patch +drm-radeon-fix-uvd-irq-support-on-si.patch +drm-i915-vlv-fix-dp-phy-lockup-due-to-invalid-pp-sequencer-setup.patch +drm-i915-fix-intel_pipe_to_cpu_transcoder-for-ums.patch +drm-i915-pair-va_copy-with-va_end-in-i915_error_vprintf.patch +drm-radeon-consolidate-sdma-hdp-flushing-code-for-cik.patch +drm-radeon-cik-use-poll_reg_mem-special-op-for-sdma-hdp.patch