From: Chukun Pan <amadeus@jmu.edu.cn>
Date: Sat, 1 Nov 2025 12:00:07 +0000 (+0800)
Subject: arm64: dts: rockchip: fixes ethernet for 100ASK DshanPi A1
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9c79c9e03547068404cca5139dfea281d655ff90;p=thirdparty%2Flinux.git

arm64: dts: rockchip: fixes ethernet for 100ASK DshanPi A1

Currently, Ethernet is unusable due to an incorrect PHY address.
This commit fixes this, removes the incorrect 25M clock pinctrl,
and adds the missing PHY supply.

Fixes: d809417c5a40 ("arm64: dts: rockchip: add DTs for 100ASK DShanPi A1")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://patch.msgid.link/20251101120010.41729-3-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---

diff --git a/arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts b/arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts
index a399987c1bc24..7f64dfbf736e8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts
@@ -190,6 +190,7 @@
 	clock_in_out = "output";
 	phy-mode = "rgmii-id";
 	phy-handle = <&rgmii_phy0>;
+	phy-supply = <&vcc_3v3_s0>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&eth0m0_miim
 		     &eth0m0_tx_bus2
@@ -203,13 +204,13 @@
 	clock_in_out = "output";
 	phy-mode = "rgmii-id";
 	phy-handle = <&rgmii_phy1>;
+	phy-supply = <&vcc_3v3_s0>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&eth1m0_miim
 		     &eth1m0_tx_bus2
 		     &eth1m0_rx_bus2
 		     &eth1m0_rgmii_clk
-		     &eth1m0_rgmii_bus
-		     &ethm0_clk1_25m_out>;
+		     &eth1m0_rgmii_bus>;
 	status = "okay";
 };
 
@@ -616,10 +617,9 @@
 };
 
 &mdio0 {
-	rgmii_phy0: phy@1 {
+	rgmii_phy0: phy@0 {
 		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x1>;
-		clocks = <&cru REFCLKO25M_GMAC0_OUT>;
+		reg = <0>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&gmac0_rst>;
 		reset-assert-us = <20000>;
@@ -629,10 +629,9 @@
 };
 
 &mdio1 {
-	rgmii_phy1: phy@1 {
+	rgmii_phy1: phy@0 {
 		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x1>;
-		clocks = <&cru REFCLKO25M_GMAC1_OUT>;
+		reg = <0>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&gmac1_rst>;
 		reset-assert-us = <20000>;