From: Greg Kroah-Hartman Date: Sun, 14 Sep 2025 08:01:46 +0000 (+0200) Subject: 5.4-stable patches X-Git-Tag: v6.1.153~52 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9ca31430a82b45603b4f95610a11aed6e8bdf0c0;p=thirdparty%2Fkernel%2Fstable-queue.git 5.4-stable patches added patches: mm-khugepaged-fix-the-address-passed-to-notifier-on-testing-young.patch mtd-nand-raw-atmel-fix-comment-in-timings-preparation.patch mtd-nand-raw-atmel-respect-tar-tclr-in-read-setup-timing.patch mtd-rawnand-stm32_fmc2-avoid-overlapping-mappings-on-ecc-buffer.patch --- diff --git a/queue-5.4/mm-khugepaged-fix-the-address-passed-to-notifier-on-testing-young.patch b/queue-5.4/mm-khugepaged-fix-the-address-passed-to-notifier-on-testing-young.patch new file mode 100644 index 0000000000..be501f9b6d --- /dev/null +++ b/queue-5.4/mm-khugepaged-fix-the-address-passed-to-notifier-on-testing-young.patch @@ -0,0 +1,47 @@ +From 394bfac1c7f7b701c2c93834c5761b9c9ceeebcf Mon Sep 17 00:00:00 2001 +From: Wei Yang +Date: Fri, 22 Aug 2025 06:33:18 +0000 +Subject: mm/khugepaged: fix the address passed to notifier on testing young + +From: Wei Yang + +commit 394bfac1c7f7b701c2c93834c5761b9c9ceeebcf upstream. + +Commit 8ee53820edfd ("thp: mmu_notifier_test_young") introduced +mmu_notifier_test_young(), but we are passing the wrong address. +In xxx_scan_pmd(), the actual iteration address is "_address" not +"address". We seem to misuse the variable on the very beginning. + +Change it to the right one. + +[akpm@linux-foundation.org fix whitespace, per everyone] +Link: https://lkml.kernel.org/r/20250822063318.11644-1-richard.weiyang@gmail.com +Fixes: 8ee53820edfd ("thp: mmu_notifier_test_young") +Signed-off-by: Wei Yang +Reviewed-by: Dev Jain +Reviewed-by: Zi Yan +Acked-by: David Hildenbrand +Reviewed-by: Lorenzo Stoakes +Cc: Baolin Wang +Cc: Liam R. Howlett +Cc: Nico Pache +Cc: Ryan Roberts +Cc: Barry Song +Cc: +Signed-off-by: Andrew Morton +Signed-off-by: Greg Kroah-Hartman +--- + mm/khugepaged.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/mm/khugepaged.c ++++ b/mm/khugepaged.c +@@ -1227,7 +1227,7 @@ static int khugepaged_scan_pmd(struct mm + } + if (pte_young(pteval) || + page_is_young(page) || PageReferenced(page) || +- mmu_notifier_test_young(vma->vm_mm, address)) ++ mmu_notifier_test_young(vma->vm_mm, _address)) + referenced++; + } + if (writable) { diff --git a/queue-5.4/mtd-nand-raw-atmel-fix-comment-in-timings-preparation.patch b/queue-5.4/mtd-nand-raw-atmel-fix-comment-in-timings-preparation.patch new file mode 100644 index 0000000000..e1dc478ba4 --- /dev/null +++ b/queue-5.4/mtd-nand-raw-atmel-fix-comment-in-timings-preparation.patch @@ -0,0 +1,39 @@ +From stable+bounces-179503-greg=kroah.com@vger.kernel.org Sat Sep 13 17:23:26 2025 +From: Sasha Levin +Date: Sat, 13 Sep 2025 11:23:06 -0400 +Subject: mtd: nand: raw: atmel: Fix comment in timings preparation +To: stable@vger.kernel.org +Cc: Alexander Dahl , Nicolas Ferre , Miquel Raynal , Sasha Levin +Message-ID: <20250913152307.1415556-1-sashal@kernel.org> + +From: Alexander Dahl + +[ Upstream commit 1c60e027ffdebd36f4da766d9c9abbd1ea4dd8f9 ] + +Looks like a copy'n'paste mistake introduced when initially adding the +dynamic timings feature with commit f9ce2eddf176 ("mtd: nand: atmel: Add +->setup_data_interface() hooks"). The context around this and +especially the code itself suggests 'read' is meant instead of write. + +Signed-off-by: Alexander Dahl +Reviewed-by: Nicolas Ferre +Signed-off-by: Miquel Raynal +Link: https://lore.kernel.org/linux-mtd/20240226122537.75097-1-ada@thorsis.com +Stable-dep-of: fd779eac2d65 ("mtd: nand: raw: atmel: Respect tAR, tCLR in read setup timing") +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/mtd/nand/raw/atmel/nand-controller.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/mtd/nand/raw/atmel/nand-controller.c ++++ b/drivers/mtd/nand/raw/atmel/nand-controller.c +@@ -1312,7 +1312,7 @@ static int atmel_smc_nand_prepare_smccon + return ret; + + /* +- * The write cycle timing is directly matching tWC, but is also ++ * The read cycle timing is directly matching tRC, but is also + * dependent on the setup and hold timings we calculated earlier, + * which gives: + * diff --git a/queue-5.4/mtd-nand-raw-atmel-respect-tar-tclr-in-read-setup-timing.patch b/queue-5.4/mtd-nand-raw-atmel-respect-tar-tclr-in-read-setup-timing.patch new file mode 100644 index 0000000000..3a8152dac3 --- /dev/null +++ b/queue-5.4/mtd-nand-raw-atmel-respect-tar-tclr-in-read-setup-timing.patch @@ -0,0 +1,62 @@ +From stable+bounces-179504-greg=kroah.com@vger.kernel.org Sat Sep 13 17:23:32 2025 +From: Sasha Levin +Date: Sat, 13 Sep 2025 11:23:07 -0400 +Subject: mtd: nand: raw: atmel: Respect tAR, tCLR in read setup timing +To: stable@vger.kernel.org +Cc: Alexander Sverdlin , Alexander Dahl , Miquel Raynal , Sasha Levin +Message-ID: <20250913152307.1415556-2-sashal@kernel.org> + +From: Alexander Sverdlin + +[ Upstream commit fd779eac2d659668be4d3dbdac0710afd5d6db12 ] + +Having setup time 0 violates tAR, tCLR of some chips, for instance +TOSHIBA TC58NVG2S3ETAI0 cannot be detected successfully (first ID byte +being read duplicated, i.e. 98 98 dc 90 15 76 14 03 instead of +98 dc 90 15 76 ...). + +Atmel Application Notes postulated 1 cycle NRD_SETUP without explanation +[1], but it looks more appropriate to just calculate setup time properly. + +[1] Link: https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ApplicationNotes/ApplicationNotes/doc6255.pdf + +Cc: stable@vger.kernel.org +Fixes: f9ce2eddf176 ("mtd: nand: atmel: Add ->setup_data_interface() hooks") +Signed-off-by: Alexander Sverdlin +Tested-by: Alexander Dahl +Signed-off-by: Miquel Raynal +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/mtd/nand/raw/atmel/nand-controller.c | 16 +++++++++++++--- + 1 file changed, 13 insertions(+), 3 deletions(-) + +--- a/drivers/mtd/nand/raw/atmel/nand-controller.c ++++ b/drivers/mtd/nand/raw/atmel/nand-controller.c +@@ -1312,13 +1312,23 @@ static int atmel_smc_nand_prepare_smccon + return ret; + + /* ++ * Read setup timing depends on the operation done on the NAND: ++ * ++ * NRD_SETUP = max(tAR, tCLR) ++ */ ++ timeps = max(conf->timings.sdr.tAR_min, conf->timings.sdr.tCLR_min); ++ ncycles = DIV_ROUND_UP(timeps, mckperiodps); ++ totalcycles += ncycles; ++ ret = atmel_smc_cs_conf_set_setup(smcconf, ATMEL_SMC_NRD_SHIFT, ncycles); ++ if (ret) ++ return ret; ++ ++ /* + * The read cycle timing is directly matching tRC, but is also + * dependent on the setup and hold timings we calculated earlier, + * which gives: + * +- * NRD_CYCLE = max(tRC, NRD_PULSE + NRD_HOLD) +- * +- * NRD_SETUP is always 0. ++ * NRD_CYCLE = max(tRC, NRD_SETUP + NRD_PULSE + NRD_HOLD) + */ + ncycles = DIV_ROUND_UP(conf->timings.sdr.tRC_min, mckperiodps); + ncycles = max(totalcycles, ncycles); diff --git a/queue-5.4/mtd-rawnand-stm32_fmc2-avoid-overlapping-mappings-on-ecc-buffer.patch b/queue-5.4/mtd-rawnand-stm32_fmc2-avoid-overlapping-mappings-on-ecc-buffer.patch new file mode 100644 index 0000000000..2c390a6cc9 --- /dev/null +++ b/queue-5.4/mtd-rawnand-stm32_fmc2-avoid-overlapping-mappings-on-ecc-buffer.patch @@ -0,0 +1,139 @@ +From stable+bounces-179508-greg=kroah.com@vger.kernel.org Sat Sep 13 18:13:59 2025 +From: Sasha Levin +Date: Sat, 13 Sep 2025 12:13:49 -0400 +Subject: mtd: rawnand: stm32_fmc2: avoid overlapping mappings on ECC buffer +To: stable@vger.kernel.org +Cc: Christophe Kerello , Miquel Raynal , Sasha Levin +Message-ID: <20250913161349.1443080-1-sashal@kernel.org> + +From: Christophe Kerello + +[ Upstream commit 513c40e59d5a414ab763a9c84797534b5e8c208d ] + +Avoid below overlapping mappings by using a contiguous +non-cacheable buffer. + +[ 4.077708] DMA-API: stm32_fmc2_nfc 48810000.nand-controller: cacheline tracking EEXIST, +overlapping mappings aren't supported +[ 4.089103] WARNING: CPU: 1 PID: 44 at kernel/dma/debug.c:568 add_dma_entry+0x23c/0x300 +[ 4.097071] Modules linked in: +[ 4.100101] CPU: 1 PID: 44 Comm: kworker/u4:2 Not tainted 6.1.82 #1 +[ 4.106346] Hardware name: STMicroelectronics STM32MP257F VALID1 SNOR / MB1704 (LPDDR4 Power discrete) + MB1703 + MB1708 (SNOR MB1730) (DT) +[ 4.118824] Workqueue: events_unbound deferred_probe_work_func +[ 4.124674] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) +[ 4.131624] pc : add_dma_entry+0x23c/0x300 +[ 4.135658] lr : add_dma_entry+0x23c/0x300 +[ 4.139792] sp : ffff800009dbb490 +[ 4.143016] x29: ffff800009dbb4a0 x28: 0000000004008022 x27: ffff8000098a6000 +[ 4.150174] x26: 0000000000000000 x25: ffff8000099e7000 x24: ffff8000099e7de8 +[ 4.157231] x23: 00000000ffffffff x22: 0000000000000000 x21: ffff8000098a6a20 +[ 4.164388] x20: ffff000080964180 x19: ffff800009819ba0 x18: 0000000000000006 +[ 4.171545] x17: 6361727420656e69 x16: 6c6568636163203a x15: 72656c6c6f72746e +[ 4.178602] x14: 6f632d646e616e2e x13: ffff800009832f58 x12: 00000000000004ec +[ 4.185759] x11: 00000000000001a4 x10: ffff80000988af58 x9 : ffff800009832f58 +[ 4.192916] x8 : 00000000ffffefff x7 : ffff80000988af58 x6 : 80000000fffff000 +[ 4.199972] x5 : 000000000000bff4 x4 : 0000000000000000 x3 : 0000000000000000 +[ 4.207128] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff0000812d2c40 +[ 4.214185] Call trace: +[ 4.216605] add_dma_entry+0x23c/0x300 +[ 4.220338] debug_dma_map_sg+0x198/0x350 +[ 4.224373] __dma_map_sg_attrs+0xa0/0x110 +[ 4.228411] dma_map_sg_attrs+0x10/0x2c +[ 4.232247] stm32_fmc2_nfc_xfer.isra.0+0x1c8/0x3fc +[ 4.237088] stm32_fmc2_nfc_seq_read_page+0xc8/0x174 +[ 4.242127] nand_read_oob+0x1d4/0x8e0 +[ 4.245861] mtd_read_oob_std+0x58/0x84 +[ 4.249596] mtd_read_oob+0x90/0x150 +[ 4.253231] mtd_read+0x68/0xac + +Signed-off-by: Christophe Kerello +Cc: stable@vger.kernel.org +Fixes: 2cd457f328c1 ("mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver") +Signed-off-by: Miquel Raynal +[ adapted variable name from nfc to fmc2 throughout the patch ] +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/mtd/nand/raw/stm32_fmc2_nand.c | 27 +++++++++------------------ + 1 file changed, 9 insertions(+), 18 deletions(-) + +--- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c ++++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c +@@ -266,6 +266,7 @@ struct stm32_fmc2_nfc { + struct sg_table dma_data_sg; + struct sg_table dma_ecc_sg; + u8 *ecc_buf; ++ dma_addr_t dma_ecc_addr; + int dma_ecc_len; + + struct completion complete; +@@ -942,24 +943,19 @@ static int stm32_fmc2_xfer(struct nand_c + + if (!write_data && !raw) { + /* Configure DMA ECC status */ +- p = fmc2->ecc_buf; + for_each_sg(fmc2->dma_ecc_sg.sgl, sg, eccsteps, s) { +- sg_set_buf(sg, p, fmc2->dma_ecc_len); +- p += fmc2->dma_ecc_len; ++ sg_dma_address(sg) = fmc2->dma_ecc_addr + ++ s * fmc2->dma_ecc_len; ++ sg_dma_len(sg) = fmc2->dma_ecc_len; + } + +- ret = dma_map_sg(fmc2->dev, fmc2->dma_ecc_sg.sgl, +- eccsteps, dma_data_dir); +- if (ret < 0) +- goto err_unmap_data; +- + desc_ecc = dmaengine_prep_slave_sg(fmc2->dma_ecc_ch, + fmc2->dma_ecc_sg.sgl, + eccsteps, dma_transfer_dir, + DMA_PREP_INTERRUPT); + if (!desc_ecc) { + ret = -ENOMEM; +- goto err_unmap_ecc; ++ goto err_unmap_data; + } + + reinit_completion(&fmc2->dma_ecc_complete); +@@ -967,7 +963,7 @@ static int stm32_fmc2_xfer(struct nand_c + desc_ecc->callback_param = &fmc2->dma_ecc_complete; + ret = dma_submit_error(dmaengine_submit(desc_ecc)); + if (ret) +- goto err_unmap_ecc; ++ goto err_unmap_data; + + dma_async_issue_pending(fmc2->dma_ecc_ch); + } +@@ -988,7 +984,7 @@ static int stm32_fmc2_xfer(struct nand_c + if (!write_data && !raw) + dmaengine_terminate_all(fmc2->dma_ecc_ch); + ret = -ETIMEDOUT; +- goto err_unmap_ecc; ++ goto err_unmap_data; + } + + /* Wait DMA data transfer completion */ +@@ -1009,11 +1005,6 @@ static int stm32_fmc2_xfer(struct nand_c + } + } + +-err_unmap_ecc: +- if (!write_data && !raw) +- dma_unmap_sg(fmc2->dev, fmc2->dma_ecc_sg.sgl, +- eccsteps, dma_data_dir); +- + err_unmap_data: + dma_unmap_sg(fmc2->dev, fmc2->dma_data_sg.sgl, eccsteps, dma_data_dir); + +@@ -1637,8 +1628,8 @@ static int stm32_fmc2_dma_setup(struct s + return ret; + + /* Allocate a buffer to store ECC status registers */ +- fmc2->ecc_buf = devm_kzalloc(fmc2->dev, FMC2_MAX_ECC_BUF_LEN, +- GFP_KERNEL); ++ fmc2->ecc_buf = dmam_alloc_coherent(fmc2->dev, FMC2_MAX_ECC_BUF_LEN, ++ &fmc2->dma_ecc_addr, GFP_KERNEL); + if (!fmc2->ecc_buf) + return -ENOMEM; + diff --git a/queue-5.4/series b/queue-5.4/series index 2ec1207b71..3a98fce3b5 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -8,3 +8,7 @@ ocfs2-fix-recursive-semaphore-deadlock-in-fiemap-call.patch mtd-rawnand-stm32_fmc2-fix-ecc-overwrite.patch fuse-check-if-copy_file_range-returns-larger-than-requested-size.patch fuse-prevent-overflow-in-copy_file_range-return-value.patch +mm-khugepaged-fix-the-address-passed-to-notifier-on-testing-young.patch +mtd-rawnand-stm32_fmc2-avoid-overlapping-mappings-on-ecc-buffer.patch +mtd-nand-raw-atmel-fix-comment-in-timings-preparation.patch +mtd-nand-raw-atmel-respect-tar-tclr-in-read-setup-timing.patch