From: Greg Kroah-Hartman Date: Fri, 23 Nov 2018 07:43:55 +0000 (+0100) Subject: 4.19-stable patches X-Git-Tag: v4.9.140~3 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9ca38a3d92741bb67f0974bf3a486ba0682e10e5;p=thirdparty%2Fkernel%2Fstable-queue.git 4.19-stable patches added patches: drm-i915-replace-some-page_size-with-i915_gtt_page_size.patch --- diff --git a/queue-4.19/drm-i915-replace-some-page_size-with-i915_gtt_page_size.patch b/queue-4.19/drm-i915-replace-some-page_size-with-i915_gtt_page_size.patch new file mode 100644 index 00000000000..b572bd5425f --- /dev/null +++ b/queue-4.19/drm-i915-replace-some-page_size-with-i915_gtt_page_size.patch @@ -0,0 +1,118 @@ +From f6e35cda66146106cfeb85ed65696e0f8e793fee Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= +Date: Thu, 13 Sep 2018 18:04:05 +0300 +Subject: drm/i915: Replace some PAGE_SIZE with I915_GTT_PAGE_SIZE +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ville Syrjälä + +commit f6e35cda66146106cfeb85ed65696e0f8e793fee upstream. + +Use I915_GTT_PAGE_SIZE when talking about GTT pages rather than +physical pages. + +There are some PAGE_SHIFTs left though. Not sure if we want to +introduce I915_GTT_PAGE_SHIFT or what? + +Cc: Chris Wilson +Suggested-by: Chris Wilson # at least some of it :) +Signed-off-by: Ville Syrjälä +Link: https://patchwork.freedesktop.org/patch/msgid/20180913150405.706-1-ville.syrjala@linux.intel.com +Reviewed-by: Chris Wilson +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_drv.h | 2 +- + drivers/gpu/drm/i915/i915_gem_gtt.c | 18 +++++++++--------- + 2 files changed, 10 insertions(+), 10 deletions(-) + +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -2248,7 +2248,7 @@ static inline struct scatterlist *__sg_n + #define for_each_sgt_dma(__dmap, __iter, __sgt) \ + for ((__iter) = __sgt_iter((__sgt)->sgl, true); \ + ((__dmap) = (__iter).dma + (__iter).curr); \ +- (((__iter).curr += PAGE_SIZE) >= (__iter).max) ? \ ++ (((__iter).curr += I915_GTT_PAGE_SIZE) >= (__iter).max) ? \ + (__iter) = __sgt_iter(__sg_next((__iter).sgp), true), 0 : 0) + + /** +--- a/drivers/gpu/drm/i915/i915_gem_gtt.c ++++ b/drivers/gpu/drm/i915/i915_gem_gtt.c +@@ -1058,7 +1058,7 @@ gen8_ppgtt_insert_pte_entries(struct i91 + do { + vaddr[idx->pte] = pte_encode | iter->dma; + +- iter->dma += PAGE_SIZE; ++ iter->dma += I915_GTT_PAGE_SIZE; + if (iter->dma >= iter->max) { + iter->sg = __sg_next(iter->sg); + if (!iter->sg) { +@@ -1770,7 +1770,7 @@ static void gen6_dump_ppgtt(struct i915_ + + seq_printf(m, "\t\t(%03d, %04d) %08llx: ", + pde, pte, +- (pde * GEN6_PTES + pte) * PAGE_SIZE); ++ (pde * GEN6_PTES + pte) * I915_GTT_PAGE_SIZE); + for (i = 0; i < 4; i++) { + if (vaddr[pte + i] != scratch_pte) + seq_printf(m, " %08x", vaddr[pte + i]); +@@ -1910,7 +1910,7 @@ static void gen6_ppgtt_insert_entries(st + do { + vaddr[act_pte] = pte_encode | GEN6_PTE_ADDR_ENCODE(iter.dma); + +- iter.dma += PAGE_SIZE; ++ iter.dma += I915_GTT_PAGE_SIZE; + if (iter.dma == iter.max) { + iter.sg = __sg_next(iter.sg); + if (!iter.sg) +@@ -2048,7 +2048,7 @@ static int pd_vma_bind(struct i915_vma * + { + struct i915_ggtt *ggtt = i915_vm_to_ggtt(vma->vm); + struct gen6_hw_ppgtt *ppgtt = vma->private; +- u32 ggtt_offset = i915_ggtt_offset(vma) / PAGE_SIZE; ++ u32 ggtt_offset = i915_ggtt_offset(vma) / I915_GTT_PAGE_SIZE; + struct i915_page_table *pt; + unsigned int pde; + +@@ -2174,7 +2174,7 @@ static struct i915_hw_ppgtt *gen6_ppgtt_ + ppgtt->base.vm.i915 = i915; + ppgtt->base.vm.dma = &i915->drm.pdev->dev; + +- ppgtt->base.vm.total = I915_PDES * GEN6_PTES * PAGE_SIZE; ++ ppgtt->base.vm.total = I915_PDES * GEN6_PTES * I915_GTT_PAGE_SIZE; + + i915_address_space_init(&ppgtt->base.vm, i915); + +@@ -3031,7 +3031,7 @@ static unsigned int gen8_get_total_gtt_s + bdw_gmch_ctl = 1 << bdw_gmch_ctl; + + #ifdef CONFIG_X86_32 +- /* Limit 32b platforms to a 2GB GGTT: 4 << 20 / pte size * PAGE_SIZE */ ++ /* Limit 32b platforms to a 2GB GGTT: 4 << 20 / pte size * I915_GTT_PAGE_SIZE */ + if (bdw_gmch_ctl > 4) + bdw_gmch_ctl = 4; + #endif +@@ -3729,9 +3729,9 @@ rotate_pages(const dma_addr_t *in, unsig + * the entries so the sg list can be happily traversed. + * The only thing we need are DMA addresses. + */ +- sg_set_page(sg, NULL, PAGE_SIZE, 0); ++ sg_set_page(sg, NULL, I915_GTT_PAGE_SIZE, 0); + sg_dma_address(sg) = in[offset + src_idx]; +- sg_dma_len(sg) = PAGE_SIZE; ++ sg_dma_len(sg) = I915_GTT_PAGE_SIZE; + sg = sg_next(sg); + src_idx -= stride; + } +@@ -3744,7 +3744,7 @@ static noinline struct sg_table * + intel_rotate_pages(struct intel_rotation_info *rot_info, + struct drm_i915_gem_object *obj) + { +- const unsigned long n_pages = obj->base.size / PAGE_SIZE; ++ const unsigned long n_pages = obj->base.size / I915_GTT_PAGE_SIZE; + unsigned int size = intel_rotation_info_size(rot_info); + struct sgt_iter sgt_iter; + dma_addr_t dma_addr; diff --git a/queue-4.19/series b/queue-4.19/series new file mode 100644 index 00000000000..e04fbe14b76 --- /dev/null +++ b/queue-4.19/series @@ -0,0 +1 @@ +drm-i915-replace-some-page_size-with-i915_gtt_page_size.patch