From: Oak Zeng Date: Sat, 21 Nov 2020 04:18:10 +0000 (-0600) Subject: drm/amdgpu: pre-map device buffer as cached for A+A config X-Git-Tag: v5.13-rc1~123^2~12^2~200 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9d0af8b4def0de6b734ec8db08e96da0458facb6;p=thirdparty%2Flinux.git drm/amdgpu: pre-map device buffer as cached for A+A config For A+A configuration, device memory is supposed to be mapped as cachable from CPU side. For kernel pre-map gpu device memory using ioremap_cache Signed-off-by: Oak Zeng Reviewed-by: Christian Koenig Tested-by: Amber Lin Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index f2b0094f1eaf0..4add9eaa7fa45 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -1811,8 +1811,13 @@ int amdgpu_ttm_init(struct amdgpu_device *adev) /* Change the size here instead of the init above so only lpfn is affected */ amdgpu_ttm_set_buffer_funcs_status(adev, false); #ifdef CONFIG_64BIT - adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base, - adev->gmc.visible_vram_size); + if (adev->gmc.xgmi.connected_to_cpu) + adev->mman.aper_base_kaddr = ioremap_cache(adev->gmc.aper_base, + adev->gmc.visible_vram_size); + + else + adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base, + adev->gmc.visible_vram_size); #endif /*