From: Sasha Levin Date: Mon, 15 Jun 2020 21:02:57 +0000 (-0400) Subject: Fixes for 4.9 X-Git-Tag: v5.4.47~71 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9d1c22726c60e136d97ab8f3555c47c1000ae514;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 4.9 Signed-off-by: Sasha Levin --- diff --git a/queue-4.9/series b/queue-4.9/series index 9ffe66cd65e..9fd0b4dda9f 100644 --- a/queue-4.9/series +++ b/queue-4.9/series @@ -22,3 +22,7 @@ nilfs2-fix-null-pointer-dereference-at-nilfs_segctor_do_construct.patch spi-bcm2835aux-fix-controller-unregister-order.patch spi-bcm-qspi-when-tx-rx-buffer-is-null-set-to-0.patch alsa-pcm-disallow-linking-stream-to-itself.patch +x86-speculation-change-misspelled-stipb-to-stibp.patch +x86-speculation-add-support-for-stibp-always-on-pref.patch +x86-speculation-avoid-force-disabling-ibpb-based-on-.patch +x86-speculation-pr_spec_force_disable-enforcement-fo.patch diff --git a/queue-4.9/x86-speculation-add-support-for-stibp-always-on-pref.patch b/queue-4.9/x86-speculation-add-support-for-stibp-always-on-pref.patch new file mode 100644 index 00000000000..b36aedda724 --- /dev/null +++ b/queue-4.9/x86-speculation-add-support-for-stibp-always-on-pref.patch @@ -0,0 +1,153 @@ +From b8488eb9c090b77d379cd2d3c7b4db6c07841cf0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 Dec 2018 23:03:54 +0000 +Subject: x86/speculation: Add support for STIBP always-on preferred mode + +From: Thomas Lendacky + +[ Upstream commit 20c3a2c33e9fdc82e9e8e8d2a6445b3256d20191 ] + +Different AMD processors may have different implementations of STIBP. +When STIBP is conditionally enabled, some implementations would benefit +from having STIBP always on instead of toggling the STIBP bit through MSR +writes. This preference is advertised through a CPUID feature bit. + +When conditional STIBP support is requested at boot and the CPU advertises +STIBP always-on mode as preferred, switch to STIBP "on" support. To show +that this transition has occurred, create a new spectre_v2_user_mitigation +value and a new spectre_v2_user_strings message. The new mitigation value +is used in spectre_v2_user_select_mitigation() to print the new mitigation +message as well as to return a new string from stibp_state(). + +Signed-off-by: Tom Lendacky +Signed-off-by: Thomas Gleixner +Cc: Andrea Arcangeli +Cc: Konrad Rzeszutek Wilk +Cc: Jiri Kosina +Cc: Borislav Petkov +Cc: Tim Chen +Cc: David Woodhouse +Link: https://lkml.kernel.org/r/20181213230352.6937.74943.stgit@tlendack-t1.amdoffice.net +Signed-off-by: Sasha Levin +--- + arch/x86/include/asm/cpufeatures.h | 2 +- + arch/x86/include/asm/nospec-branch.h | 1 + + arch/x86/kernel/cpu/bugs.c | 28 ++++++++++++++++++++++------ + 3 files changed, 24 insertions(+), 7 deletions(-) + +diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h +index 2cd5d12a842c..8ceb7a8a249c 100644 +--- a/arch/x86/include/asm/cpufeatures.h ++++ b/arch/x86/include/asm/cpufeatures.h +@@ -273,6 +273,7 @@ + #define X86_FEATURE_AMD_IBPB (13*32+12) /* "" Indirect Branch Prediction Barrier */ + #define X86_FEATURE_AMD_IBRS (13*32+14) /* "" Indirect Branch Restricted Speculation */ + #define X86_FEATURE_AMD_STIBP (13*32+15) /* "" Single Thread Indirect Branch Predictors */ ++#define X86_FEATURE_AMD_STIBP_ALWAYS_ON (13*32+17) /* "" Single Thread Indirect Branch Predictors always-on preferred */ + #define X86_FEATURE_AMD_SSBD (13*32+24) /* "" Speculative Store Bypass Disable */ + #define X86_FEATURE_VIRT_SSBD (13*32+25) /* Virtualized Speculative Store Bypass Disable */ + #define X86_FEATURE_AMD_SSB_NO (13*32+26) /* "" Speculative Store Bypass is fixed in hardware. */ +@@ -312,7 +313,6 @@ + #define X86_FEATURE_SUCCOR (17*32+1) /* Uncorrectable error containment and recovery */ + #define X86_FEATURE_SMCA (17*32+3) /* Scalable MCA */ + +- + /* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */ + #define X86_FEATURE_AVX512_4VNNIW (18*32+ 2) /* AVX-512 Neural Network Instructions */ + #define X86_FEATURE_AVX512_4FMAPS (18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */ +diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h +index 8d56d701b5f7..4af16acc001a 100644 +--- a/arch/x86/include/asm/nospec-branch.h ++++ b/arch/x86/include/asm/nospec-branch.h +@@ -223,6 +223,7 @@ enum spectre_v2_mitigation { + enum spectre_v2_user_mitigation { + SPECTRE_V2_USER_NONE, + SPECTRE_V2_USER_STRICT, ++ SPECTRE_V2_USER_STRICT_PREFERRED, + SPECTRE_V2_USER_PRCTL, + SPECTRE_V2_USER_SECCOMP, + }; +diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c +index 704ffc01a226..82549060b824 100644 +--- a/arch/x86/kernel/cpu/bugs.c ++++ b/arch/x86/kernel/cpu/bugs.c +@@ -632,10 +632,11 @@ enum spectre_v2_user_cmd { + }; + + static const char * const spectre_v2_user_strings[] = { +- [SPECTRE_V2_USER_NONE] = "User space: Vulnerable", +- [SPECTRE_V2_USER_STRICT] = "User space: Mitigation: STIBP protection", +- [SPECTRE_V2_USER_PRCTL] = "User space: Mitigation: STIBP via prctl", +- [SPECTRE_V2_USER_SECCOMP] = "User space: Mitigation: STIBP via seccomp and prctl", ++ [SPECTRE_V2_USER_NONE] = "User space: Vulnerable", ++ [SPECTRE_V2_USER_STRICT] = "User space: Mitigation: STIBP protection", ++ [SPECTRE_V2_USER_STRICT_PREFERRED] = "User space: Mitigation: STIBP always-on protection", ++ [SPECTRE_V2_USER_PRCTL] = "User space: Mitigation: STIBP via prctl", ++ [SPECTRE_V2_USER_SECCOMP] = "User space: Mitigation: STIBP via seccomp and prctl", + }; + + static const struct { +@@ -725,6 +726,15 @@ spectre_v2_user_select_mitigation(enum spectre_v2_mitigation_cmd v2_cmd) + break; + } + ++ /* ++ * At this point, an STIBP mode other than "off" has been set. ++ * If STIBP support is not being forced, check if STIBP always-on ++ * is preferred. ++ */ ++ if (mode != SPECTRE_V2_USER_STRICT && ++ boot_cpu_has(X86_FEATURE_AMD_STIBP_ALWAYS_ON)) ++ mode = SPECTRE_V2_USER_STRICT_PREFERRED; ++ + /* Initialize Indirect Branch Prediction Barrier */ + if (boot_cpu_has(X86_FEATURE_IBPB)) { + setup_force_cpu_cap(X86_FEATURE_USE_IBPB); +@@ -1007,6 +1017,7 @@ void arch_smt_update(void) + case SPECTRE_V2_USER_NONE: + break; + case SPECTRE_V2_USER_STRICT: ++ case SPECTRE_V2_USER_STRICT_PREFERRED: + update_stibp_strict(); + break; + case SPECTRE_V2_USER_PRCTL: +@@ -1241,7 +1252,8 @@ static int ib_prctl_set(struct task_struct *task, unsigned long ctrl) + * Indirect branch speculation is always disabled in strict + * mode. + */ +- if (spectre_v2_user == SPECTRE_V2_USER_STRICT) ++ if (spectre_v2_user == SPECTRE_V2_USER_STRICT || ++ spectre_v2_user == SPECTRE_V2_USER_STRICT_PREFERRED) + return -EPERM; + task_clear_spec_ib_disable(task); + task_update_spec_tif(task); +@@ -1254,7 +1266,8 @@ static int ib_prctl_set(struct task_struct *task, unsigned long ctrl) + */ + if (spectre_v2_user == SPECTRE_V2_USER_NONE) + return -EPERM; +- if (spectre_v2_user == SPECTRE_V2_USER_STRICT) ++ if (spectre_v2_user == SPECTRE_V2_USER_STRICT || ++ spectre_v2_user == SPECTRE_V2_USER_STRICT_PREFERRED) + return 0; + task_set_spec_ib_disable(task); + if (ctrl == PR_SPEC_FORCE_DISABLE) +@@ -1325,6 +1338,7 @@ static int ib_prctl_get(struct task_struct *task) + return PR_SPEC_PRCTL | PR_SPEC_DISABLE; + return PR_SPEC_PRCTL | PR_SPEC_ENABLE; + case SPECTRE_V2_USER_STRICT: ++ case SPECTRE_V2_USER_STRICT_PREFERRED: + return PR_SPEC_DISABLE; + default: + return PR_SPEC_NOT_AFFECTED; +@@ -1574,6 +1588,8 @@ static char *stibp_state(void) + return ", STIBP: disabled"; + case SPECTRE_V2_USER_STRICT: + return ", STIBP: forced"; ++ case SPECTRE_V2_USER_STRICT_PREFERRED: ++ return ", STIBP: always-on"; + case SPECTRE_V2_USER_PRCTL: + case SPECTRE_V2_USER_SECCOMP: + if (static_key_enabled(&switch_to_cond_stibp)) +-- +2.25.1 + diff --git a/queue-4.9/x86-speculation-avoid-force-disabling-ibpb-based-on-.patch b/queue-4.9/x86-speculation-avoid-force-disabling-ibpb-based-on-.patch new file mode 100644 index 00000000000..4cfb802e291 --- /dev/null +++ b/queue-4.9/x86-speculation-avoid-force-disabling-ibpb-based-on-.patch @@ -0,0 +1,227 @@ +From dea439ebcd95e6f21a515ffbb0d389d8c7b34169 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 19 May 2020 06:40:42 -0700 +Subject: x86/speculation: Avoid force-disabling IBPB based on STIBP and + enhanced IBRS. + +From: Anthony Steinhauser + +[ Upstream commit 21998a351512eba4ed5969006f0c55882d995ada ] + +When STIBP is unavailable or enhanced IBRS is available, Linux +force-disables the IBPB mitigation of Spectre-BTB even when simultaneous +multithreading is disabled. While attempts to enable IBPB using +prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, ...) fail with +EPERM, the seccomp syscall (or its prctl(PR_SET_SECCOMP, ...) equivalent) +which are used e.g. by Chromium or OpenSSH succeed with no errors but the +application remains silently vulnerable to cross-process Spectre v2 attacks +(classical BTB poisoning). At the same time the SYSFS reporting +(/sys/devices/system/cpu/vulnerabilities/spectre_v2) displays that IBPB is +conditionally enabled when in fact it is unconditionally disabled. + +STIBP is useful only when SMT is enabled. When SMT is disabled and STIBP is +unavailable, it makes no sense to force-disable also IBPB, because IBPB +protects against cross-process Spectre-BTB attacks regardless of the SMT +state. At the same time since missing STIBP was only observed on AMD CPUs, +AMD does not recommend using STIBP, but recommends using IBPB, so disabling +IBPB because of missing STIBP goes directly against AMD's advice: +https://developer.amd.com/wp-content/resources/Architecture_Guidelines_Update_Indirect_Branch_Control.pdf + +Similarly, enhanced IBRS is designed to protect cross-core BTB poisoning +and BTB-poisoning attacks from user space against kernel (and +BTB-poisoning attacks from guest against hypervisor), it is not designed +to prevent cross-process (or cross-VM) BTB poisoning between processes (or +VMs) running on the same core. Therefore, even with enhanced IBRS it is +necessary to flush the BTB during context-switches, so there is no reason +to force disable IBPB when enhanced IBRS is available. + +Enable the prctl control of IBPB even when STIBP is unavailable or enhanced +IBRS is available. + +Fixes: 7cc765a67d8e ("x86/speculation: Enable prctl mode for spectre_v2_user") +Signed-off-by: Anthony Steinhauser +Signed-off-by: Thomas Gleixner +Cc: stable@vger.kernel.org +Signed-off-by: Sasha Levin +--- + arch/x86/kernel/cpu/bugs.c | 87 ++++++++++++++++++++++---------------- + 1 file changed, 50 insertions(+), 37 deletions(-) + +diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c +index 82549060b824..2ab65f0ec56d 100644 +--- a/arch/x86/kernel/cpu/bugs.c ++++ b/arch/x86/kernel/cpu/bugs.c +@@ -580,7 +580,9 @@ early_param("nospectre_v1", nospectre_v1_cmdline); + static enum spectre_v2_mitigation spectre_v2_enabled __ro_after_init = + SPECTRE_V2_NONE; + +-static enum spectre_v2_user_mitigation spectre_v2_user __ro_after_init = ++static enum spectre_v2_user_mitigation spectre_v2_user_stibp __ro_after_init = ++ SPECTRE_V2_USER_NONE; ++static enum spectre_v2_user_mitigation spectre_v2_user_ibpb __ro_after_init = + SPECTRE_V2_USER_NONE; + + #ifdef RETPOLINE +@@ -726,15 +728,6 @@ spectre_v2_user_select_mitigation(enum spectre_v2_mitigation_cmd v2_cmd) + break; + } + +- /* +- * At this point, an STIBP mode other than "off" has been set. +- * If STIBP support is not being forced, check if STIBP always-on +- * is preferred. +- */ +- if (mode != SPECTRE_V2_USER_STRICT && +- boot_cpu_has(X86_FEATURE_AMD_STIBP_ALWAYS_ON)) +- mode = SPECTRE_V2_USER_STRICT_PREFERRED; +- + /* Initialize Indirect Branch Prediction Barrier */ + if (boot_cpu_has(X86_FEATURE_IBPB)) { + setup_force_cpu_cap(X86_FEATURE_USE_IBPB); +@@ -757,23 +750,36 @@ spectre_v2_user_select_mitigation(enum spectre_v2_mitigation_cmd v2_cmd) + pr_info("mitigation: Enabling %s Indirect Branch Prediction Barrier\n", + static_key_enabled(&switch_mm_always_ibpb) ? + "always-on" : "conditional"); ++ ++ spectre_v2_user_ibpb = mode; + } + +- /* If enhanced IBRS is enabled no STIBP required */ +- if (spectre_v2_enabled == SPECTRE_V2_IBRS_ENHANCED) ++ /* ++ * If enhanced IBRS is enabled or SMT impossible, STIBP is not ++ * required. ++ */ ++ if (!smt_possible || spectre_v2_enabled == SPECTRE_V2_IBRS_ENHANCED) + return; + + /* +- * If SMT is not possible or STIBP is not available clear the STIBP +- * mode. ++ * At this point, an STIBP mode other than "off" has been set. ++ * If STIBP support is not being forced, check if STIBP always-on ++ * is preferred. ++ */ ++ if (mode != SPECTRE_V2_USER_STRICT && ++ boot_cpu_has(X86_FEATURE_AMD_STIBP_ALWAYS_ON)) ++ mode = SPECTRE_V2_USER_STRICT_PREFERRED; ++ ++ /* ++ * If STIBP is not available, clear the STIBP mode. + */ +- if (!smt_possible || !boot_cpu_has(X86_FEATURE_STIBP)) ++ if (!boot_cpu_has(X86_FEATURE_STIBP)) + mode = SPECTRE_V2_USER_NONE; ++ ++ spectre_v2_user_stibp = mode; ++ + set_mode: +- spectre_v2_user = mode; +- /* Only print the STIBP mode when SMT possible */ +- if (smt_possible) +- pr_info("%s\n", spectre_v2_user_strings[mode]); ++ pr_info("%s\n", spectre_v2_user_strings[mode]); + } + + static const char * const spectre_v2_strings[] = { +@@ -1013,7 +1019,7 @@ void arch_smt_update(void) + { + mutex_lock(&spec_ctrl_mutex); + +- switch (spectre_v2_user) { ++ switch (spectre_v2_user_stibp) { + case SPECTRE_V2_USER_NONE: + break; + case SPECTRE_V2_USER_STRICT: +@@ -1246,14 +1252,16 @@ static int ib_prctl_set(struct task_struct *task, unsigned long ctrl) + { + switch (ctrl) { + case PR_SPEC_ENABLE: +- if (spectre_v2_user == SPECTRE_V2_USER_NONE) ++ if (spectre_v2_user_ibpb == SPECTRE_V2_USER_NONE && ++ spectre_v2_user_stibp == SPECTRE_V2_USER_NONE) + return 0; + /* + * Indirect branch speculation is always disabled in strict + * mode. + */ +- if (spectre_v2_user == SPECTRE_V2_USER_STRICT || +- spectre_v2_user == SPECTRE_V2_USER_STRICT_PREFERRED) ++ if (spectre_v2_user_ibpb == SPECTRE_V2_USER_STRICT || ++ spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT || ++ spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT_PREFERRED) + return -EPERM; + task_clear_spec_ib_disable(task); + task_update_spec_tif(task); +@@ -1264,10 +1272,12 @@ static int ib_prctl_set(struct task_struct *task, unsigned long ctrl) + * Indirect branch speculation is always allowed when + * mitigation is force disabled. + */ +- if (spectre_v2_user == SPECTRE_V2_USER_NONE) ++ if (spectre_v2_user_ibpb == SPECTRE_V2_USER_NONE && ++ spectre_v2_user_stibp == SPECTRE_V2_USER_NONE) + return -EPERM; +- if (spectre_v2_user == SPECTRE_V2_USER_STRICT || +- spectre_v2_user == SPECTRE_V2_USER_STRICT_PREFERRED) ++ if (spectre_v2_user_ibpb == SPECTRE_V2_USER_STRICT || ++ spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT || ++ spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT_PREFERRED) + return 0; + task_set_spec_ib_disable(task); + if (ctrl == PR_SPEC_FORCE_DISABLE) +@@ -1298,7 +1308,8 @@ void arch_seccomp_spec_mitigate(struct task_struct *task) + { + if (ssb_mode == SPEC_STORE_BYPASS_SECCOMP) + ssb_prctl_set(task, PR_SPEC_FORCE_DISABLE); +- if (spectre_v2_user == SPECTRE_V2_USER_SECCOMP) ++ if (spectre_v2_user_ibpb == SPECTRE_V2_USER_SECCOMP || ++ spectre_v2_user_stibp == SPECTRE_V2_USER_SECCOMP) + ib_prctl_set(task, PR_SPEC_FORCE_DISABLE); + } + #endif +@@ -1327,22 +1338,24 @@ static int ib_prctl_get(struct task_struct *task) + if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V2)) + return PR_SPEC_NOT_AFFECTED; + +- switch (spectre_v2_user) { +- case SPECTRE_V2_USER_NONE: ++ if (spectre_v2_user_ibpb == SPECTRE_V2_USER_NONE && ++ spectre_v2_user_stibp == SPECTRE_V2_USER_NONE) + return PR_SPEC_ENABLE; +- case SPECTRE_V2_USER_PRCTL: +- case SPECTRE_V2_USER_SECCOMP: ++ else if (spectre_v2_user_ibpb == SPECTRE_V2_USER_STRICT || ++ spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT || ++ spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT_PREFERRED) ++ return PR_SPEC_DISABLE; ++ else if (spectre_v2_user_ibpb == SPECTRE_V2_USER_PRCTL || ++ spectre_v2_user_ibpb == SPECTRE_V2_USER_SECCOMP || ++ spectre_v2_user_stibp == SPECTRE_V2_USER_PRCTL || ++ spectre_v2_user_stibp == SPECTRE_V2_USER_SECCOMP) { + if (task_spec_ib_force_disable(task)) + return PR_SPEC_PRCTL | PR_SPEC_FORCE_DISABLE; + if (task_spec_ib_disable(task)) + return PR_SPEC_PRCTL | PR_SPEC_DISABLE; + return PR_SPEC_PRCTL | PR_SPEC_ENABLE; +- case SPECTRE_V2_USER_STRICT: +- case SPECTRE_V2_USER_STRICT_PREFERRED: +- return PR_SPEC_DISABLE; +- default: ++ } else + return PR_SPEC_NOT_AFFECTED; +- } + } + + int arch_prctl_spec_ctrl_get(struct task_struct *task, unsigned long which) +@@ -1583,7 +1596,7 @@ static char *stibp_state(void) + if (spectre_v2_enabled == SPECTRE_V2_IBRS_ENHANCED) + return ""; + +- switch (spectre_v2_user) { ++ switch (spectre_v2_user_stibp) { + case SPECTRE_V2_USER_NONE: + return ", STIBP: disabled"; + case SPECTRE_V2_USER_STRICT: +-- +2.25.1 + diff --git a/queue-4.9/x86-speculation-change-misspelled-stipb-to-stibp.patch b/queue-4.9/x86-speculation-change-misspelled-stipb-to-stibp.patch new file mode 100644 index 00000000000..6791d7fa7d6 --- /dev/null +++ b/queue-4.9/x86-speculation-change-misspelled-stipb-to-stibp.patch @@ -0,0 +1,81 @@ +From 6c57f54c79b8bc53a954f987aa04ae650915e6ae Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 5 Dec 2018 14:49:27 -0500 +Subject: x86/speculation: Change misspelled STIPB to STIBP + +From: Waiman Long + +[ Upstream commit aa77bfb354c495fc4361199e63fc5765b9e1e783 ] + +STIBP stands for Single Thread Indirect Branch Predictors. The acronym, +however, can be easily mis-spelled as STIPB. It is perhaps due to the +presence of another related term - IBPB (Indirect Branch Predictor +Barrier). + +Fix the mis-spelling in the code. + +Signed-off-by: Waiman Long +Signed-off-by: Borislav Petkov +Cc: "H. Peter Anvin" +Cc: Andi Kleen +Cc: David Woodhouse +Cc: Ingo Molnar +Cc: Jiri Kosina +Cc: Josh Poimboeuf +Cc: KarimAllah Ahmed +Cc: Konrad Rzeszutek Wilk +Cc: Peter Zijlstra +Cc: Thomas Gleixner +Cc: Tim Chen +Cc: x86-ml +Link: https://lkml.kernel.org/r/1544039368-9009-1-git-send-email-longman@redhat.com +Signed-off-by: Sasha Levin +--- + arch/x86/kernel/cpu/bugs.c | 6 +++--- + arch/x86/kernel/process.h | 2 +- + 2 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c +index 5ef0a2b34261..704ffc01a226 100644 +--- a/arch/x86/kernel/cpu/bugs.c ++++ b/arch/x86/kernel/cpu/bugs.c +@@ -60,7 +60,7 @@ static u64 __ro_after_init x86_spec_ctrl_mask = SPEC_CTRL_IBRS; + u64 __ro_after_init x86_amd_ls_cfg_base; + u64 __ro_after_init x86_amd_ls_cfg_ssbd_mask; + +-/* Control conditional STIPB in switch_to() */ ++/* Control conditional STIBP in switch_to() */ + DEFINE_STATIC_KEY_FALSE(switch_to_cond_stibp); + /* Control conditional IBPB in switch_mm() */ + DEFINE_STATIC_KEY_FALSE(switch_mm_cond_ibpb); +@@ -749,12 +749,12 @@ spectre_v2_user_select_mitigation(enum spectre_v2_mitigation_cmd v2_cmd) + "always-on" : "conditional"); + } + +- /* If enhanced IBRS is enabled no STIPB required */ ++ /* If enhanced IBRS is enabled no STIBP required */ + if (spectre_v2_enabled == SPECTRE_V2_IBRS_ENHANCED) + return; + + /* +- * If SMT is not possible or STIBP is not available clear the STIPB ++ * If SMT is not possible or STIBP is not available clear the STIBP + * mode. + */ + if (!smt_possible || !boot_cpu_has(X86_FEATURE_STIBP)) +diff --git a/arch/x86/kernel/process.h b/arch/x86/kernel/process.h +index 898e97cf6629..320ab978fb1f 100644 +--- a/arch/x86/kernel/process.h ++++ b/arch/x86/kernel/process.h +@@ -19,7 +19,7 @@ static inline void switch_to_extra(struct task_struct *prev, + if (IS_ENABLED(CONFIG_SMP)) { + /* + * Avoid __switch_to_xtra() invocation when conditional +- * STIPB is disabled and the only different bit is ++ * STIBP is disabled and the only different bit is + * TIF_SPEC_IB. For CONFIG_SMP=n TIF_SPEC_IB is not + * in the TIF_WORK_CTXSW masks. + */ +-- +2.25.1 + diff --git a/queue-4.9/x86-speculation-pr_spec_force_disable-enforcement-fo.patch b/queue-4.9/x86-speculation-pr_spec_force_disable-enforcement-fo.patch new file mode 100644 index 00000000000..bde0aa363ee --- /dev/null +++ b/queue-4.9/x86-speculation-pr_spec_force_disable-enforcement-fo.patch @@ -0,0 +1,54 @@ +From 44d27b77551adaf5a337e157975c2787591fc26b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 7 Jun 2020 05:44:19 -0700 +Subject: x86/speculation: PR_SPEC_FORCE_DISABLE enforcement for indirect + branches. + +From: Anthony Steinhauser + +[ Upstream commit 4d8df8cbb9156b0a0ab3f802b80cb5db57acc0bf ] + +Currently, it is possible to enable indirect branch speculation even after +it was force-disabled using the PR_SPEC_FORCE_DISABLE option. Moreover, the +PR_GET_SPECULATION_CTRL command gives afterwards an incorrect result +(force-disabled when it is in fact enabled). This also is inconsistent +vs. STIBP and the documention which cleary states that +PR_SPEC_FORCE_DISABLE cannot be undone. + +Fix this by actually enforcing force-disabled indirect branch +speculation. PR_SPEC_ENABLE called after PR_SPEC_FORCE_DISABLE now fails +with -EPERM as described in the documentation. + +Fixes: 9137bb27e60e ("x86/speculation: Add prctl() control for indirect branch speculation") +Signed-off-by: Anthony Steinhauser +Signed-off-by: Thomas Gleixner +Cc: stable@vger.kernel.org +Signed-off-by: Sasha Levin +--- + arch/x86/kernel/cpu/bugs.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c +index 2ab65f0ec56d..85c1cc0305f3 100644 +--- a/arch/x86/kernel/cpu/bugs.c ++++ b/arch/x86/kernel/cpu/bugs.c +@@ -1257,11 +1257,14 @@ static int ib_prctl_set(struct task_struct *task, unsigned long ctrl) + return 0; + /* + * Indirect branch speculation is always disabled in strict +- * mode. ++ * mode. It can neither be enabled if it was force-disabled ++ * by a previous prctl call. ++ + */ + if (spectre_v2_user_ibpb == SPECTRE_V2_USER_STRICT || + spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT || +- spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT_PREFERRED) ++ spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT_PREFERRED || ++ task_spec_ib_force_disable(task)) + return -EPERM; + task_clear_spec_ib_disable(task); + task_update_spec_tif(task); +-- +2.25.1 +