From: Greg Kroah-Hartman Date: Tue, 9 Oct 2012 23:56:46 +0000 (+0900) Subject: 3.6-stable patches X-Git-Tag: v3.0.46~27 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9d464dfd659e714d17afd11d570c63c1bd321866;p=thirdparty%2Fkernel%2Fstable-queue.git 3.6-stable patches added patches: drm-destroy-the-planes-prior-to-destroying-the-associated-crtc.patch drm-nvc0-fence-restore-pre-suspend-fence-buffer-context-on-resume.patch drm-radeon-add-msi-quirk-for-gateway-rs690.patch drm-radeon-allow-mip_address-0-for-msaa-textures-on-evergreen.patch drm-radeon-force-msis-on-rs690-asics.patch drm-radeon-kms-allow-strmout_base_update-on-rs780-and-rs880.patch drm-radeon-only-adjust-default-clocks-on-ni-gpus.patch --- diff --git a/queue-3.6/drm-destroy-the-planes-prior-to-destroying-the-associated-crtc.patch b/queue-3.6/drm-destroy-the-planes-prior-to-destroying-the-associated-crtc.patch new file mode 100644 index 00000000000..6f0200ddae6 --- /dev/null +++ b/queue-3.6/drm-destroy-the-planes-prior-to-destroying-the-associated-crtc.patch @@ -0,0 +1,47 @@ +From 3184009c36da413724f283e3c7ac9cc60c623bc4 Mon Sep 17 00:00:00 2001 +From: Chris Wilson +Date: Mon, 17 Sep 2012 09:38:03 +0000 +Subject: drm: Destroy the planes prior to destroying the associated CRTC + +From: Chris Wilson + +commit 3184009c36da413724f283e3c7ac9cc60c623bc4 upstream. + +As during the plane cleanup, we wish to disable the hardware and +so may modify state on the associated CRTC, that CRTC must continue to +exist until we are finished. + +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54101 +Signed-off-by: Chris Wilson +Cc: Jesse Barnes +Reviewed-by: Jesse Barnes +Tested-by: lu hua +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/drm_crtc.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/drm_crtc.c ++++ b/drivers/gpu/drm/drm_crtc.c +@@ -1034,15 +1034,15 @@ void drm_mode_config_cleanup(struct drm_ + fb->funcs->destroy(fb); + } + +- list_for_each_entry_safe(crtc, ct, &dev->mode_config.crtc_list, head) { +- crtc->funcs->destroy(crtc); +- } +- + list_for_each_entry_safe(plane, plt, &dev->mode_config.plane_list, + head) { + plane->funcs->destroy(plane); + } + ++ list_for_each_entry_safe(crtc, ct, &dev->mode_config.crtc_list, head) { ++ crtc->funcs->destroy(crtc); ++ } ++ + idr_remove_all(&dev->mode_config.crtc_idr); + idr_destroy(&dev->mode_config.crtc_idr); + } diff --git a/queue-3.6/drm-nvc0-fence-restore-pre-suspend-fence-buffer-context-on-resume.patch b/queue-3.6/drm-nvc0-fence-restore-pre-suspend-fence-buffer-context-on-resume.patch new file mode 100644 index 00000000000..16c416d8699 --- /dev/null +++ b/queue-3.6/drm-nvc0-fence-restore-pre-suspend-fence-buffer-context-on-resume.patch @@ -0,0 +1,67 @@ +From d6ba6d215a538a58f0f0026f0961b0b9125e8042 Mon Sep 17 00:00:00 2001 +From: Ben Skeggs +Date: Fri, 28 Sep 2012 11:50:29 +1000 +Subject: drm/nvc0/fence: restore pre-suspend fence buffer context on resume + +From: Ben Skeggs + +commit d6ba6d215a538a58f0f0026f0961b0b9125e8042 upstream. + +Fixes some unfortunate races on resume. The G84 version of the code doesn't +need this as "gpuobj"s are automagically suspended/resumed by the core code +whereas pinned buffer objects are not. + +Signed-off-by: Ben Skeggs +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/nouveau/nvc0_fence.c | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +--- a/drivers/gpu/drm/nouveau/nvc0_fence.c ++++ b/drivers/gpu/drm/nouveau/nvc0_fence.c +@@ -32,6 +32,7 @@ + struct nvc0_fence_priv { + struct nouveau_fence_priv base; + struct nouveau_bo *bo; ++ u32 *suspend; + }; + + struct nvc0_fence_chan { +@@ -125,12 +126,36 @@ nvc0_fence_context_new(struct nouveau_ch + static int + nvc0_fence_fini(struct drm_device *dev, int engine, bool suspend) + { ++ struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); ++ struct nvc0_fence_priv *priv = nv_engine(dev, engine); ++ int i; ++ ++ if (suspend) { ++ priv->suspend = vmalloc(pfifo->channels * sizeof(u32)); ++ if (!priv->suspend) ++ return -ENOMEM; ++ ++ for (i = 0; i < pfifo->channels; i++) ++ priv->suspend[i] = nouveau_bo_rd32(priv->bo, i); ++ } ++ + return 0; + } + + static int + nvc0_fence_init(struct drm_device *dev, int engine) + { ++ struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); ++ struct nvc0_fence_priv *priv = nv_engine(dev, engine); ++ int i; ++ ++ if (priv->suspend) { ++ for (i = 0; i < pfifo->channels; i++) ++ nouveau_bo_wr32(priv->bo, i, priv->suspend[i]); ++ vfree(priv->suspend); ++ priv->suspend = NULL; ++ } ++ + return 0; + } + diff --git a/queue-3.6/drm-radeon-add-msi-quirk-for-gateway-rs690.patch b/queue-3.6/drm-radeon-add-msi-quirk-for-gateway-rs690.patch new file mode 100644 index 00000000000..40826a3e360 --- /dev/null +++ b/queue-3.6/drm-radeon-add-msi-quirk-for-gateway-rs690.patch @@ -0,0 +1,34 @@ +From 3a6d59df80897cc87812b6826d70085905bed013 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Wed, 26 Sep 2012 12:31:45 -0400 +Subject: drm/radeon: Add MSI quirk for gateway RS690 + +From: Alex Deucher + +commit 3a6d59df80897cc87812b6826d70085905bed013 upstream. + +Fixes another system on: +https://bugs.freedesktop.org/show_bug.cgi?id=37679 + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_irq_kms.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c ++++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c +@@ -204,6 +204,12 @@ static bool radeon_msi_ok(struct radeon_ + (rdev->pdev->subsystem_device == 0x01fd)) + return true; + ++ /* Gateway RS690 only seems to work with MSIs. */ ++ if ((rdev->pdev->device == 0x791f) && ++ (rdev->pdev->subsystem_vendor == 0x107b) && ++ (rdev->pdev->subsystem_device == 0x0185)) ++ return true; ++ + /* RV515 seems to have MSI issues where it loses + * MSI rearms occasionally. This leads to lockups and freezes. + * disable it by default. diff --git a/queue-3.6/drm-radeon-allow-mip_address-0-for-msaa-textures-on-evergreen.patch b/queue-3.6/drm-radeon-allow-mip_address-0-for-msaa-textures-on-evergreen.patch new file mode 100644 index 00000000000..f5537ef8dc3 --- /dev/null +++ b/queue-3.6/drm-radeon-allow-mip_address-0-for-msaa-textures-on-evergreen.patch @@ -0,0 +1,130 @@ +From 61051afd3540da71c1ac32f17ed663595a0f7ecb Mon Sep 17 00:00:00 2001 +From: Marek Olšák +Date: Tue, 25 Sep 2012 03:34:01 +0200 +Subject: drm/radeon: allow MIP_ADDRESS=0 for MSAA textures on Evergreen + +From: Marek Olšák + +commit 61051afd3540da71c1ac32f17ed663595a0f7ecb upstream. + +MIP_ADDRESS should point to the resolved FMASK for an MSAA texture. +Setting MIP_ADDRESS to 0 means the FMASK pointer is invalid (the GPU +won't read the memory then). + +The userspace has to set MIP_ADDRESS to 0 and *not* emit any relocation +for it. + +Signed-off-by: Marek Olšák +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/evergreen_cs.c | 59 +++++++++++++++++++++++++++++----- + drivers/gpu/drm/radeon/radeon_drv.c | 3 + + 2 files changed, 54 insertions(+), 8 deletions(-) + +--- a/drivers/gpu/drm/radeon/evergreen_cs.c ++++ b/drivers/gpu/drm/radeon/evergreen_cs.c +@@ -846,6 +846,16 @@ static int evergreen_cs_track_validate_t + return -EINVAL; + } + ++ if (!mipmap) { ++ if (llevel) { ++ dev_warn(p->dev, "%s:%i got NULL MIP_ADDRESS relocation\n", ++ __func__, __LINE__); ++ return -EINVAL; ++ } else { ++ return 0; /* everything's ok */ ++ } ++ } ++ + /* check mipmap size */ + for (i = 1; i <= llevel; i++) { + unsigned w, h, d; +@@ -1081,6 +1091,27 @@ static int evergreen_cs_packet_next_relo + } + + /** ++ * evergreen_cs_packet_next_is_pkt3_nop() - test if the next packet is NOP ++ * @p: structure holding the parser context. ++ * ++ * Check if the next packet is a relocation packet3. ++ **/ ++static bool evergreen_cs_packet_next_is_pkt3_nop(struct radeon_cs_parser *p) ++{ ++ struct radeon_cs_packet p3reloc; ++ int r; ++ ++ r = evergreen_cs_packet_parse(p, &p3reloc, p->idx); ++ if (r) { ++ return false; ++ } ++ if (p3reloc.type != PACKET_TYPE3 || p3reloc.opcode != PACKET3_NOP) { ++ return false; ++ } ++ return true; ++} ++ ++/** + * evergreen_cs_packet_next_vline() - parse userspace VLINE packet + * @parser: parser structure holding parsing context. + * +@@ -2330,7 +2361,7 @@ static int evergreen_packet3_check(struc + for (i = 0; i < (pkt->count / 8); i++) { + struct radeon_bo *texture, *mipmap; + u32 toffset, moffset; +- u32 size, offset; ++ u32 size, offset, mip_address, tex_dim; + + switch (G__SQ_CONSTANT_TYPE(radeon_get_ib_value(p, idx+1+(i*8)+7))) { + case SQ_TEX_VTX_VALID_TEXTURE: +@@ -2359,14 +2390,28 @@ static int evergreen_packet3_check(struc + } + texture = reloc->robj; + toffset = (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); ++ + /* tex mip base */ +- r = evergreen_cs_packet_next_reloc(p, &reloc); +- if (r) { +- DRM_ERROR("bad SET_RESOURCE (tex)\n"); +- return -EINVAL; ++ tex_dim = ib[idx+1+(i*8)+0] & 0x7; ++ mip_address = ib[idx+1+(i*8)+3]; ++ ++ if ((tex_dim == SQ_TEX_DIM_2D_MSAA || tex_dim == SQ_TEX_DIM_2D_ARRAY_MSAA) && ++ !mip_address && ++ !evergreen_cs_packet_next_is_pkt3_nop(p)) { ++ /* MIP_ADDRESS should point to FMASK for an MSAA texture. ++ * It should be 0 if FMASK is disabled. */ ++ moffset = 0; ++ mipmap = NULL; ++ } else { ++ r = evergreen_cs_packet_next_reloc(p, &reloc); ++ if (r) { ++ DRM_ERROR("bad SET_RESOURCE (tex)\n"); ++ return -EINVAL; ++ } ++ moffset = (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); ++ mipmap = reloc->robj; + } +- moffset = (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); +- mipmap = reloc->robj; ++ + r = evergreen_cs_track_validate_texture(p, texture, mipmap, idx+1+(i*8)); + if (r) + return r; +--- a/drivers/gpu/drm/radeon/radeon_drv.c ++++ b/drivers/gpu/drm/radeon/radeon_drv.c +@@ -65,9 +65,10 @@ + * 2.21.0 - r600-r700: FMASK and CMASK + * 2.22.0 - r600 only: RESOLVE_BOX allowed + * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 ++ * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures + */ + #define KMS_DRIVER_MAJOR 2 +-#define KMS_DRIVER_MINOR 23 ++#define KMS_DRIVER_MINOR 24 + #define KMS_DRIVER_PATCHLEVEL 0 + int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); + int radeon_driver_unload_kms(struct drm_device *dev); diff --git a/queue-3.6/drm-radeon-force-msis-on-rs690-asics.patch b/queue-3.6/drm-radeon-force-msis-on-rs690-asics.patch new file mode 100644 index 00000000000..1e07cc1e1b8 --- /dev/null +++ b/queue-3.6/drm-radeon-force-msis-on-rs690-asics.patch @@ -0,0 +1,33 @@ +From fb6ca6d154cdcd53e7f27f8dbba513830372699b Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Wed, 26 Sep 2012 12:40:45 -0400 +Subject: drm/radeon: force MSIs on RS690 asics + +From: Alex Deucher + +commit fb6ca6d154cdcd53e7f27f8dbba513830372699b upstream. + +There are so many quirks, lets just try and force +this for all RS690s. See: +https://bugs.freedesktop.org/show_bug.cgi?id=37679 + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_irq_kms.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c ++++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c +@@ -210,6 +210,10 @@ static bool radeon_msi_ok(struct radeon_ + (rdev->pdev->subsystem_device == 0x0185)) + return true; + ++ /* try and enable MSIs by default on all RS690s */ ++ if (rdev->family == CHIP_RS690) ++ return true; ++ + /* RV515 seems to have MSI issues where it loses + * MSI rearms occasionally. This leads to lockups and freezes. + * disable it by default. diff --git a/queue-3.6/drm-radeon-kms-allow-strmout_base_update-on-rs780-and-rs880.patch b/queue-3.6/drm-radeon-kms-allow-strmout_base_update-on-rs780-and-rs880.patch new file mode 100644 index 00000000000..800ab718cc7 --- /dev/null +++ b/queue-3.6/drm-radeon-kms-allow-strmout_base_update-on-rs780-and-rs880.patch @@ -0,0 +1,46 @@ +From 46fc8781bf428ce1094a5980ca2b92a49d33a8ca Mon Sep 17 00:00:00 2001 +From: Marek Olšák +Date: Tue, 25 Sep 2012 01:45:33 +0200 +Subject: drm/radeon/kms: allow STRMOUT_BASE_UPDATE on RS780 and RS880 + +From: Marek Olšák + +commit 46fc8781bf428ce1094a5980ca2b92a49d33a8ca upstream. + +This is required to make streamout work there. + +Signed-off-by: Marek Olšák +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/r600_cs.c | 3 ++- + drivers/gpu/drm/radeon/radeon_drv.c | 3 ++- + 2 files changed, 4 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/radeon/r600_cs.c ++++ b/drivers/gpu/drm/radeon/r600_cs.c +@@ -2180,7 +2180,8 @@ static int r600_packet3_check(struct rad + } + break; + case PACKET3_STRMOUT_BASE_UPDATE: +- if (p->family < CHIP_RV770) { ++ /* RS780 and RS880 also need this */ ++ if (p->family < CHIP_RS780) { + DRM_ERROR("STRMOUT_BASE_UPDATE only supported on 7xx\n"); + return -EINVAL; + } +--- a/drivers/gpu/drm/radeon/radeon_drv.c ++++ b/drivers/gpu/drm/radeon/radeon_drv.c +@@ -64,9 +64,10 @@ + * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query + * 2.21.0 - r600-r700: FMASK and CMASK + * 2.22.0 - r600 only: RESOLVE_BOX allowed ++ * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 + */ + #define KMS_DRIVER_MAJOR 2 +-#define KMS_DRIVER_MINOR 22 ++#define KMS_DRIVER_MINOR 23 + #define KMS_DRIVER_PATCHLEVEL 0 + int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); + int radeon_driver_unload_kms(struct drm_device *dev); diff --git a/queue-3.6/drm-radeon-only-adjust-default-clocks-on-ni-gpus.patch b/queue-3.6/drm-radeon-only-adjust-default-clocks-on-ni-gpus.patch new file mode 100644 index 00000000000..96a9f0e2fe5 --- /dev/null +++ b/queue-3.6/drm-radeon-only-adjust-default-clocks-on-ni-gpus.patch @@ -0,0 +1,43 @@ +From 2e3b3b105ab3bb5b6a37198da4f193cd13781d13 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Fri, 14 Sep 2012 10:59:26 -0400 +Subject: drm/radeon: only adjust default clocks on NI GPUs + +From: Alex Deucher + +commit 2e3b3b105ab3bb5b6a37198da4f193cd13781d13 upstream. + +SI asics store voltage information differently so we +don't have a way to deal with it properly yet. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_pm.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/radeon/radeon_pm.c ++++ b/drivers/gpu/drm/radeon/radeon_pm.c +@@ -547,7 +547,9 @@ void radeon_pm_suspend(struct radeon_dev + void radeon_pm_resume(struct radeon_device *rdev) + { + /* set up the default clocks if the MC ucode is loaded */ +- if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) { ++ if ((rdev->family >= CHIP_BARTS) && ++ (rdev->family <= CHIP_CAYMAN) && ++ rdev->mc_fw) { + if (rdev->pm.default_vddc) + radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, + SET_VOLTAGE_TYPE_ASIC_VDDC); +@@ -602,7 +604,9 @@ int radeon_pm_init(struct radeon_device + radeon_pm_print_states(rdev); + radeon_pm_init_profile(rdev); + /* set up the default clocks if the MC ucode is loaded */ +- if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) { ++ if ((rdev->family >= CHIP_BARTS) && ++ (rdev->family <= CHIP_CAYMAN) && ++ rdev->mc_fw) { + if (rdev->pm.default_vddc) + radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, + SET_VOLTAGE_TYPE_ASIC_VDDC); diff --git a/queue-3.6/series b/queue-3.6/series index e02fbf15d87..2210e648f13 100644 --- a/queue-3.6/series +++ b/queue-3.6/series @@ -73,3 +73,10 @@ alsa-snd-usb-add-quirks-for-playback-designs-devices.patch alsa-usb-support-for-original-xbox-communicator.patch alsa-hda-add-another-pci-id-for-haswell-board.patch alsa-hda-use-lpib-for-delay-estimation.patch +drm-nvc0-fence-restore-pre-suspend-fence-buffer-context-on-resume.patch +drm-destroy-the-planes-prior-to-destroying-the-associated-crtc.patch +drm-radeon-only-adjust-default-clocks-on-ni-gpus.patch +drm-radeon-kms-allow-strmout_base_update-on-rs780-and-rs880.patch +drm-radeon-allow-mip_address-0-for-msaa-textures-on-evergreen.patch +drm-radeon-add-msi-quirk-for-gateway-rs690.patch +drm-radeon-force-msis-on-rs690-asics.patch