From: Sasha Levin Date: Tue, 8 Oct 2024 06:02:24 +0000 (-0400) Subject: Fixes for 5.4 X-Git-Tag: v6.6.55~41 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9e3f51f82b49a4bf76c1af25be158b3623692079;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 5.4 Signed-off-by: Sasha Levin --- diff --git a/queue-5.4/acpi-battery-fix-possible-crash-when-unregistering-a.patch b/queue-5.4/acpi-battery-fix-possible-crash-when-unregistering-a.patch new file mode 100644 index 00000000000..21e84556d0a --- /dev/null +++ b/queue-5.4/acpi-battery-fix-possible-crash-when-unregistering-a.patch @@ -0,0 +1,69 @@ +From e6bf857aacbc74e3563ab928aa69b8c608ab466f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 1 Oct 2024 23:28:34 +0200 +Subject: ACPI: battery: Fix possible crash when unregistering a battery hook + +From: Armin Wolf + +[ Upstream commit 76959aff14a0012ad6b984ec7686d163deccdc16 ] + +When a battery hook returns an error when adding a new battery, then +the battery hook is automatically unregistered. +However the battery hook provider cannot know that, so it will later +call battery_hook_unregister() on the already unregistered battery +hook, resulting in a crash. + +Fix this by using the list head to mark already unregistered battery +hooks as already being unregistered so that they can be ignored by +battery_hook_unregister(). + +Fixes: fa93854f7a7e ("battery: Add the battery hooking API") +Signed-off-by: Armin Wolf +Link: https://patch.msgid.link/20241001212835.341788-3-W_Armin@gmx.de +Cc: All applicable +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Sasha Levin +--- + drivers/acpi/battery.c | 12 +++++++++--- + 1 file changed, 9 insertions(+), 3 deletions(-) + +diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c +index 6c45d183213ed..cf853e985d6d9 100644 +--- a/drivers/acpi/battery.c ++++ b/drivers/acpi/battery.c +@@ -717,7 +717,7 @@ static void battery_hook_unregister_unlocked(struct acpi_battery_hook *hook) + list_for_each_entry(battery, &acpi_battery_list, list) { + hook->remove_battery(battery->bat); + } +- list_del(&hook->list); ++ list_del_init(&hook->list); + + pr_info("extension unregistered: %s\n", hook->name); + } +@@ -725,7 +725,14 @@ static void battery_hook_unregister_unlocked(struct acpi_battery_hook *hook) + void battery_hook_unregister(struct acpi_battery_hook *hook) + { + mutex_lock(&hook_mutex); +- battery_hook_unregister_unlocked(hook); ++ /* ++ * Ignore already unregistered battery hooks. This might happen ++ * if a battery hook was previously unloaded due to an error when ++ * adding a new battery. ++ */ ++ if (!list_empty(&hook->list)) ++ battery_hook_unregister_unlocked(hook); ++ + mutex_unlock(&hook_mutex); + } + EXPORT_SYMBOL_GPL(battery_hook_unregister); +@@ -735,7 +742,6 @@ void battery_hook_register(struct acpi_battery_hook *hook) + struct acpi_battery *battery; + + mutex_lock(&hook_mutex); +- INIT_LIST_HEAD(&hook->list); + list_add(&hook->list, &battery_hook_list); + /* + * Now that the driver is registered, we need +-- +2.43.0 + diff --git a/queue-5.4/acpi-battery-simplify-battery-hook-locking.patch b/queue-5.4/acpi-battery-simplify-battery-hook-locking.patch new file mode 100644 index 00000000000..96e0ac8fb3e --- /dev/null +++ b/queue-5.4/acpi-battery-simplify-battery-hook-locking.patch @@ -0,0 +1,95 @@ +From cb4caab154f3a4fd92e2eb98b8c79e2515a8ec4f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 1 Oct 2024 23:28:33 +0200 +Subject: ACPI: battery: Simplify battery hook locking +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Armin Wolf + +[ Upstream commit 86309cbed26139e1caae7629dcca1027d9a28e75 ] + +Move the conditional locking from __battery_hook_unregister() +into battery_hook_unregister() and rename the low-level function +to simplify the locking during battery hook removal. + +Reviewed-by: Ilpo Järvinen +Reviewed-by: Pali Rohár +Signed-off-by: Armin Wolf +Link: https://patch.msgid.link/20241001212835.341788-2-W_Armin@gmx.de +Signed-off-by: Rafael J. Wysocki +Stable-dep-of: 76959aff14a0 ("ACPI: battery: Fix possible crash when unregistering a battery hook") +Signed-off-by: Sasha Levin +--- + drivers/acpi/battery.c | 18 +++++++++--------- + 1 file changed, 9 insertions(+), 9 deletions(-) + +diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c +index af78f76a28729..6c45d183213ed 100644 +--- a/drivers/acpi/battery.c ++++ b/drivers/acpi/battery.c +@@ -706,27 +706,27 @@ static LIST_HEAD(acpi_battery_list); + static LIST_HEAD(battery_hook_list); + static DEFINE_MUTEX(hook_mutex); + +-static void __battery_hook_unregister(struct acpi_battery_hook *hook, int lock) ++static void battery_hook_unregister_unlocked(struct acpi_battery_hook *hook) + { + struct acpi_battery *battery; ++ + /* + * In order to remove a hook, we first need to + * de-register all the batteries that are registered. + */ +- if (lock) +- mutex_lock(&hook_mutex); + list_for_each_entry(battery, &acpi_battery_list, list) { + hook->remove_battery(battery->bat); + } + list_del(&hook->list); +- if (lock) +- mutex_unlock(&hook_mutex); ++ + pr_info("extension unregistered: %s\n", hook->name); + } + + void battery_hook_unregister(struct acpi_battery_hook *hook) + { +- __battery_hook_unregister(hook, 1); ++ mutex_lock(&hook_mutex); ++ battery_hook_unregister_unlocked(hook); ++ mutex_unlock(&hook_mutex); + } + EXPORT_SYMBOL_GPL(battery_hook_unregister); + +@@ -752,7 +752,7 @@ void battery_hook_register(struct acpi_battery_hook *hook) + * hooks. + */ + pr_err("extension failed to load: %s", hook->name); +- __battery_hook_unregister(hook, 0); ++ battery_hook_unregister_unlocked(hook); + goto end; + } + } +@@ -789,7 +789,7 @@ static void battery_hook_add_battery(struct acpi_battery *battery) + */ + pr_err("error in extension, unloading: %s", + hook_node->name); +- __battery_hook_unregister(hook_node, 0); ++ battery_hook_unregister_unlocked(hook_node); + } + } + mutex_unlock(&hook_mutex); +@@ -822,7 +822,7 @@ static void __exit battery_hook_exit(void) + * need to remove the hooks. + */ + list_for_each_entry_safe(hook, ptr, &battery_hook_list, list) { +- __battery_hook_unregister(hook, 1); ++ battery_hook_unregister(hook); + } + mutex_destroy(&hook_mutex); + } +-- +2.43.0 + diff --git a/queue-5.4/arm64-add-cortex-715-cpu-part-definition.patch b/queue-5.4/arm64-add-cortex-715-cpu-part-definition.patch new file mode 100644 index 00000000000..11a4d15479a --- /dev/null +++ b/queue-5.4/arm64-add-cortex-715-cpu-part-definition.patch @@ -0,0 +1,51 @@ +From a4f66c2a140c4ae08657da366f064970d7125e75 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 7 Oct 2024 13:18:48 +0100 +Subject: arm64: Add Cortex-715 CPU part definition + +From: Anshuman Khandual + +[ Upstream commit 07e39e60bbf0ccd5f895568e1afca032193705c0 ] + +Add the CPU Partnumbers for the new Arm designs. + +Cc: Catalin Marinas +Cc: Will Deacon +Cc: Suzuki K Poulose +Cc: James Morse +Cc: linux-arm-kernel@lists.infradead.org +Cc: linux-kernel@vger.kernel.org +Acked-by: Catalin Marinas +Signed-off-by: Anshuman Khandual +Link: https://lore.kernel.org/r/20221116140915.356601-2-anshuman.khandual@arm.com +Signed-off-by: Will Deacon +[ Mark: Trivial backport ] +Signed-off-by: Mark Rutland +Signed-off-by: Sasha Levin +--- + arch/arm64/include/asm/cputype.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h +index 18b5267ff48e1..cf5636e5c6c8b 100644 +--- a/arch/arm64/include/asm/cputype.h ++++ b/arch/arm64/include/asm/cputype.h +@@ -77,6 +77,7 @@ + #define ARM_CPU_PART_CORTEX_A78 0xD41 + #define ARM_CPU_PART_CORTEX_X1 0xD44 + #define ARM_CPU_PART_CORTEX_A710 0xD47 ++#define ARM_CPU_PART_CORTEX_A715 0xD4D + #define ARM_CPU_PART_CORTEX_X2 0xD48 + #define ARM_CPU_PART_NEOVERSE_N2 0xD49 + #define ARM_CPU_PART_CORTEX_A78C 0xD4B +@@ -126,6 +127,7 @@ + #define MIDR_CORTEX_A78 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78) + #define MIDR_CORTEX_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1) + #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710) ++#define MIDR_CORTEX_A715 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A715) + #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2) + #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2) + #define MIDR_CORTEX_A78C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C) +-- +2.43.0 + diff --git a/queue-5.4/arm64-cputype-add-neoverse-n3-definitions.patch b/queue-5.4/arm64-cputype-add-neoverse-n3-definitions.patch new file mode 100644 index 00000000000..10d6561a4e5 --- /dev/null +++ b/queue-5.4/arm64-cputype-add-neoverse-n3-definitions.patch @@ -0,0 +1,52 @@ +From ffdb6f4277266b6b3a883a8d70f7d3dbd35f1cd9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 7 Oct 2024 13:18:49 +0100 +Subject: arm64: cputype: Add Neoverse-N3 definitions + +From: Mark Rutland + +[ Upstream commit 924725707d80bc2588cefafef76ff3f164d299bc ] + +Add cputype definitions for Neoverse-N3. These will be used for errata +detection in subsequent patches. + +These values can be found in Table A-261 ("MIDR_EL1 bit descriptions") +in issue 02 of the Neoverse-N3 TRM, which can be found at: + + https://developer.arm.com/documentation/107997/0000/?lang=en + +Signed-off-by: Mark Rutland +Cc: James Morse +Cc: Will Deacon +Link: https://lore.kernel.org/r/20240930111705.3352047-2-mark.rutland@arm.com +Signed-off-by: Catalin Marinas +[ Mark: trivial backport ] +Signed-off-by: Mark Rutland +Signed-off-by: Sasha Levin +--- + arch/arm64/include/asm/cputype.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h +index cf5636e5c6c8b..bd2c9057fba9c 100644 +--- a/arch/arm64/include/asm/cputype.h ++++ b/arch/arm64/include/asm/cputype.h +@@ -89,6 +89,7 @@ + #define ARM_CPU_PART_NEOVERSE_V3 0xD84 + #define ARM_CPU_PART_CORTEX_X925 0xD85 + #define ARM_CPU_PART_CORTEX_A725 0xD87 ++#define ARM_CPU_PART_NEOVERSE_N3 0xD8E + + #define APM_CPU_PART_POTENZA 0x000 + +@@ -139,6 +140,7 @@ + #define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3) + #define MIDR_CORTEX_X925 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X925) + #define MIDR_CORTEX_A725 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A725) ++#define MIDR_NEOVERSE_N3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N3) + #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX) + #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX) + #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX) +-- +2.43.0 + diff --git a/queue-5.4/arm64-errata-expand-speculative-ssbs-workaround-once.patch b/queue-5.4/arm64-errata-expand-speculative-ssbs-workaround-once.patch new file mode 100644 index 00000000000..505f4ddccb6 --- /dev/null +++ b/queue-5.4/arm64-errata-expand-speculative-ssbs-workaround-once.patch @@ -0,0 +1,114 @@ +From 5e4bfa8008a62e727163476e7b922d90738a0211 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 7 Oct 2024 13:18:50 +0100 +Subject: arm64: errata: Expand speculative SSBS workaround once more + +From: Mark Rutland + +[ Upstream commit 081eb7932c2b244f63317a982c5e3990e2c7fbdd ] + +A number of Arm Ltd CPUs suffer from errata whereby an MSR to the SSBS +special-purpose register does not affect subsequent speculative +instructions, permitting speculative store bypassing for a window of +time. + +We worked around this for a number of CPUs in commits: + +* 7187bb7d0b5c7dfa ("arm64: errata: Add workaround for Arm errata 3194386 and 3312417") +* 75b3c43eab594bfb ("arm64: errata: Expand speculative SSBS workaround") +* 145502cac7ea70b5 ("arm64: errata: Expand speculative SSBS workaround (again)") + +Since then, a (hopefully final) batch of updates have been published, +with two more affected CPUs. For the affected CPUs the existing +mitigation is sufficient, as described in their respective Software +Developer Errata Notice (SDEN) documents: + +* Cortex-A715 (MP148) SDEN v15.0, erratum 3456084 + https://developer.arm.com/documentation/SDEN-2148827/1500/ + +* Neoverse-N3 (MP195) SDEN v5.0, erratum 3456111 + https://developer.arm.com/documentation/SDEN-3050973/0500/ + +Enable the existing mitigation by adding the relevant MIDRs to +erratum_spec_ssbs_list, and update silicon-errata.rst and the +Kconfig text accordingly. + +Signed-off-by: Mark Rutland +Cc: James Morse +Cc: Will Deacon +Link: https://lore.kernel.org/r/20240930111705.3352047-3-mark.rutland@arm.com +Signed-off-by: Catalin Marinas +[ Mark: fix conflict in silicon-errata.rst, handle move ] +Signed-off-by: Mark Rutland +Signed-off-by: Sasha Levin +--- + Documentation/arm64/silicon-errata.rst | 4 ++++ + arch/arm64/Kconfig | 2 ++ + arch/arm64/kernel/cpu_errata.c | 2 ++ + 3 files changed, 8 insertions(+) + +diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst +index 00755541a9c50..17da972099760 100644 +--- a/Documentation/arm64/silicon-errata.rst ++++ b/Documentation/arm64/silicon-errata.rst +@@ -98,6 +98,8 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A710 | #3324338 | ARM64_ERRATUM_3194386 | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-A715 | #3456084 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A720 | #3456091 | ARM64_ERRATUM_3194386 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A725 | #3456106 | ARM64_ERRATUM_3194386 | +@@ -124,6 +126,8 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-N2 | #3324339 | ARM64_ERRATUM_3194386 | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Neoverse-N3 | #3456111 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-V1 | #3324341 | ARM64_ERRATUM_3194386 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-V2 | #3324336 | ARM64_ERRATUM_3194386 | +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index 562558e0915cb..82eba7ffa1d58 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -602,6 +602,7 @@ config ARM64_ERRATUM_3194386 + * ARM Cortex-A78C erratum 3324346 + * ARM Cortex-A78C erratum 3324347 + * ARM Cortex-A710 erratam 3324338 ++ * ARM Cortex-A715 errartum 3456084 + * ARM Cortex-A720 erratum 3456091 + * ARM Cortex-A725 erratum 3456106 + * ARM Cortex-X1 erratum 3324344 +@@ -612,6 +613,7 @@ config ARM64_ERRATUM_3194386 + * ARM Cortex-X925 erratum 3324334 + * ARM Neoverse-N1 erratum 3324349 + * ARM Neoverse N2 erratum 3324339 ++ * ARM Neoverse-N3 erratum 3456111 + * ARM Neoverse-V1 erratum 3324341 + * ARM Neoverse V2 erratum 3324336 + * ARM Neoverse-V3 erratum 3312417 +diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c +index 20c8d39b71cd6..1e1dfe59a469e 100644 +--- a/arch/arm64/kernel/cpu_errata.c ++++ b/arch/arm64/kernel/cpu_errata.c +@@ -848,6 +848,7 @@ static const struct midr_range erratum_spec_ssbs_list[] = { + MIDR_ALL_VERSIONS(MIDR_CORTEX_A78), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A710), ++ MIDR_ALL_VERSIONS(MIDR_CORTEX_A715), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A720), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A725), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X1), +@@ -858,6 +859,7 @@ static const struct midr_range erratum_spec_ssbs_list[] = { + MIDR_ALL_VERSIONS(MIDR_CORTEX_X925), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2), ++ MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N3), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3), +-- +2.43.0 + diff --git a/queue-5.4/clk-imx6ul-add-ethernet-refclock-mux-support.patch b/queue-5.4/clk-imx6ul-add-ethernet-refclock-mux-support.patch new file mode 100644 index 00000000000..08b2ecf48e4 --- /dev/null +++ b/queue-5.4/clk-imx6ul-add-ethernet-refclock-mux-support.patch @@ -0,0 +1,134 @@ +From f0dd30eeb8614d9986db933a46344c0cf5474d58 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 31 Jan 2023 09:46:39 +0100 +Subject: clk: imx6ul: add ethernet refclock mux support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Oleksij Rempel + +[ Upstream commit 4e197ee880c24ecb63f7fe17449b3653bc64b03c ] + +Add ethernet refclock mux support and set it to internal clock by +default. This configuration will not affect existing boards. + +clock tree before this patch: +fec1 <- enet1_ref_125m (gate) <- enet1_ref (divider) <-, + |- pll6_enet +fec2 <- enet2_ref_125m (gate) <- enet2_ref (divider) <-´ + +after this patch: +fec1 <- enet1_ref_sel(mux) <- enet1_ref_125m (gate) <- ... + `--<> enet1_ref_pad |- pll6_enet +fec2 <- enet2_ref_sel(mux) <- enet2_ref_125m (gate) <- ... + `--<> enet2_ref_pad + +Signed-off-by: Oleksij Rempel +Acked-by: Lee Jones +Reviewed-by: Abel Vesa +Signed-off-by: Abel Vesa +Link: https://lore.kernel.org/r/20230131084642.709385-17-o.rempel@pengutronix.de +Stable-dep-of: 32c055ef563c ("clk: imx6ul: fix clock parent for IMX6UL_CLK_ENETx_REF_SEL") +Signed-off-by: Sasha Levin +--- + drivers/clk/imx/clk-imx6ul.c | 26 +++++++++++++++++++++ + include/dt-bindings/clock/imx6ul-clock.h | 6 ++++- + include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 6 +++-- + 3 files changed, 35 insertions(+), 3 deletions(-) + +diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c +index 7a8dc0dc9d153..ae120b51544ea 100644 +--- a/drivers/clk/imx/clk-imx6ul.c ++++ b/drivers/clk/imx/clk-imx6ul.c +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -94,6 +95,17 @@ static const struct clk_div_table video_div_table[] = { + { } + }; + ++static const char * enet1_ref_sels[] = { "enet1_ref_125m", "enet1_ref_pad", }; ++static const u32 enet1_ref_sels_table[] = { IMX6UL_GPR1_ENET1_TX_CLK_DIR, ++ IMX6UL_GPR1_ENET1_CLK_SEL }; ++static const u32 enet1_ref_sels_table_mask = IMX6UL_GPR1_ENET1_TX_CLK_DIR | ++ IMX6UL_GPR1_ENET1_CLK_SEL; ++static const char * enet2_ref_sels[] = { "enet2_ref_125m", "enet2_ref_pad", }; ++static const u32 enet2_ref_sels_table[] = { IMX6UL_GPR1_ENET2_TX_CLK_DIR, ++ IMX6UL_GPR1_ENET2_CLK_SEL }; ++static const u32 enet2_ref_sels_table_mask = IMX6UL_GPR1_ENET2_TX_CLK_DIR | ++ IMX6UL_GPR1_ENET2_CLK_SEL; ++ + static u32 share_count_asrc; + static u32 share_count_audio; + static u32 share_count_sai1; +@@ -467,6 +479,17 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node) + /* mask handshake of mmdc */ + imx_mmdc_mask_handshake(base, 0); + ++ hws[IMX6UL_CLK_ENET1_REF_PAD] = imx_obtain_fixed_of_clock(ccm_node, "enet1_ref_pad", 0); ++ ++ hws[IMX6UL_CLK_ENET1_REF_SEL] = imx_clk_gpr_mux("enet1_ref_sel", "fsl,imx6ul-iomuxc-gpr", ++ IOMUXC_GPR1, enet1_ref_sels, ARRAY_SIZE(enet1_ref_sels), ++ enet1_ref_sels_table, enet1_ref_sels_table_mask); ++ hws[IMX6UL_CLK_ENET2_REF_PAD] = imx_obtain_fixed_of_clock(ccm_node, "enet2_ref_pad", 0); ++ ++ hws[IMX6UL_CLK_ENET2_REF_SEL] = imx_clk_gpr_mux("enet2_ref_sel", "fsl,imx6ul-iomuxc-gpr", ++ IOMUXC_GPR1, enet2_ref_sels, ARRAY_SIZE(enet2_ref_sels), ++ enet2_ref_sels_table, enet2_ref_sels_table_mask); ++ + imx_check_clk_hws(hws, IMX6UL_CLK_END); + + of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data); +@@ -511,6 +534,9 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node) + clk_set_parent(hws[IMX6ULL_CLK_EPDC_PRE_SEL]->clk, hws[IMX6UL_CLK_PLL3_PFD2]->clk); + + clk_set_parent(hws[IMX6UL_CLK_ENFC_SEL]->clk, hws[IMX6UL_CLK_PLL2_PFD2]->clk); ++ ++ clk_set_parent(hws[IMX6UL_CLK_ENET1_REF_SEL]->clk, hws[IMX6UL_CLK_ENET_REF]->clk); ++ clk_set_parent(hws[IMX6UL_CLK_ENET2_REF_SEL]->clk, hws[IMX6UL_CLK_ENET2_REF]->clk); + } + + CLK_OF_DECLARE(imx6ul, "fsl,imx6ul-ccm", imx6ul_clocks_init); +diff --git a/include/dt-bindings/clock/imx6ul-clock.h b/include/dt-bindings/clock/imx6ul-clock.h +index b44920f1edb0d..66239ebc0e233 100644 +--- a/include/dt-bindings/clock/imx6ul-clock.h ++++ b/include/dt-bindings/clock/imx6ul-clock.h +@@ -257,7 +257,11 @@ + #define IMX6UL_CLK_GPIO5 248 + #define IMX6UL_CLK_MMDC_P1_IPG 249 + #define IMX6UL_CLK_ENET1_REF_125M 250 ++#define IMX6UL_CLK_ENET1_REF_SEL 251 ++#define IMX6UL_CLK_ENET1_REF_PAD 252 ++#define IMX6UL_CLK_ENET2_REF_SEL 253 ++#define IMX6UL_CLK_ENET2_REF_PAD 254 + +-#define IMX6UL_CLK_END 251 ++#define IMX6UL_CLK_END 255 + + #endif /* __DT_BINDINGS_CLOCK_IMX6UL_H */ +diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +index d4b5e527a7a3b..09c6b3184bb04 100644 +--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h ++++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +@@ -451,8 +451,10 @@ + #define IMX6SX_GPR12_PCIE_RX_EQ_2 (0x2 << 0) + + /* For imx6ul iomux gpr register field define */ +-#define IMX6UL_GPR1_ENET1_CLK_DIR (0x1 << 17) +-#define IMX6UL_GPR1_ENET2_CLK_DIR (0x1 << 18) ++#define IMX6UL_GPR1_ENET2_TX_CLK_DIR BIT(18) ++#define IMX6UL_GPR1_ENET1_TX_CLK_DIR BIT(17) ++#define IMX6UL_GPR1_ENET2_CLK_SEL BIT(14) ++#define IMX6UL_GPR1_ENET1_CLK_SEL BIT(13) + #define IMX6UL_GPR1_ENET1_CLK_OUTPUT (0x1 << 17) + #define IMX6UL_GPR1_ENET2_CLK_OUTPUT (0x1 << 18) + #define IMX6UL_GPR1_ENET_CLK_DIR (0x3 << 17) +-- +2.43.0 + diff --git a/queue-5.4/clk-imx6ul-fix-clock-parent-for-imx6ul_clk_enetx_ref.patch b/queue-5.4/clk-imx6ul-fix-clock-parent-for-imx6ul_clk_enetx_ref.patch new file mode 100644 index 00000000000..e145c9c433a --- /dev/null +++ b/queue-5.4/clk-imx6ul-fix-clock-parent-for-imx6ul_clk_enetx_ref.patch @@ -0,0 +1,47 @@ +From 1c0b91af1e0a7ea541d7a3b523122f76f2bb51b9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 2 Sep 2024 09:05:53 +0000 +Subject: clk: imx6ul: fix clock parent for IMX6UL_CLK_ENETx_REF_SEL + +From: Michel Alex + +[ Upstream commit 32c055ef563c3a4a73a477839f591b1b170bde8e ] + +Commit 4e197ee880c24ecb63f7fe17449b3653bc64b03c ("clk: imx6ul: add +ethernet refclock mux support") sets the internal clock as default +ethernet clock. + +Since IMX6UL_CLK_ENET_REF cannot be parent for IMX6UL_CLK_ENET1_REF_SEL, +the call to clk_set_parent() fails. IMX6UL_CLK_ENET1_REF_125M is the correct +parent and shall be used instead. +Same applies for IMX6UL_CLK_ENET2_REF_SEL, for which IMX6UL_CLK_ENET2_REF_125M +is the correct parent. + +Cc: stable@vger.kernel.org +Signed-off-by: Alex Michel +Reviewed-by: Oleksij Rempel +Link: https://lore.kernel.org/r/AS1P250MB0608F9CE4009DCE65C61EEDEA9922@AS1P250MB0608.EURP250.PROD.OUTLOOK.COM +Signed-off-by: Abel Vesa +Signed-off-by: Sasha Levin +--- + drivers/clk/imx/clk-imx6ul.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c +index 3895242235059..2ea0f00e3f796 100644 +--- a/drivers/clk/imx/clk-imx6ul.c ++++ b/drivers/clk/imx/clk-imx6ul.c +@@ -535,8 +535,8 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node) + + clk_set_parent(hws[IMX6UL_CLK_ENFC_SEL]->clk, hws[IMX6UL_CLK_PLL2_PFD2]->clk); + +- clk_set_parent(hws[IMX6UL_CLK_ENET1_REF_SEL]->clk, hws[IMX6UL_CLK_ENET_REF]->clk); +- clk_set_parent(hws[IMX6UL_CLK_ENET2_REF_SEL]->clk, hws[IMX6UL_CLK_ENET2_REF]->clk); ++ clk_set_parent(hws[IMX6UL_CLK_ENET1_REF_SEL]->clk, hws[IMX6UL_CLK_ENET1_REF_125M]->clk); ++ clk_set_parent(hws[IMX6UL_CLK_ENET2_REF_SEL]->clk, hws[IMX6UL_CLK_ENET2_REF_125M]->clk); + + imx_register_uart_clocks(); + } +-- +2.43.0 + diff --git a/queue-5.4/clk-imx6ul-fix-enet1-gate-configuration.patch b/queue-5.4/clk-imx6ul-fix-enet1-gate-configuration.patch new file mode 100644 index 00000000000..5cfa0177346 --- /dev/null +++ b/queue-5.4/clk-imx6ul-fix-enet1-gate-configuration.patch @@ -0,0 +1,88 @@ +From 19b552a1bb494a802044dd82d38ad865b66913fb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 31 Jan 2023 09:46:38 +0100 +Subject: clk: imx6ul: fix enet1 gate configuration +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Oleksij Rempel + +[ Upstream commit 5f82bfced6118450cb9ea3f12316568f6fac10ab ] + +According to the "i.MX 6UltraLite Applications Processor Reference Manual, +Rev. 2, 03/2017", BIT(13) is ENET1_125M_EN which is not controlling root +of PLL6. It is controlling ENET1 separately. + +So, instead of this picture (implementation before this patch): +fec1 <- enet_ref (divider) <---------------------------, + |- pll6_enet (gate) +fec2 <- enet2_ref_125m (gate) <- enet2_ref (divider) <-´ + +we should have this one (after this patch): +fec1 <- enet1_ref_125m (gate) <- enet1_ref (divider) <-, + |- pll6_enet +fec2 <- enet2_ref_125m (gate) <- enet2_ref (divider) <-´ + +With this fix, the RMII reference clock will be turned off, after +setting network interface down on each separate interface +(ip l s dev eth0 down). Which was not working before, on system with both +FECs enabled. + +Signed-off-by: Oleksij Rempel +Reviewed-by: Abel Vesa +Signed-off-by: Abel Vesa +Link: https://lore.kernel.org/r/20230131084642.709385-16-o.rempel@pengutronix.de +Stable-dep-of: 32c055ef563c ("clk: imx6ul: fix clock parent for IMX6UL_CLK_ENETx_REF_SEL") +Signed-off-by: Sasha Levin +--- + drivers/clk/imx/clk-imx6ul.c | 7 ++++--- + include/dt-bindings/clock/imx6ul-clock.h | 3 ++- + 2 files changed, 6 insertions(+), 4 deletions(-) + +diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c +index f3ac5a524f4ed..7a8dc0dc9d153 100644 +--- a/drivers/clk/imx/clk-imx6ul.c ++++ b/drivers/clk/imx/clk-imx6ul.c +@@ -176,7 +176,7 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node) + hws[IMX6UL_CLK_PLL3_USB_OTG] = imx_clk_hw_gate("pll3_usb_otg", "pll3_bypass", base + 0x10, 13); + hws[IMX6UL_CLK_PLL4_AUDIO] = imx_clk_hw_gate("pll4_audio", "pll4_bypass", base + 0x70, 13); + hws[IMX6UL_CLK_PLL5_VIDEO] = imx_clk_hw_gate("pll5_video", "pll5_bypass", base + 0xa0, 13); +- hws[IMX6UL_CLK_PLL6_ENET] = imx_clk_hw_gate("pll6_enet", "pll6_bypass", base + 0xe0, 13); ++ hws[IMX6UL_CLK_PLL6_ENET] = imx_clk_hw_fixed_factor("pll6_enet", "pll6_bypass", 1, 1); + hws[IMX6UL_CLK_PLL7_USB_HOST] = imx_clk_hw_gate("pll7_usb_host", "pll7_bypass", base + 0x20, 13); + + /* +@@ -205,12 +205,13 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node) + hws[IMX6UL_CLK_PLL3_PFD2] = imx_clk_hw_pfd("pll3_pfd2_508m", "pll3_usb_otg", base + 0xf0, 2); + hws[IMX6UL_CLK_PLL3_PFD3] = imx_clk_hw_pfd("pll3_pfd3_454m", "pll3_usb_otg", base + 0xf0, 3); + +- hws[IMX6UL_CLK_ENET_REF] = clk_hw_register_divider_table(NULL, "enet_ref", "pll6_enet", 0, ++ hws[IMX6UL_CLK_ENET_REF] = clk_hw_register_divider_table(NULL, "enet1_ref", "pll6_enet", 0, + base + 0xe0, 0, 2, 0, clk_enet_ref_table, &imx_ccm_lock); + hws[IMX6UL_CLK_ENET2_REF] = clk_hw_register_divider_table(NULL, "enet2_ref", "pll6_enet", 0, + base + 0xe0, 2, 2, 0, clk_enet_ref_table, &imx_ccm_lock); + +- hws[IMX6UL_CLK_ENET2_REF_125M] = imx_clk_hw_gate("enet_ref_125m", "enet2_ref", base + 0xe0, 20); ++ hws[IMX6UL_CLK_ENET1_REF_125M] = imx_clk_hw_gate("enet1_ref_125m", "enet1_ref", base + 0xe0, 13); ++ hws[IMX6UL_CLK_ENET2_REF_125M] = imx_clk_hw_gate("enet2_ref_125m", "enet2_ref", base + 0xe0, 20); + hws[IMX6UL_CLK_ENET_PTP_REF] = imx_clk_hw_fixed_factor("enet_ptp_ref", "pll6_enet", 1, 20); + hws[IMX6UL_CLK_ENET_PTP] = imx_clk_hw_gate("enet_ptp", "enet_ptp_ref", base + 0xe0, 21); + +diff --git a/include/dt-bindings/clock/imx6ul-clock.h b/include/dt-bindings/clock/imx6ul-clock.h +index 79094338e6f1e..b44920f1edb0d 100644 +--- a/include/dt-bindings/clock/imx6ul-clock.h ++++ b/include/dt-bindings/clock/imx6ul-clock.h +@@ -256,7 +256,8 @@ + #define IMX6UL_CLK_GPIO4 247 + #define IMX6UL_CLK_GPIO5 248 + #define IMX6UL_CLK_MMDC_P1_IPG 249 ++#define IMX6UL_CLK_ENET1_REF_125M 250 + +-#define IMX6UL_CLK_END 250 ++#define IMX6UL_CLK_END 251 + + #endif /* __DT_BINDINGS_CLOCK_IMX6UL_H */ +-- +2.43.0 + diff --git a/queue-5.4/clk-imx6ul-retain-early-uart-clocks-during-kernel-in.patch b/queue-5.4/clk-imx6ul-retain-early-uart-clocks-during-kernel-in.patch new file mode 100644 index 00000000000..6f6c7571c6d --- /dev/null +++ b/queue-5.4/clk-imx6ul-retain-early-uart-clocks-during-kernel-in.patch @@ -0,0 +1,38 @@ +From efe531035551263c92945a6f09e8638042556261 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 Apr 2023 13:55:17 +0200 +Subject: clk: imx6ul: retain early UART clocks during kernel init + +From: Alexander Stein + +[ Upstream commit 912d7af473f163ccdeb02aaabc3534177936b86c ] + +Make sure to keep UART clocks enabled during kernel init if +earlyprintk or earlycon are active. + +Signed-off-by: Alexander Stein +Reviewed-by: Peng Fan +Link: https://lore.kernel.org/r/20230421115517.1940990-1-alexander.stein@ew.tq-group.com +Signed-off-by: Abel Vesa +Stable-dep-of: 32c055ef563c ("clk: imx6ul: fix clock parent for IMX6UL_CLK_ENETx_REF_SEL") +Signed-off-by: Sasha Levin +--- + drivers/clk/imx/clk-imx6ul.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c +index ae120b51544ea..3895242235059 100644 +--- a/drivers/clk/imx/clk-imx6ul.c ++++ b/drivers/clk/imx/clk-imx6ul.c +@@ -537,6 +537,8 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node) + + clk_set_parent(hws[IMX6UL_CLK_ENET1_REF_SEL]->clk, hws[IMX6UL_CLK_ENET_REF]->clk); + clk_set_parent(hws[IMX6UL_CLK_ENET2_REF_SEL]->clk, hws[IMX6UL_CLK_ENET2_REF]->clk); ++ ++ imx_register_uart_clocks(); + } + + CLK_OF_DECLARE(imx6ul, "fsl,imx6ul-ccm", imx6ul_clocks_init); +-- +2.43.0 + diff --git a/queue-5.4/clk-qcom-clk-rpmh-fix-overflow-in-bcm-vote.patch b/queue-5.4/clk-qcom-clk-rpmh-fix-overflow-in-bcm-vote.patch new file mode 100644 index 00000000000..51ebbada638 --- /dev/null +++ b/queue-5.4/clk-qcom-clk-rpmh-fix-overflow-in-bcm-vote.patch @@ -0,0 +1,41 @@ +From f133bb6ca7a136c7f83c2a059ea3c49fcfcdee8a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 9 Aug 2024 10:51:29 +0530 +Subject: clk: qcom: clk-rpmh: Fix overflow in BCM vote + +From: Mike Tipton + +[ Upstream commit a4e5af27e6f6a8b0d14bc0d7eb04f4a6c7291586 ] + +Valid frequencies may result in BCM votes that exceed the max HW value. +Set vote ceiling to BCM_TCS_CMD_VOTE_MASK to ensure the votes aren't +truncated, which can result in lower frequencies than desired. + +Fixes: 04053f4d23a4 ("clk: qcom: clk-rpmh: Add IPA clock support") +Cc: stable@vger.kernel.org +Signed-off-by: Mike Tipton +Reviewed-by: Taniya Das +Signed-off-by: Imran Shaik +Link: https://lore.kernel.org/r/20240809-clk-rpmh-bcm-vote-fix-v2-1-240c584b7ef9@quicinc.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/clk-rpmh.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c +index 21f4248ba7ddb..a1cd64d71cec9 100644 +--- a/drivers/clk/qcom/clk-rpmh.c ++++ b/drivers/clk/qcom/clk-rpmh.c +@@ -270,6 +270,8 @@ static int clk_rpmh_bcm_send_cmd(struct clk_rpmh *c, bool enable) + cmd_state = 0; + } + ++ cmd_state = min(cmd_state, BCM_TCS_CMD_VOTE_MASK); ++ + if (c->last_sent_aggr_state != cmd_state) { + cmd.addr = c->res_addr; + cmd.data = BCM_TCS_CMD(1, enable, 0, cmd_state); +-- +2.43.0 + diff --git a/queue-5.4/clk-qcom-rpmh-simplify-clk_rpmh_bcm_send_cmd.patch b/queue-5.4/clk-qcom-rpmh-simplify-clk_rpmh_bcm_send_cmd.patch new file mode 100644 index 00000000000..5732c924d3b --- /dev/null +++ b/queue-5.4/clk-qcom-rpmh-simplify-clk_rpmh_bcm_send_cmd.patch @@ -0,0 +1,83 @@ +From e9a16eb5d2dcdaa6a113e58d13bdce9354e1bae0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 9 Mar 2020 15:12:31 -0700 +Subject: clk: qcom: rpmh: Simplify clk_rpmh_bcm_send_cmd() + +From: Stephen Boyd + +[ Upstream commit 2cf7a4cbcb4e108aae666dc6a81cedf69e1cba37 ] + +This function has some duplication in unlocking a mutex and returns in a +few different places. Let's use some if statements to consolidate code +and make this a bit easier to read. + +Cc: Bjorn Andersson +CC: Taniya Das +Signed-off-by: Stephen Boyd +Link: https://lkml.kernel.org/r/20200309221232.145630-2-sboyd@kernel.org +Stable-dep-of: a4e5af27e6f6 ("clk: qcom: clk-rpmh: Fix overflow in BCM vote") +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/clk-rpmh.c | 33 ++++++++++++++------------------- + 1 file changed, 14 insertions(+), 19 deletions(-) + +diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c +index d7586e26acd8d..21f4248ba7ddb 100644 +--- a/drivers/clk/qcom/clk-rpmh.c ++++ b/drivers/clk/qcom/clk-rpmh.c +@@ -259,38 +259,33 @@ static int clk_rpmh_bcm_send_cmd(struct clk_rpmh *c, bool enable) + { + struct tcs_cmd cmd = { 0 }; + u32 cmd_state; +- int ret; ++ int ret = 0; + + mutex_lock(&rpmh_clk_lock); +- +- cmd_state = 0; + if (enable) { + cmd_state = 1; + if (c->aggr_state) + cmd_state = c->aggr_state; ++ } else { ++ cmd_state = 0; + } + +- if (c->last_sent_aggr_state == cmd_state) { +- mutex_unlock(&rpmh_clk_lock); +- return 0; +- } +- +- cmd.addr = c->res_addr; +- cmd.data = BCM_TCS_CMD(1, enable, 0, cmd_state); ++ if (c->last_sent_aggr_state != cmd_state) { ++ cmd.addr = c->res_addr; ++ cmd.data = BCM_TCS_CMD(1, enable, 0, cmd_state); + +- ret = clk_rpmh_send(c, RPMH_ACTIVE_ONLY_STATE, &cmd, enable); +- if (ret) { +- dev_err(c->dev, "set active state of %s failed: (%d)\n", +- c->res_name, ret); +- mutex_unlock(&rpmh_clk_lock); +- return ret; ++ ret = clk_rpmh_send(c, RPMH_ACTIVE_ONLY_STATE, &cmd, enable); ++ if (ret) { ++ dev_err(c->dev, "set active state of %s failed: (%d)\n", ++ c->res_name, ret); ++ } else { ++ c->last_sent_aggr_state = cmd_state; ++ } + } + +- c->last_sent_aggr_state = cmd_state; +- + mutex_unlock(&rpmh_clk_lock); + +- return 0; ++ return ret; + } + + static int clk_rpmh_bcm_prepare(struct clk_hw *hw) +-- +2.43.0 + diff --git a/queue-5.4/i2c-qcom-geni-grow-a-dev-pointer-to-simplify-code.patch b/queue-5.4/i2c-qcom-geni-grow-a-dev-pointer-to-simplify-code.patch new file mode 100644 index 00000000000..39ead40882c --- /dev/null +++ b/queue-5.4/i2c-qcom-geni-grow-a-dev-pointer-to-simplify-code.patch @@ -0,0 +1,161 @@ +From 7d2dcffb0e0add6eaed0bc58f0dcb7f9b0e819cc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 10 Mar 2020 08:43:57 -0700 +Subject: i2c: qcom-geni: Grow a dev pointer to simplify code + +From: Stephen Boyd + +[ Upstream commit 3b7d81f08a6a2bdd406df4355b08d39def8104aa ] + +Some lines are long here. Use a struct dev pointer to shorten lines and +simplify code. The clk_get() call can fail because of EPROBE_DEFER +problems too, so just remove the error print message because it isn't +useful. Finally, platform_get_irq() already prints an error so just +remove that error message. + +Reviewed-by: Douglas Anderson +Reviewed-by: Brendan Higgins +Signed-off-by: Stephen Boyd +Reviewed-by: Bjorn Andersson +Reviewed-by: Amit Kucheria +Signed-off-by: Wolfram Sang +Stable-dep-of: e2c85d85a05f ("i2c: qcom-geni: Use IRQF_NO_AUTOEN flag in request_irq()") +Signed-off-by: Sasha Levin +--- + drivers/i2c/busses/i2c-qcom-geni.c | 57 ++++++++++++++---------------- + 1 file changed, 26 insertions(+), 31 deletions(-) + +diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c +index 6b87061ac81d1..e16c38fb37900 100644 +--- a/drivers/i2c/busses/i2c-qcom-geni.c ++++ b/drivers/i2c/busses/i2c-qcom-geni.c +@@ -529,45 +529,40 @@ static int geni_i2c_probe(struct platform_device *pdev) + struct resource *res; + u32 proto, tx_depth; + int ret; ++ struct device *dev = &pdev->dev; + +- gi2c = devm_kzalloc(&pdev->dev, sizeof(*gi2c), GFP_KERNEL); ++ gi2c = devm_kzalloc(dev, sizeof(*gi2c), GFP_KERNEL); + if (!gi2c) + return -ENOMEM; + +- gi2c->se.dev = &pdev->dev; +- gi2c->se.wrapper = dev_get_drvdata(pdev->dev.parent); ++ gi2c->se.dev = dev; ++ gi2c->se.wrapper = dev_get_drvdata(dev->parent); + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); +- gi2c->se.base = devm_ioremap_resource(&pdev->dev, res); ++ gi2c->se.base = devm_ioremap_resource(dev, res); + if (IS_ERR(gi2c->se.base)) + return PTR_ERR(gi2c->se.base); + +- gi2c->se.clk = devm_clk_get(&pdev->dev, "se"); +- if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(&pdev->dev)) { +- ret = PTR_ERR(gi2c->se.clk); +- dev_err(&pdev->dev, "Err getting SE Core clk %d\n", ret); +- return ret; +- } ++ gi2c->se.clk = devm_clk_get(dev, "se"); ++ if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(dev)) ++ return PTR_ERR(gi2c->se.clk); + +- ret = device_property_read_u32(&pdev->dev, "clock-frequency", +- &gi2c->clk_freq_out); ++ ret = device_property_read_u32(dev, "clock-frequency", ++ &gi2c->clk_freq_out); + if (ret) { +- dev_info(&pdev->dev, +- "Bus frequency not specified, default to 100kHz.\n"); ++ dev_info(dev, "Bus frequency not specified, default to 100kHz.\n"); + gi2c->clk_freq_out = KHZ(100); + } + +- if (has_acpi_companion(&pdev->dev)) +- ACPI_COMPANION_SET(&gi2c->adap.dev, ACPI_COMPANION(&pdev->dev)); ++ if (has_acpi_companion(dev)) ++ ACPI_COMPANION_SET(&gi2c->adap.dev, ACPI_COMPANION(dev)); + + gi2c->irq = platform_get_irq(pdev, 0); +- if (gi2c->irq < 0) { +- dev_err(&pdev->dev, "IRQ error for i2c-geni\n"); ++ if (gi2c->irq < 0) + return gi2c->irq; +- } + + ret = geni_i2c_clk_map_idx(gi2c); + if (ret) { +- dev_err(&pdev->dev, "Invalid clk frequency %d Hz: %d\n", ++ dev_err(dev, "Invalid clk frequency %d Hz: %d\n", + gi2c->clk_freq_out, ret); + return ret; + } +@@ -576,29 +571,29 @@ static int geni_i2c_probe(struct platform_device *pdev) + init_completion(&gi2c->done); + spin_lock_init(&gi2c->lock); + platform_set_drvdata(pdev, gi2c); +- ret = devm_request_irq(&pdev->dev, gi2c->irq, geni_i2c_irq, 0, +- dev_name(&pdev->dev), gi2c); ++ ret = devm_request_irq(dev, gi2c->irq, geni_i2c_irq, 0, ++ dev_name(dev), gi2c); + if (ret) { +- dev_err(&pdev->dev, "Request_irq failed:%d: err:%d\n", ++ dev_err(dev, "Request_irq failed:%d: err:%d\n", + gi2c->irq, ret); + return ret; + } + /* Disable the interrupt so that the system can enter low-power mode */ + disable_irq(gi2c->irq); + i2c_set_adapdata(&gi2c->adap, gi2c); +- gi2c->adap.dev.parent = &pdev->dev; +- gi2c->adap.dev.of_node = pdev->dev.of_node; ++ gi2c->adap.dev.parent = dev; ++ gi2c->adap.dev.of_node = dev->of_node; + strlcpy(gi2c->adap.name, "Geni-I2C", sizeof(gi2c->adap.name)); + + ret = geni_se_resources_on(&gi2c->se); + if (ret) { +- dev_err(&pdev->dev, "Error turning on resources %d\n", ret); ++ dev_err(dev, "Error turning on resources %d\n", ret); + return ret; + } + proto = geni_se_read_proto(&gi2c->se); + tx_depth = geni_se_get_tx_fifo_depth(&gi2c->se); + if (proto != GENI_SE_I2C) { +- dev_err(&pdev->dev, "Invalid proto %d\n", proto); ++ dev_err(dev, "Invalid proto %d\n", proto); + geni_se_resources_off(&gi2c->se); + return -ENXIO; + } +@@ -608,11 +603,11 @@ static int geni_i2c_probe(struct platform_device *pdev) + true, true, true); + ret = geni_se_resources_off(&gi2c->se); + if (ret) { +- dev_err(&pdev->dev, "Error turning off resources %d\n", ret); ++ dev_err(dev, "Error turning off resources %d\n", ret); + return ret; + } + +- dev_dbg(&pdev->dev, "i2c fifo/se-dma mode. fifo depth:%d\n", tx_depth); ++ dev_dbg(dev, "i2c fifo/se-dma mode. fifo depth:%d\n", tx_depth); + + gi2c->suspended = 1; + pm_runtime_set_suspended(gi2c->se.dev); +@@ -622,12 +617,12 @@ static int geni_i2c_probe(struct platform_device *pdev) + + ret = i2c_add_adapter(&gi2c->adap); + if (ret) { +- dev_err(&pdev->dev, "Error adding i2c adapter %d\n", ret); ++ dev_err(dev, "Error adding i2c adapter %d\n", ret); + pm_runtime_disable(gi2c->se.dev); + return ret; + } + +- dev_dbg(&pdev->dev, "Geni-I2C adaptor successfully added\n"); ++ dev_dbg(dev, "Geni-I2C adaptor successfully added\n"); + + return 0; + } +-- +2.43.0 + diff --git a/queue-5.4/i2c-qcom-geni-let-firmware-specify-irq-trigger-flags.patch b/queue-5.4/i2c-qcom-geni-let-firmware-specify-irq-trigger-flags.patch new file mode 100644 index 00000000000..814f35045d5 --- /dev/null +++ b/queue-5.4/i2c-qcom-geni-let-firmware-specify-irq-trigger-flags.patch @@ -0,0 +1,46 @@ +From 0a2748f92f86202071cbd604efc0cddb6290840e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 10 Mar 2020 08:43:56 -0700 +Subject: i2c: qcom-geni: Let firmware specify irq trigger flags + +From: Stephen Boyd + +[ Upstream commit b2ca8800621b95ecced081376de9fe256b1fa479 ] + +We don't need to force IRQF_TRIGGER_HIGH here as the DT or ACPI tables +should take care of this for us. Just use 0 instead so that we use the +flags from the firmware. Also, remove specify dev_name() for the irq +name so that we can get better information in /proc/interrupts about +which device is generating interrupts. + +Cc: Alok Chauhan +Reviewed-by: Douglas Anderson +Reviewed-by: Brendan Higgins +Signed-off-by: Stephen Boyd +Reviewed-by: Bjorn Andersson +Reviewed-by: Amit Kucheria +Signed-off-by: Wolfram Sang +Stable-dep-of: e2c85d85a05f ("i2c: qcom-geni: Use IRQF_NO_AUTOEN flag in request_irq()") +Signed-off-by: Sasha Levin +--- + drivers/i2c/busses/i2c-qcom-geni.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c +index c73b997899af8..6b87061ac81d1 100644 +--- a/drivers/i2c/busses/i2c-qcom-geni.c ++++ b/drivers/i2c/busses/i2c-qcom-geni.c +@@ -576,8 +576,8 @@ static int geni_i2c_probe(struct platform_device *pdev) + init_completion(&gi2c->done); + spin_lock_init(&gi2c->lock); + platform_set_drvdata(pdev, gi2c); +- ret = devm_request_irq(&pdev->dev, gi2c->irq, geni_i2c_irq, +- IRQF_TRIGGER_HIGH, "i2c_geni", gi2c); ++ ret = devm_request_irq(&pdev->dev, gi2c->irq, geni_i2c_irq, 0, ++ dev_name(&pdev->dev), gi2c); + if (ret) { + dev_err(&pdev->dev, "Request_irq failed:%d: err:%d\n", + gi2c->irq, ret); +-- +2.43.0 + diff --git a/queue-5.4/i2c-qcom-geni-use-irqf_no_autoen-flag-in-request_irq.patch b/queue-5.4/i2c-qcom-geni-use-irqf_no_autoen-flag-in-request_irq.patch new file mode 100644 index 00000000000..8c919051f26 --- /dev/null +++ b/queue-5.4/i2c-qcom-geni-use-irqf_no_autoen-flag-in-request_irq.patch @@ -0,0 +1,48 @@ +From 5cff4a9b492f365a151e4ad49fdf3becf44d1caf Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 12 Sep 2024 11:34:59 +0800 +Subject: i2c: qcom-geni: Use IRQF_NO_AUTOEN flag in request_irq() + +From: Jinjie Ruan + +[ Upstream commit e2c85d85a05f16af2223fcc0195ff50a7938b372 ] + +disable_irq() after request_irq() still has a time gap in which +interrupts can come. request_irq() with IRQF_NO_AUTOEN flag will +disable IRQ auto-enable when request IRQ. + +Fixes: 37692de5d523 ("i2c: i2c-qcom-geni: Add bus driver for the Qualcomm GENI I2C controller") +Signed-off-by: Jinjie Ruan +Cc: # v4.19+ +Acked-by: Mukesh Kumar Savaliya +Reviewed-by: Vladimir Zapolskiy +Signed-off-by: Andi Shyti +Signed-off-by: Sasha Levin +--- + drivers/i2c/busses/i2c-qcom-geni.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c +index e16c38fb37900..20fe16b1d4c83 100644 +--- a/drivers/i2c/busses/i2c-qcom-geni.c ++++ b/drivers/i2c/busses/i2c-qcom-geni.c +@@ -571,15 +571,13 @@ static int geni_i2c_probe(struct platform_device *pdev) + init_completion(&gi2c->done); + spin_lock_init(&gi2c->lock); + platform_set_drvdata(pdev, gi2c); +- ret = devm_request_irq(dev, gi2c->irq, geni_i2c_irq, 0, ++ ret = devm_request_irq(dev, gi2c->irq, geni_i2c_irq, IRQF_NO_AUTOEN, + dev_name(dev), gi2c); + if (ret) { + dev_err(dev, "Request_irq failed:%d: err:%d\n", + gi2c->irq, ret); + return ret; + } +- /* Disable the interrupt so that the system can enter low-power mode */ +- disable_irq(gi2c->irq); + i2c_set_adapdata(&gi2c->adap, gi2c); + gi2c->adap.dev.parent = dev; + gi2c->adap.dev.of_node = dev->of_node; +-- +2.43.0 + diff --git a/queue-5.4/nfsd-fix-delegation_blocked-to-block-correctly-for-a.patch b/queue-5.4/nfsd-fix-delegation_blocked-to-block-correctly-for-a.patch new file mode 100644 index 00000000000..396c3309058 --- /dev/null +++ b/queue-5.4/nfsd-fix-delegation_blocked-to-block-correctly-for-a.patch @@ -0,0 +1,65 @@ +From a171cf8fb608d0c5215cd75c6b9e696bbcf65012 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 9 Sep 2024 15:06:36 +1000 +Subject: nfsd: fix delegation_blocked() to block correctly for at least 30 + seconds + +From: NeilBrown + +[ Upstream commit 45bb63ed20e02ae146336412889fe5450316a84f ] + +The pair of bloom filtered used by delegation_blocked() was intended to +block delegations on given filehandles for between 30 and 60 seconds. A +new filehandle would be recorded in the "new" bit set. That would then +be switch to the "old" bit set between 0 and 30 seconds later, and it +would remain as the "old" bit set for 30 seconds. + +Unfortunately the code intended to clear the old bit set once it reached +30 seconds old, preparing it to be the next new bit set, instead cleared +the *new* bit set before switching it to be the old bit set. This means +that the "old" bit set is always empty and delegations are blocked +between 0 and 30 seconds. + +This patch updates bd->new before clearing the set with that index, +instead of afterwards. + +Reported-by: Olga Kornievskaia +Cc: stable@vger.kernel.org +Fixes: 6282cd565553 ("NFSD: Don't hand out delegations for 30 seconds after recalling them.") +Signed-off-by: NeilBrown +Reviewed-by: Benjamin Coddington +Reviewed-by: Jeff Layton +Signed-off-by: Chuck Lever +Signed-off-by: Sasha Levin +--- + fs/nfsd/nfs4state.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/fs/nfsd/nfs4state.c b/fs/nfsd/nfs4state.c +index 336342b414627..89927d9b07673 100644 +--- a/fs/nfsd/nfs4state.c ++++ b/fs/nfsd/nfs4state.c +@@ -820,7 +820,8 @@ static void nfs4_free_deleg(struct nfs4_stid *stid) + * When a delegation is recalled, the filehandle is stored in the "new" + * filter. + * Every 30 seconds we swap the filters and clear the "new" one, +- * unless both are empty of course. ++ * unless both are empty of course. This results in delegations for a ++ * given filehandle being blocked for between 30 and 60 seconds. + * + * Each filter is 256 bits. We hash the filehandle to 32bit and use the + * low 3 bytes as hash-table indices. +@@ -849,9 +850,9 @@ static int delegation_blocked(struct knfsd_fh *fh) + if (ktime_get_seconds() - bd->swap_time > 30) { + bd->entries -= bd->old_entries; + bd->old_entries = bd->entries; ++ bd->new = 1-bd->new; + memset(bd->set[bd->new], 0, + sizeof(bd->set[0])); +- bd->new = 1-bd->new; + bd->swap_time = ktime_get_seconds(); + } + spin_unlock(&blocked_delegations_lock); +-- +2.43.0 + diff --git a/queue-5.4/nfsd-use-ktime_get_seconds-for-timestamps.patch b/queue-5.4/nfsd-use-ktime_get_seconds-for-timestamps.patch new file mode 100644 index 00000000000..23b6ef7a397 --- /dev/null +++ b/queue-5.4/nfsd-use-ktime_get_seconds-for-timestamps.patch @@ -0,0 +1,64 @@ +From 9e0ce60b259ca37b6967567cdfcf1a2e0bed60a3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 20 Oct 2017 11:25:34 +0200 +Subject: nfsd: use ktime_get_seconds() for timestamps + +From: Arnd Bergmann + +[ Upstream commit b3f255ef6bffc18a28c3b6295357f2a3380c033f ] + +The delegation logic in nfsd uses the somewhat inefficient +seconds_since_boot() function to record time intervals. + +Signed-off-by: Arnd Bergmann +Signed-off-by: J. Bruce Fields +Stable-dep-of: 45bb63ed20e0 ("nfsd: fix delegation_blocked() to block correctly for at least 30 seconds") +Signed-off-by: Sasha Levin +--- + fs/nfsd/nfs4state.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/fs/nfsd/nfs4state.c b/fs/nfsd/nfs4state.c +index a0aa7e63739df..336342b414627 100644 +--- a/fs/nfsd/nfs4state.c ++++ b/fs/nfsd/nfs4state.c +@@ -832,7 +832,7 @@ static void nfs4_free_deleg(struct nfs4_stid *stid) + static DEFINE_SPINLOCK(blocked_delegations_lock); + static struct bloom_pair { + int entries, old_entries; +- time_t swap_time; ++ time64_t swap_time; + int new; /* index into 'set' */ + DECLARE_BITMAP(set[2], 256); + } blocked_delegations; +@@ -844,15 +844,15 @@ static int delegation_blocked(struct knfsd_fh *fh) + + if (bd->entries == 0) + return 0; +- if (seconds_since_boot() - bd->swap_time > 30) { ++ if (ktime_get_seconds() - bd->swap_time > 30) { + spin_lock(&blocked_delegations_lock); +- if (seconds_since_boot() - bd->swap_time > 30) { ++ if (ktime_get_seconds() - bd->swap_time > 30) { + bd->entries -= bd->old_entries; + bd->old_entries = bd->entries; + memset(bd->set[bd->new], 0, + sizeof(bd->set[0])); + bd->new = 1-bd->new; +- bd->swap_time = seconds_since_boot(); ++ bd->swap_time = ktime_get_seconds(); + } + spin_unlock(&blocked_delegations_lock); + } +@@ -882,7 +882,7 @@ static void block_delegations(struct knfsd_fh *fh) + __set_bit((hash>>8)&255, bd->set[bd->new]); + __set_bit((hash>>16)&255, bd->set[bd->new]); + if (bd->entries == 0) +- bd->swap_time = seconds_since_boot(); ++ bd->swap_time = ktime_get_seconds(); + bd->entries += 1; + spin_unlock(&blocked_delegations_lock); + } +-- +2.43.0 + diff --git a/queue-5.4/r8169-add-tally-counter-fields-added-with-rtl8125.patch b/queue-5.4/r8169-add-tally-counter-fields-added-with-rtl8125.patch new file mode 100644 index 00000000000..e5e8861bddc --- /dev/null +++ b/queue-5.4/r8169-add-tally-counter-fields-added-with-rtl8125.patch @@ -0,0 +1,66 @@ +From 74bebe47d2e2ac03ecacae3f7852b5208d85d8fd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 17 Sep 2024 23:04:46 +0200 +Subject: r8169: add tally counter fields added with RTL8125 + +From: Heiner Kallweit + +[ Upstream commit ced8e8b8f40accfcce4a2bbd8b150aa76d5eff9a ] + +RTL8125 added fields to the tally counter, what may result in the chip +dma'ing these new fields to unallocated memory. Therefore make sure +that the allocated memory area is big enough to hold all of the +tally counter values, even if we use only parts of it. + +Fixes: f1bce4ad2f1c ("r8169: add support for RTL8125") +Cc: stable@vger.kernel.org +Signed-off-by: Heiner Kallweit +Reviewed-by: Simon Horman +Link: https://patch.msgid.link/741d26a9-2b2b-485d-91d9-ecb302e345b5@gmail.com +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/realtek/r8169_main.c | 27 +++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c +index e354b8c99f62f..bb5f70ce63b3d 100644 +--- a/drivers/net/ethernet/realtek/r8169_main.c ++++ b/drivers/net/ethernet/realtek/r8169_main.c +@@ -624,6 +624,33 @@ struct rtl8169_counters { + __le32 rx_multicast; + __le16 tx_aborted; + __le16 tx_underrun; ++ /* new since RTL8125 */ ++ __le64 tx_octets; ++ __le64 rx_octets; ++ __le64 rx_multicast64; ++ __le64 tx_unicast64; ++ __le64 tx_broadcast64; ++ __le64 tx_multicast64; ++ __le32 tx_pause_on; ++ __le32 tx_pause_off; ++ __le32 tx_pause_all; ++ __le32 tx_deferred; ++ __le32 tx_late_collision; ++ __le32 tx_all_collision; ++ __le32 tx_aborted32; ++ __le32 align_errors32; ++ __le32 rx_frame_too_long; ++ __le32 rx_runt; ++ __le32 rx_pause_on; ++ __le32 rx_pause_off; ++ __le32 rx_pause_all; ++ __le32 rx_unknown_opcode; ++ __le32 rx_mac_error; ++ __le32 tx_underrun32; ++ __le32 rx_mac_missed; ++ __le32 rx_tcam_dropped; ++ __le32 tdu; ++ __le32 rdu; + }; + + struct rtl8169_tc_offsets { +-- +2.43.0 + diff --git a/queue-5.4/r8169-fix-spelling-mistake-tx_underun-tx_underrun.patch b/queue-5.4/r8169-fix-spelling-mistake-tx_underun-tx_underrun.patch new file mode 100644 index 00000000000..b9e415ada30 --- /dev/null +++ b/queue-5.4/r8169-fix-spelling-mistake-tx_underun-tx_underrun.patch @@ -0,0 +1,48 @@ +From 2d0400c4fb62135d865b059921f2763aae854a6f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 9 Sep 2024 15:00:21 +0100 +Subject: r8169: Fix spelling mistake: "tx_underun" -> "tx_underrun" + +From: Colin Ian King + +[ Upstream commit 8df9439389a44fb2cc4ef695e08d6a8870b1616c ] + +There is a spelling mistake in the struct field tx_underun, rename +it to tx_underrun. + +Signed-off-by: Colin Ian King +Reviewed-by: Simon Horman +Reviewed-by: Heiner Kallweit +Link: https://patch.msgid.link/20240909140021.64884-1-colin.i.king@gmail.com +Signed-off-by: Jakub Kicinski +Stable-dep-of: ced8e8b8f40a ("r8169: add tally counter fields added with RTL8125") +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/realtek/r8169_main.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c +index 319f8d7a502da..e354b8c99f62f 100644 +--- a/drivers/net/ethernet/realtek/r8169_main.c ++++ b/drivers/net/ethernet/realtek/r8169_main.c +@@ -623,7 +623,7 @@ struct rtl8169_counters { + __le64 rx_broadcast; + __le32 rx_multicast; + __le16 tx_aborted; +- __le16 tx_underun; ++ __le16 tx_underrun; + }; + + struct rtl8169_tc_offsets { +@@ -1795,7 +1795,7 @@ static void rtl8169_get_ethtool_stats(struct net_device *dev, + data[9] = le64_to_cpu(counters->rx_broadcast); + data[10] = le32_to_cpu(counters->rx_multicast); + data[11] = le16_to_cpu(counters->tx_aborted); +- data[12] = le16_to_cpu(counters->tx_underun); ++ data[12] = le16_to_cpu(counters->tx_underrun); + } + + static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data) +-- +2.43.0 + diff --git a/queue-5.4/series b/queue-5.4/series index 5d1bb7d6420..ae518788d90 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -283,3 +283,22 @@ acpi-resource-add-asus-expertbook-b2502cva-to-irq1_level_low_skip_override.patch btrfs-fix-a-null-pointer-dereference-when-failed-to-start-a-new-trasacntion.patch btrfs-wait-for-fixup-workers-before-stopping-cleaner-kthread-during-umount.patch gpio-davinci-fix-lazy-disable.patch +i2c-qcom-geni-let-firmware-specify-irq-trigger-flags.patch +i2c-qcom-geni-grow-a-dev-pointer-to-simplify-code.patch +i2c-qcom-geni-use-irqf_no_autoen-flag-in-request_irq.patch +arm64-add-cortex-715-cpu-part-definition.patch +arm64-cputype-add-neoverse-n3-definitions.patch +arm64-errata-expand-speculative-ssbs-workaround-once.patch +uprobes-fix-kernel-info-leak-via-uprobes-vma.patch +nfsd-use-ktime_get_seconds-for-timestamps.patch +nfsd-fix-delegation_blocked-to-block-correctly-for-a.patch +clk-imx6ul-fix-enet1-gate-configuration.patch +clk-imx6ul-add-ethernet-refclock-mux-support.patch +clk-imx6ul-retain-early-uart-clocks-during-kernel-in.patch +clk-imx6ul-fix-clock-parent-for-imx6ul_clk_enetx_ref.patch +clk-qcom-rpmh-simplify-clk_rpmh_bcm_send_cmd.patch +clk-qcom-clk-rpmh-fix-overflow-in-bcm-vote.patch +r8169-fix-spelling-mistake-tx_underun-tx_underrun.patch +r8169-add-tally-counter-fields-added-with-rtl8125.patch +acpi-battery-simplify-battery-hook-locking.patch +acpi-battery-fix-possible-crash-when-unregistering-a.patch diff --git a/queue-5.4/uprobes-fix-kernel-info-leak-via-uprobes-vma.patch b/queue-5.4/uprobes-fix-kernel-info-leak-via-uprobes-vma.patch new file mode 100644 index 00000000000..01b06750b79 --- /dev/null +++ b/queue-5.4/uprobes-fix-kernel-info-leak-via-uprobes-vma.patch @@ -0,0 +1,43 @@ +From b77d15ce8c05098c3728fa61e577d04f7a6f7178 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 7 Oct 2024 19:46:01 +0200 +Subject: uprobes: fix kernel info leak via "[uprobes]" vma + +From: Oleg Nesterov + +commit 34820304cc2cd1804ee1f8f3504ec77813d29c8e upstream. + +xol_add_vma() maps the uninitialized page allocated by __create_xol_area() +into userspace. On some architectures (x86) this memory is readable even +without VM_READ, VM_EXEC results in the same pgprot_t as VM_EXEC|VM_READ, +although this doesn't really matter, debugger can read this memory anyway. + +Link: https://lore.kernel.org/all/20240929162047.GA12611@redhat.com/ + +Reported-by: Will Deacon +Fixes: d4b3b6384f98 ("uprobes/core: Allocate XOL slots for uprobes use") +Cc: stable@vger.kernel.org +Acked-by: Masami Hiramatsu (Google) +Signed-off-by: Oleg Nesterov +Signed-off-by: Masami Hiramatsu (Google) +Signed-off-by: Sasha Levin +--- + kernel/events/uprobes.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c +index c812575f04619..6285674412f25 100644 +--- a/kernel/events/uprobes.c ++++ b/kernel/events/uprobes.c +@@ -1502,7 +1502,7 @@ static struct xol_area *__create_xol_area(unsigned long vaddr) + + area->xol_mapping.name = "[uprobes]"; + area->xol_mapping.pages = area->pages; +- area->pages[0] = alloc_page(GFP_HIGHUSER); ++ area->pages[0] = alloc_page(GFP_HIGHUSER | __GFP_ZERO); + if (!area->pages[0]) + goto free_bitmap; + area->pages[1] = NULL; +-- +2.43.0 +