From: Greg Kroah-Hartman Date: Sat, 13 May 2023 07:26:16 +0000 (+0900) Subject: 5.15-stable patches X-Git-Tag: v4.14.315~88 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9ed417432002b77e9591d52e345807be5448d8dd;p=thirdparty%2Fkernel%2Fstable-queue.git 5.15-stable patches added patches: drm-amd-display-fix-flickering-caused-by-s-g-mode.patch drm-amdgpu-disable-sdma-ecc-irq-only-when-sdma-ras-is-enabled-in-suspend.patch drm-amdgpu-fix-an-amdgpu_irq_put-issue-in-gmc_v9_0_hw_fini.patch drm-amdgpu-fix-vram-recover-doesn-t-work-after-whole-gpu-reset-v2.patch drm-amdgpu-gfx-disable-gfx9-cp_ecc_error_irq-only-when-enabling-legacy-gfx-ras.patch --- diff --git a/queue-5.15/drm-amd-display-fix-flickering-caused-by-s-g-mode.patch b/queue-5.15/drm-amd-display-fix-flickering-caused-by-s-g-mode.patch new file mode 100644 index 00000000000..26df5a80e47 --- /dev/null +++ b/queue-5.15/drm-amd-display-fix-flickering-caused-by-s-g-mode.patch @@ -0,0 +1,58 @@ +From 08da182175db4c7f80850354849d95f2670e8cd9 Mon Sep 17 00:00:00 2001 +From: Hamza Mahfooz +Date: Fri, 14 Apr 2023 14:26:27 -0400 +Subject: drm/amd/display: fix flickering caused by S/G mode + +From: Hamza Mahfooz + +commit 08da182175db4c7f80850354849d95f2670e8cd9 upstream. + +Currently, on a handful of ASICs. We allow the framebuffer for a given +plane to exist in either VRAM or GTT. However, if the plane's new +framebuffer is in a different memory domain than it's previous +framebuffer, flipping between them can cause the screen to flicker. So, +to fix this, don't perform an immediate flip in the aforementioned case. + +Cc: stable@vger.kernel.org +Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2354 +Reviewed-by: Roman Li +Fixes: 81d0bcf99009 ("drm/amdgpu: make display pinning more flexible (v2)") +Signed-off-by: Hamza Mahfooz +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13 +++++++++++-- + 1 file changed, 11 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -8944,6 +8944,13 @@ static void amdgpu_dm_commit_cursors(str + handle_cursor_update(plane, old_plane_state); + } + ++static inline uint32_t get_mem_type(struct drm_framebuffer *fb) ++{ ++ struct amdgpu_bo *abo = gem_to_amdgpu_bo(fb->obj[0]); ++ ++ return abo->tbo.resource ? abo->tbo.resource->mem_type : 0; ++} ++ + static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, + struct dc_state *dc_state, + struct drm_device *dev, +@@ -9064,11 +9071,13 @@ static void amdgpu_dm_commit_planes(stru + + /* + * Only allow immediate flips for fast updates that don't +- * change FB pitch, DCC state, rotation or mirroing. ++ * change memory domain, FB pitch, DCC state, rotation or ++ * mirroring. + */ + bundle->flip_addrs[planes_count].flip_immediate = + crtc->state->async_flip && +- acrtc_state->update_type == UPDATE_TYPE_FAST; ++ acrtc_state->update_type == UPDATE_TYPE_FAST && ++ get_mem_type(old_plane_state->fb) == get_mem_type(fb); + + timestamp_ns = ktime_get_ns(); + bundle->flip_addrs[planes_count].flip_timestamp_in_us = div_u64(timestamp_ns, 1000); diff --git a/queue-5.15/drm-amdgpu-disable-sdma-ecc-irq-only-when-sdma-ras-is-enabled-in-suspend.patch b/queue-5.15/drm-amdgpu-disable-sdma-ecc-irq-only-when-sdma-ras-is-enabled-in-suspend.patch new file mode 100644 index 00000000000..85ddd984ab1 --- /dev/null +++ b/queue-5.15/drm-amdgpu-disable-sdma-ecc-irq-only-when-sdma-ras-is-enabled-in-suspend.patch @@ -0,0 +1,60 @@ +From 8b229ada2669b74fdae06c83fbfda5a5a99fc253 Mon Sep 17 00:00:00 2001 +From: Guchun Chen +Date: Sat, 6 May 2023 16:52:59 +0800 +Subject: drm/amdgpu: disable sdma ecc irq only when sdma RAS is enabled in suspend + +From: Guchun Chen + +commit 8b229ada2669b74fdae06c83fbfda5a5a99fc253 upstream. + +sdma_v4_0_ip is shared on a few asics, but in sdma_v4_0_hw_fini, +driver unconditionally disables ecc_irq which is only enabled on +those asics enabling sdma ecc. This will introduce a warning in +suspend cycle on those chips with sdma ip v4.0, while without +sdma ecc. So this patch correct this. + +[ 7283.166354] RIP: 0010:amdgpu_irq_put+0x45/0x70 [amdgpu] +[ 7283.167001] RSP: 0018:ffff9a5fc3967d08 EFLAGS: 00010246 +[ 7283.167019] RAX: ffff98d88afd3770 RBX: 0000000000000001 RCX: 0000000000000000 +[ 7283.167023] RDX: 0000000000000000 RSI: ffff98d89da30390 RDI: ffff98d89da20000 +[ 7283.167025] RBP: ffff98d89da20000 R08: 0000000000036838 R09: 0000000000000006 +[ 7283.167028] R10: ffffd5764243c008 R11: 0000000000000000 R12: ffff98d89da30390 +[ 7283.167030] R13: ffff98d89da38978 R14: ffffffff999ae15a R15: ffff98d880130105 +[ 7283.167032] FS: 0000000000000000(0000) GS:ffff98d996f00000(0000) knlGS:0000000000000000 +[ 7283.167036] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 +[ 7283.167039] CR2: 00000000f7a9d178 CR3: 00000001c42ea000 CR4: 00000000003506e0 +[ 7283.167041] Call Trace: +[ 7283.167046] +[ 7283.167048] sdma_v4_0_hw_fini+0x38/0xa0 [amdgpu] +[ 7283.167704] amdgpu_device_ip_suspend_phase2+0x101/0x1a0 [amdgpu] +[ 7283.168296] amdgpu_device_suspend+0x103/0x180 [amdgpu] +[ 7283.168875] amdgpu_pmops_freeze+0x21/0x60 [amdgpu] +[ 7283.169464] pci_pm_freeze+0x54/0xc0 + +Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2522 +Signed-off-by: Guchun Chen +Reviewed-by: Tao Zhou +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +@@ -2044,9 +2044,11 @@ static int sdma_v4_0_hw_fini(void *handl + if (amdgpu_sriov_vf(adev)) + return 0; + +- for (i = 0; i < adev->sdma.num_instances; i++) { +- amdgpu_irq_put(adev, &adev->sdma.ecc_irq, +- AMDGPU_SDMA_IRQ_INSTANCE0 + i); ++ if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA)) { ++ for (i = 0; i < adev->sdma.num_instances; i++) { ++ amdgpu_irq_put(adev, &adev->sdma.ecc_irq, ++ AMDGPU_SDMA_IRQ_INSTANCE0 + i); ++ } + } + + sdma_v4_0_ctx_switch_enable(adev, false); diff --git a/queue-5.15/drm-amdgpu-fix-an-amdgpu_irq_put-issue-in-gmc_v9_0_hw_fini.patch b/queue-5.15/drm-amdgpu-fix-an-amdgpu_irq_put-issue-in-gmc_v9_0_hw_fini.patch new file mode 100644 index 00000000000..f1e34968a11 --- /dev/null +++ b/queue-5.15/drm-amdgpu-fix-an-amdgpu_irq_put-issue-in-gmc_v9_0_hw_fini.patch @@ -0,0 +1,36 @@ +From 922a76ba31adf84e72bc947267385be420c689ee Mon Sep 17 00:00:00 2001 +From: Hamza Mahfooz +Date: Tue, 2 May 2023 11:59:08 -0400 +Subject: drm/amdgpu: fix an amdgpu_irq_put() issue in gmc_v9_0_hw_fini() + +From: Hamza Mahfooz + +commit 922a76ba31adf84e72bc947267385be420c689ee upstream. + +As made mention of in commit 08c677cb0b43 ("drm/amdgpu: fix +amdgpu_irq_put call trace in gmc_v10_0_hw_fini") and commit 13af556104fa +("drm/amdgpu: fix amdgpu_irq_put call trace in gmc_v11_0_hw_fini"). It +is meaningless to call amdgpu_irq_put() for gmc.ecc_irq. So, remove it +from gmc_v9_0_hw_fini(). + +Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2522 +Fixes: 3029c855d79f ("drm/amdgpu: Fix desktop freezed after gpu-reset") +Reviewed-by: Mario Limonciello +Signed-off-by: Hamza Mahfooz +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +@@ -1819,7 +1819,6 @@ static int gmc_v9_0_hw_fini(void *handle + return 0; + } + +- amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0); + amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0); + + return 0; diff --git a/queue-5.15/drm-amdgpu-fix-vram-recover-doesn-t-work-after-whole-gpu-reset-v2.patch b/queue-5.15/drm-amdgpu-fix-vram-recover-doesn-t-work-after-whole-gpu-reset-v2.patch new file mode 100644 index 00000000000..d1ca2ad2154 --- /dev/null +++ b/queue-5.15/drm-amdgpu-fix-vram-recover-doesn-t-work-after-whole-gpu-reset-v2.patch @@ -0,0 +1,42 @@ +From 6c032c37ac3ef3b7df30937c785ecc4da428edc0 Mon Sep 17 00:00:00 2001 +From: "Lin.Cao" +Date: Mon, 8 May 2023 17:28:41 +0800 +Subject: drm/amdgpu: Fix vram recover doesn't work after whole GPU reset (v2) +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Lin.Cao + +commit 6c032c37ac3ef3b7df30937c785ecc4da428edc0 upstream. + +v1: Vmbo->shadow is used to back vram bo up when vram lost. So that we +should set shadow as vmbo->shadow to recover vmbo->bo +v2: Modify if(vmbo->shadow) shadow = vmbo->shadow as if(!vmbo->shadow) +continue; + +Fixes: e18aaea733da ("drm/amdgpu: move shadow_list to amdgpu_bo_vm") +Reviewed-by: Christian König +Signed-off-by: Lin.Cao +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -4368,7 +4368,11 @@ static int amdgpu_device_recover_vram(st + dev_info(adev->dev, "recover vram bo from shadow start\n"); + mutex_lock(&adev->shadow_list_lock); + list_for_each_entry(vmbo, &adev->shadow_list, shadow_list) { +- shadow = &vmbo->bo; ++ /* If vm is compute context or adev is APU, shadow will be NULL */ ++ if (!vmbo->shadow) ++ continue; ++ shadow = vmbo->shadow; ++ + /* No need to recover an evicted BO */ + if (shadow->tbo.resource->mem_type != TTM_PL_TT || + shadow->tbo.resource->start == AMDGPU_BO_INVALID_OFFSET || diff --git a/queue-5.15/drm-amdgpu-gfx-disable-gfx9-cp_ecc_error_irq-only-when-enabling-legacy-gfx-ras.patch b/queue-5.15/drm-amdgpu-gfx-disable-gfx9-cp_ecc_error_irq-only-when-enabling-legacy-gfx-ras.patch new file mode 100644 index 00000000000..e84882a7b45 --- /dev/null +++ b/queue-5.15/drm-amdgpu-gfx-disable-gfx9-cp_ecc_error_irq-only-when-enabling-legacy-gfx-ras.patch @@ -0,0 +1,59 @@ +From 4a76680311330aefe5074bed8f06afa354b85c48 Mon Sep 17 00:00:00 2001 +From: Guchun Chen +Date: Sat, 6 May 2023 20:06:45 +0800 +Subject: drm/amdgpu/gfx: disable gfx9 cp_ecc_error_irq only when enabling legacy gfx ras + +From: Guchun Chen + +commit 4a76680311330aefe5074bed8f06afa354b85c48 upstream. + +gfx9 cp_ecc_error_irq is only enabled when legacy gfx ras is assert. +So in gfx_v9_0_hw_fini, interrupt disablement for cp_ecc_error_irq +should be executed under such condition, otherwise, an amdgpu_irq_put +calltrace will occur. + +[ 7283.170322] RIP: 0010:amdgpu_irq_put+0x45/0x70 [amdgpu] +[ 7283.170964] RSP: 0018:ffff9a5fc3967d00 EFLAGS: 00010246 +[ 7283.170967] RAX: ffff98d88afd3040 RBX: ffff98d89da20000 RCX: 0000000000000000 +[ 7283.170969] RDX: 0000000000000000 RSI: ffff98d89da2bef8 RDI: ffff98d89da20000 +[ 7283.170971] RBP: ffff98d89da20000 R08: ffff98d89da2ca18 R09: 0000000000000006 +[ 7283.170973] R10: ffffd5764243c008 R11: 0000000000000000 R12: 0000000000001050 +[ 7283.170975] R13: ffff98d89da38978 R14: ffffffff999ae15a R15: ffff98d880130105 +[ 7283.170978] FS: 0000000000000000(0000) GS:ffff98d996f00000(0000) knlGS:0000000000000000 +[ 7283.170981] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 +[ 7283.170983] CR2: 00000000f7a9d178 CR3: 00000001c42ea000 CR4: 00000000003506e0 +[ 7283.170986] Call Trace: +[ 7283.170988] +[ 7283.170989] gfx_v9_0_hw_fini+0x1c/0x6d0 [amdgpu] +[ 7283.171655] amdgpu_device_ip_suspend_phase2+0x101/0x1a0 [amdgpu] +[ 7283.172245] amdgpu_device_suspend+0x103/0x180 [amdgpu] +[ 7283.172823] amdgpu_pmops_freeze+0x21/0x60 [amdgpu] +[ 7283.173412] pci_pm_freeze+0x54/0xc0 +[ 7283.173419] ? __pfx_pci_pm_freeze+0x10/0x10 +[ 7283.173425] dpm_run_callback+0x98/0x200 +[ 7283.173430] __device_suspend+0x164/0x5f0 + +v2: drop gfx11 as it's fixed in a different solution by retiring cp_ecc_irq funcs(Hawking) + +Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2522 +Signed-off-by: Guchun Chen +Reviewed-by: Tao Zhou +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -4018,7 +4018,8 @@ static int gfx_v9_0_hw_fini(void *handle + { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + +- amdgpu_irq_put(adev, &adev->gfx.cp_ecc_error_irq, 0); ++ if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX)) ++ amdgpu_irq_put(adev, &adev->gfx.cp_ecc_error_irq, 0); + amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0); + amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0); + diff --git a/queue-5.15/series b/queue-5.15/series index 8aeb7c8167b..21d793209c5 100644 --- a/queue-5.15/series +++ b/queue-5.15/series @@ -90,3 +90,8 @@ drm-msm-fix-null-deref-on-snapshot-tear-down.patch drm-msm-fix-null-deref-on-irq-uninstall.patch f2fs-fix-potential-corruption-when-moving-a-directory.patch drm-panel-otm8009a-set-backlight-parent-to-panel-device.patch +drm-amd-display-fix-flickering-caused-by-s-g-mode.patch +drm-amdgpu-fix-an-amdgpu_irq_put-issue-in-gmc_v9_0_hw_fini.patch +drm-amdgpu-gfx-disable-gfx9-cp_ecc_error_irq-only-when-enabling-legacy-gfx-ras.patch +drm-amdgpu-fix-vram-recover-doesn-t-work-after-whole-gpu-reset-v2.patch +drm-amdgpu-disable-sdma-ecc-irq-only-when-sdma-ras-is-enabled-in-suspend.patch