From: Greg Kroah-Hartman Date: Wed, 19 Feb 2025 07:04:26 +0000 (+0100) Subject: 5.15-stable patches X-Git-Tag: v6.1.129~15 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9fc09e455323ec129094af7442968e38290ff1dd;p=thirdparty%2Fkernel%2Fstable-queue.git 5.15-stable patches added patches: arm-dts-dra7-add-bus_dma_limit-for-l4-cfg-bus.patch can-ems_pci-move-asix-ax99100-ids-to-pci_ids.h.patch f2fs-fix-to-wait-dio-completion.patch netdevsim-print-human-readable-ip-address.patch parport_pc-add-support-for-asix-ax99100.patch selftests-rtnetlink-update-netdevsim-ipsec-output-format.patch serial-8250_pci-add-support-for-asix-ax99100.patch x86-i8253-disable-pit-timer-0-when-not-in-use.patch --- diff --git a/queue-5.15/arm-dts-dra7-add-bus_dma_limit-for-l4-cfg-bus.patch b/queue-5.15/arm-dts-dra7-add-bus_dma_limit-for-l4-cfg-bus.patch new file mode 100644 index 0000000000..1b8be054cb --- /dev/null +++ b/queue-5.15/arm-dts-dra7-add-bus_dma_limit-for-l4-cfg-bus.patch @@ -0,0 +1,54 @@ +From c1472ec1dc4419d0bae663c1a1e6cb98dc7881ad Mon Sep 17 00:00:00 2001 +From: Romain Naour +Date: Fri, 15 Nov 2024 11:25:37 +0100 +Subject: ARM: dts: dra7: Add bus_dma_limit for l4 cfg bus + +From: Romain Naour + +commit c1472ec1dc4419d0bae663c1a1e6cb98dc7881ad upstream. + +A bus_dma_limit was added for l3 bus by commit cfb5d65f2595 +("ARM: dts: dra7: Add bus_dma_limit for L3 bus") to fix an issue +observed only with SATA on DRA7-EVM with 4GB RAM and CONFIG_ARM_LPAE +enabled. + +Since kernel 5.13, the SATA issue can be reproduced again following +the SATA node move from L3 bus to L4_cfg in commit 8af15365a368 +("ARM: dts: Configure interconnect target module for dra7 sata"). + +Fix it by adding an empty dma-ranges property to l4_cfg and +segment@100000 nodes (parent device tree node of SATA controller) to +inherit the 2GB dma ranges limit from l3 bus node. + +Note: A similar fix was applied for PCIe controller by commit +90d4d3f4ea45 ("ARM: dts: dra7: Fix bus_dma_limit for PCIe"). + +Fixes: 8af15365a368 ("ARM: dts: Configure interconnect target module for dra7 sata"). +Link: https://lore.kernel.org/linux-omap/c583e1bb-f56b-4489-8012-ce742e85f233@smile.fr/ +Cc: stable@vger.kernel.org # 5.13 +Signed-off-by: Romain Naour +Link: https://lore.kernel.org/r/20241115102537.1330300-1-romain.naour@smile.fr +Signed-off-by: Kevin Hilman +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm/boot/dts/dra7-l4.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm/boot/dts/dra7-l4.dtsi ++++ b/arch/arm/boot/dts/dra7-l4.dtsi +@@ -12,6 +12,7 @@ + ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */ + <0x00100000 0x4a100000 0x100000>, /* segment 1 */ + <0x00200000 0x4a200000 0x100000>; /* segment 2 */ ++ dma-ranges; + + segment@0 { /* 0x4a000000 */ + compatible = "simple-pm-bus"; +@@ -557,6 +558,7 @@ + <0x0007e000 0x0017e000 0x001000>, /* ap 124 */ + <0x00059000 0x00159000 0x001000>, /* ap 125 */ + <0x0005a000 0x0015a000 0x001000>; /* ap 126 */ ++ dma-ranges; + + target-module@2000 { /* 0x4a102000, ap 27 3c.0 */ + compatible = "ti,sysc"; diff --git a/queue-5.15/can-ems_pci-move-asix-ax99100-ids-to-pci_ids.h.patch b/queue-5.15/can-ems_pci-move-asix-ax99100-ids-to-pci_ids.h.patch new file mode 100644 index 0000000000..6c3f249cf6 --- /dev/null +++ b/queue-5.15/can-ems_pci-move-asix-ax99100-ids-to-pci_ids.h.patch @@ -0,0 +1,38 @@ +From 3029ad91335353a70feb42acd24d580d70ab258b Mon Sep 17 00:00:00 2001 +From: Jiaqing Zhao +Date: Mon, 24 Jul 2023 08:39:31 +0000 +Subject: can: ems_pci: move ASIX AX99100 ids to pci_ids.h + +From: Jiaqing Zhao + +commit 3029ad91335353a70feb42acd24d580d70ab258b upstream. + +Move PCI Vendor and Device ID of ASIX AX99100 PCIe to Multi I/O +Controller to pci_ids.h for its serial and parallel port driver +support in subsequent patches. + +Signed-off-by: Jiaqing Zhao +Reviewed-by: Andy Shevchenko +Acked-by: Bjorn Helgaas +Acked-by: Marc Kleine-Budde +Link: https://lore.kernel.org/r/20230724083933.3173513-3-jiaqing.zhao@linux.intel.com +[Moeko: Drop changes in drivers/net/can/sja1000/ems_pci.c] +Signed-off-by: Tomita Moeko +Signed-off-by: Greg Kroah-Hartman +--- + include/linux/pci_ids.h | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/include/linux/pci_ids.h ++++ b/include/linux/pci_ids.h +@@ -1743,6 +1743,10 @@ + #define PCI_SUBDEVICE_ID_AT_2700FX 0x2701 + #define PCI_SUBDEVICE_ID_AT_2701FX 0x2703 + ++#define PCI_VENDOR_ID_ASIX 0x125b ++#define PCI_DEVICE_ID_ASIX_AX99100 0x9100 ++#define PCI_DEVICE_ID_ASIX_AX99100_LB 0x9110 ++ + #define PCI_VENDOR_ID_ESS 0x125d + #define PCI_DEVICE_ID_ESS_ESS1968 0x1968 + #define PCI_DEVICE_ID_ESS_ESS1978 0x1978 diff --git a/queue-5.15/f2fs-fix-to-wait-dio-completion.patch b/queue-5.15/f2fs-fix-to-wait-dio-completion.patch new file mode 100644 index 0000000000..01be7da7f2 --- /dev/null +++ b/queue-5.15/f2fs-fix-to-wait-dio-completion.patch @@ -0,0 +1,51 @@ +From 96cfeb0389530ae32ade8a48ae3ae1ac3b6c009d Mon Sep 17 00:00:00 2001 +From: Chao Yu +Date: Thu, 27 Jun 2024 15:17:11 +0800 +Subject: f2fs: fix to wait dio completion + +From: Chao Yu + +commit 96cfeb0389530ae32ade8a48ae3ae1ac3b6c009d upstream. + +It should wait all existing dio write IOs before block removal, +otherwise, previous direct write IO may overwrite data in the +block which may be reused by other inode. + +Cc: stable@vger.kernel.org +Signed-off-by: Chao Yu +Signed-off-by: Jaegeuk Kim +Signed-off-by: Alva Lan +Signed-off-by: Greg Kroah-Hartman +--- + fs/f2fs/file.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/fs/f2fs/file.c ++++ b/fs/f2fs/file.c +@@ -965,6 +965,13 @@ int f2fs_setattr(struct user_namespace * + return err; + } + ++ /* ++ * wait for inflight dio, blocks should be removed after ++ * IO completion. ++ */ ++ if (attr->ia_size < old_size) ++ inode_dio_wait(inode); ++ + down_write(&F2FS_I(inode)->i_gc_rwsem[WRITE]); + filemap_invalidate_lock(inode->i_mapping); + +@@ -1790,6 +1797,12 @@ static long f2fs_fallocate(struct file * + if (ret) + goto out; + ++ /* ++ * wait for inflight dio, blocks should be removed after IO ++ * completion. ++ */ ++ inode_dio_wait(inode); ++ + if (mode & FALLOC_FL_PUNCH_HOLE) { + if (offset >= inode->i_size) + goto out; diff --git a/queue-5.15/netdevsim-print-human-readable-ip-address.patch b/queue-5.15/netdevsim-print-human-readable-ip-address.patch new file mode 100644 index 0000000000..77b5a33074 --- /dev/null +++ b/queue-5.15/netdevsim-print-human-readable-ip-address.patch @@ -0,0 +1,70 @@ +From c71bc6da6198a6d88df86094f1052bb581951d65 Mon Sep 17 00:00:00 2001 +From: Hangbin Liu +Date: Thu, 10 Oct 2024 04:00:25 +0000 +Subject: netdevsim: print human readable IP address + +From: Hangbin Liu + +commit c71bc6da6198a6d88df86094f1052bb581951d65 upstream. + +Currently, IPSec addresses are printed in hexadecimal format, which is +not user-friendly. e.g. + + # cat /sys/kernel/debug/netdevsim/netdevsim0/ports/0/ipsec + SA count=2 tx=20 + sa[0] rx ipaddr=0x00000000 00000000 00000000 0100a8c0 + sa[0] spi=0x00000101 proto=0x32 salt=0x0adecc3a crypt=1 + sa[0] key=0x3167608a ca4f1397 43565909 941fa627 + sa[1] tx ipaddr=0x00000000 00000000 00000000 00000000 + sa[1] spi=0x00000100 proto=0x32 salt=0x0adecc3a crypt=1 + sa[1] key=0x3167608a ca4f1397 43565909 941fa627 + +This patch updates the code to print the IPSec address in a human-readable +format for easier debug. e.g. + + # cat /sys/kernel/debug/netdevsim/netdevsim0/ports/0/ipsec + SA count=4 tx=40 + sa[0] tx ipaddr=0.0.0.0 + sa[0] spi=0x00000100 proto=0x32 salt=0x0adecc3a crypt=1 + sa[0] key=0x3167608a ca4f1397 43565909 941fa627 + sa[1] rx ipaddr=192.168.0.1 + sa[1] spi=0x00000101 proto=0x32 salt=0x0adecc3a crypt=1 + sa[1] key=0x3167608a ca4f1397 43565909 941fa627 + sa[2] tx ipaddr=:: + sa[2] spi=0x00000100 proto=0x32 salt=0x0adecc3a crypt=1 + sa[2] key=0x3167608a ca4f1397 43565909 941fa627 + sa[3] rx ipaddr=2000::1 + sa[3] spi=0x00000101 proto=0x32 salt=0x0adecc3a crypt=1 + sa[3] key=0x3167608a ca4f1397 43565909 941fa627 + +Reviewed-by: Simon Horman +Signed-off-by: Hangbin Liu +Link: https://patch.msgid.link/20241010040027.21440-2-liuhangbin@gmail.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Harshit Mogalapalli +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/netdevsim/ipsec.c | 12 ++++++++---- + 1 file changed, 8 insertions(+), 4 deletions(-) + +--- a/drivers/net/netdevsim/ipsec.c ++++ b/drivers/net/netdevsim/ipsec.c +@@ -39,10 +39,14 @@ static ssize_t nsim_dbg_netdev_ops_read( + if (!sap->used) + continue; + +- p += scnprintf(p, bufsize - (p - buf), +- "sa[%i] %cx ipaddr=0x%08x %08x %08x %08x\n", +- i, (sap->rx ? 'r' : 't'), sap->ipaddr[0], +- sap->ipaddr[1], sap->ipaddr[2], sap->ipaddr[3]); ++ if (sap->xs->props.family == AF_INET6) ++ p += scnprintf(p, bufsize - (p - buf), ++ "sa[%i] %cx ipaddr=%pI6c\n", ++ i, (sap->rx ? 'r' : 't'), &sap->ipaddr); ++ else ++ p += scnprintf(p, bufsize - (p - buf), ++ "sa[%i] %cx ipaddr=%pI4\n", ++ i, (sap->rx ? 'r' : 't'), &sap->ipaddr[3]); + p += scnprintf(p, bufsize - (p - buf), + "sa[%i] spi=0x%08x proto=0x%x salt=0x%08x crypt=%d\n", + i, be32_to_cpu(sap->xs->id.spi), diff --git a/queue-5.15/parport_pc-add-support-for-asix-ax99100.patch b/queue-5.15/parport_pc-add-support-for-asix-ax99100.patch new file mode 100644 index 0000000000..2948eb1f26 --- /dev/null +++ b/queue-5.15/parport_pc-add-support-for-asix-ax99100.patch @@ -0,0 +1,52 @@ +From 16aae4c64600a6319a6f10dbff833fa198bf9599 Mon Sep 17 00:00:00 2001 +From: Jiaqing Zhao +Date: Mon, 24 Jul 2023 08:39:33 +0000 +Subject: parport_pc: add support for ASIX AX99100 + +From: Jiaqing Zhao + +commit 16aae4c64600a6319a6f10dbff833fa198bf9599 upstream. + +The PCI function 2 on ASIX AX99100 PCIe to Multi I/O Controller can be +configured as a single-port parallel port controller. The subvendor id +is 0x2000 when configured as parallel port. It supports IEEE-1284 EPP / +ECP with its ECR on BAR1. + +Signed-off-by: Jiaqing Zhao +Reviewed-by: Andy Shevchenko +Acked-by: Sudip Mukherjee +Link: https://lore.kernel.org/r/20230724083933.3173513-5-jiaqing.zhao@linux.intel.com +Signed-off-by: Tomita Moeko +Signed-off-by: Greg Kroah-Hartman +--- + drivers/parport/parport_pc.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/parport/parport_pc.c ++++ b/drivers/parport/parport_pc.c +@@ -2611,6 +2611,7 @@ enum parport_pc_pci_cards { + netmos_9815, + netmos_9901, + netmos_9865, ++ asix_ax99100, + quatech_sppxp100, + wch_ch382l, + brainboxes_uc146, +@@ -2676,6 +2677,7 @@ static struct parport_pc_pci { + /* netmos_9815 */ { 2, { { 0, 1 }, { 2, 3 }, } }, + /* netmos_9901 */ { 1, { { 0, -1 }, } }, + /* netmos_9865 */ { 1, { { 0, -1 }, } }, ++ /* asix_ax99100 */ { 1, { { 0, 1 }, } }, + /* quatech_sppxp100 */ { 1, { { 0, 1 }, } }, + /* wch_ch382l */ { 1, { { 2, -1 }, } }, + /* brainboxes_uc146 */ { 1, { { 3, -1 }, } }, +@@ -2766,6 +2768,9 @@ static const struct pci_device_id parpor + 0xA000, 0x1000, 0, 0, netmos_9865 }, + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865, + 0xA000, 0x2000, 0, 0, netmos_9865 }, ++ /* ASIX AX99100 PCIe to Multi I/O Controller */ ++ { PCI_VENDOR_ID_ASIX, PCI_DEVICE_ID_ASIX_AX99100, ++ 0xA000, 0x2000, 0, 0, asix_ax99100 }, + /* Quatech SPPXP-100 Parallel port PCI ExpressCard */ + { PCI_VENDOR_ID_QUATECH, PCI_DEVICE_ID_QUATECH_SPPXP_100, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, quatech_sppxp100 }, diff --git a/queue-5.15/selftests-rtnetlink-update-netdevsim-ipsec-output-format.patch b/queue-5.15/selftests-rtnetlink-update-netdevsim-ipsec-output-format.patch new file mode 100644 index 0000000000..6edc5cc7b7 --- /dev/null +++ b/queue-5.15/selftests-rtnetlink-update-netdevsim-ipsec-output-format.patch @@ -0,0 +1,40 @@ +From 3ec920bb978ccdc68a7dfb304d303d598d038cb1 Mon Sep 17 00:00:00 2001 +From: Hangbin Liu +Date: Thu, 10 Oct 2024 04:00:27 +0000 +Subject: selftests: rtnetlink: update netdevsim ipsec output format + +From: Hangbin Liu + +commit 3ec920bb978ccdc68a7dfb304d303d598d038cb1 upstream. + +After the netdevsim update to use human-readable IP address formats for +IPsec, we can now use the source and destination IPs directly in testing. +Here is the result: + # ./rtnetlink.sh -t kci_test_ipsec_offload + PASS: ipsec_offload + +Signed-off-by: Hangbin Liu +Acked-by: Stanislav Fomichev +Link: https://patch.msgid.link/20241010040027.21440-4-liuhangbin@gmail.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Harshit Mogalapalli +Signed-off-by: Greg Kroah-Hartman +--- + tools/testing/selftests/net/rtnetlink.sh | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/tools/testing/selftests/net/rtnetlink.sh ++++ b/tools/testing/selftests/net/rtnetlink.sh +@@ -813,10 +813,10 @@ kci_test_ipsec_offload() + # does driver have correct offload info + diff $sysfsf - << EOF + SA count=2 tx=3 +-sa[0] tx ipaddr=0x00000000 00000000 00000000 00000000 ++sa[0] tx ipaddr=$dstip + sa[0] spi=0x00000009 proto=0x32 salt=0x61626364 crypt=1 + sa[0] key=0x34333231 38373635 32313039 36353433 +-sa[1] rx ipaddr=0x00000000 00000000 00000000 037ba8c0 ++sa[1] rx ipaddr=$srcip + sa[1] spi=0x00000009 proto=0x32 salt=0x61626364 crypt=1 + sa[1] key=0x34333231 38373635 32313039 36353433 + EOF diff --git a/queue-5.15/serial-8250_pci-add-support-for-asix-ax99100.patch b/queue-5.15/serial-8250_pci-add-support-for-asix-ax99100.patch new file mode 100644 index 0000000000..162178dbbc --- /dev/null +++ b/queue-5.15/serial-8250_pci-add-support-for-asix-ax99100.patch @@ -0,0 +1,49 @@ +From 0b32216557ce3b2a468d1282d99b428bf72ff532 Mon Sep 17 00:00:00 2001 +From: Jiaqing Zhao +Date: Mon, 24 Jul 2023 08:39:32 +0000 +Subject: serial: 8250_pci: add support for ASIX AX99100 + +From: Jiaqing Zhao + +commit 0b32216557ce3b2a468d1282d99b428bf72ff532 upstream. + +Each of the 4 PCI functions on ASIX AX99100 PCIe to Multi I/O +Controller can be configured as a single-port serial port controller. +The subvendor id is 0x1000 when configured as serial port and MSI +interrupts are supported. + +Signed-off-by: Jiaqing Zhao +Reviewed-by: Andy Shevchenko +Link: https://lore.kernel.org/r/20230724083933.3173513-4-jiaqing.zhao@linux.intel.com +Signed-off-by: Tomita Moeko +Signed-off-by: Greg Kroah-Hartman +--- + drivers/tty/serial/8250/8250_pci.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/drivers/tty/serial/8250/8250_pci.c ++++ b/drivers/tty/serial/8250/8250_pci.c +@@ -66,6 +66,8 @@ static const struct pci_device_id pci_us + 0xA000, 0x1000) }, + { PCI_DEVICE_SUB(PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9922, + 0xA000, 0x1000) }, ++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ASIX, PCI_DEVICE_ID_ASIX_AX99100, ++ 0xA000, 0x1000) }, + { PCI_DEVICE_SUB(PCI_VENDOR_ID_HP_3PAR, PCI_DEVICE_ID_HPE_PCI_SERIAL, + PCI_ANY_ID, PCI_ANY_ID) }, + { } +@@ -6299,6 +6301,14 @@ static const struct pci_device_id serial + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865, + 0xA000, 0x3004, + 0, 0, pbn_b0_bt_4_115200 }, ++ ++ /* ++ * ASIX AX99100 PCIe to Multi I/O Controller ++ */ ++ { PCI_VENDOR_ID_ASIX, PCI_DEVICE_ID_ASIX_AX99100, ++ 0xA000, 0x1000, ++ 0, 0, pbn_b0_1_115200 }, ++ + /* Intel CE4100 */ + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CE4100_UART, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, diff --git a/queue-5.15/series b/queue-5.15/series index fbef32ed4b..8020f10177 100644 --- a/queue-5.15/series +++ b/queue-5.15/series @@ -420,3 +420,11 @@ alpha-replace-hardcoded-stack-offsets-with-autogenerated-ones.patch nilfs2-do-not-output-warnings-when-clearing-dirty-buffers.patch nilfs2-do-not-force-clear-folio-if-buffer-is-referenced.patch nilfs2-protect-access-to-buffers-with-no-active-references.patch +can-ems_pci-move-asix-ax99100-ids-to-pci_ids.h.patch +serial-8250_pci-add-support-for-asix-ax99100.patch +parport_pc-add-support-for-asix-ax99100.patch +netdevsim-print-human-readable-ip-address.patch +selftests-rtnetlink-update-netdevsim-ipsec-output-format.patch +arm-dts-dra7-add-bus_dma_limit-for-l4-cfg-bus.patch +f2fs-fix-to-wait-dio-completion.patch +x86-i8253-disable-pit-timer-0-when-not-in-use.patch diff --git a/queue-5.15/x86-i8253-disable-pit-timer-0-when-not-in-use.patch b/queue-5.15/x86-i8253-disable-pit-timer-0-when-not-in-use.patch new file mode 100644 index 0000000000..61180b12d9 --- /dev/null +++ b/queue-5.15/x86-i8253-disable-pit-timer-0-when-not-in-use.patch @@ -0,0 +1,96 @@ +From 70e6b7d9ae3c63df90a7bba7700e8d5c300c3c60 Mon Sep 17 00:00:00 2001 +From: David Woodhouse +Date: Fri, 2 Aug 2024 14:55:54 +0100 +Subject: x86/i8253: Disable PIT timer 0 when not in use + +From: David Woodhouse + +commit 70e6b7d9ae3c63df90a7bba7700e8d5c300c3c60 upstream. + +Leaving the PIT interrupt running can cause noticeable steal time for +virtual guests. The VMM generally has a timer which toggles the IRQ input +to the PIC and I/O APIC, which takes CPU time away from the guest. Even +on real hardware, running the counter may use power needlessly (albeit +not much). + +Make sure it's turned off if it isn't going to be used. + +Signed-off-by: David Woodhouse +Signed-off-by: Thomas Gleixner +Tested-by: Michael Kelley +Link: https://lore.kernel.org/all/20240802135555.564941-1-dwmw2@infradead.org +Signed-off-by: Greg Kroah-Hartman +--- + arch/x86/kernel/i8253.c | 11 +++++++++-- + drivers/clocksource/i8253.c | 13 +++++++++---- + include/linux/i8253.h | 1 + + 3 files changed, 19 insertions(+), 6 deletions(-) + +--- a/arch/x86/kernel/i8253.c ++++ b/arch/x86/kernel/i8253.c +@@ -8,6 +8,7 @@ + #include + #include + ++#include + #include + #include + #include +@@ -39,9 +40,15 @@ static bool __init use_pit(void) + + bool __init pit_timer_init(void) + { +- if (!use_pit()) ++ if (!use_pit()) { ++ /* ++ * Don't just ignore the PIT. Ensure it's stopped, because ++ * VMMs otherwise steal CPU time just to pointlessly waggle ++ * the (masked) IRQ. ++ */ ++ clockevent_i8253_disable(); + return false; +- ++ } + clockevent_i8253_init(true); + global_clock_event = &i8253_clockevent; + return true; +--- a/drivers/clocksource/i8253.c ++++ b/drivers/clocksource/i8253.c +@@ -108,11 +108,8 @@ int __init clocksource_i8253_init(void) + #endif + + #ifdef CONFIG_CLKEVT_I8253 +-static int pit_shutdown(struct clock_event_device *evt) ++void clockevent_i8253_disable(void) + { +- if (!clockevent_state_oneshot(evt) && !clockevent_state_periodic(evt)) +- return 0; +- + raw_spin_lock(&i8253_lock); + + outb_p(0x30, PIT_MODE); +@@ -123,6 +120,14 @@ static int pit_shutdown(struct clock_eve + } + + raw_spin_unlock(&i8253_lock); ++} ++ ++static int pit_shutdown(struct clock_event_device *evt) ++{ ++ if (!clockevent_state_oneshot(evt) && !clockevent_state_periodic(evt)) ++ return 0; ++ ++ clockevent_i8253_disable(); + return 0; + } + +--- a/include/linux/i8253.h ++++ b/include/linux/i8253.h +@@ -24,6 +24,7 @@ extern raw_spinlock_t i8253_lock; + extern bool i8253_clear_counter_on_shutdown; + extern struct clock_event_device i8253_clockevent; + extern void clockevent_i8253_init(bool oneshot); ++extern void clockevent_i8253_disable(void); + + extern void setup_pit_timer(void); +