From: Greg Kroah-Hartman Date: Tue, 27 Jan 2015 22:17:20 +0000 (-0800) Subject: 3.10-stable patches X-Git-Tag: v3.10.67~34 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=9feafe555f61776814d42abf301c7f6ddf5ca8ef;p=thirdparty%2Fkernel%2Fstable-queue.git 3.10-stable patches added patches: can-dev-fix-crtlmode_supported-check.patch clocksource-exynos_mct-fix-bitmask-regression-for-exynos4_mct_write.patch x86-hyperv-mark-the-hyper-v-clocksource-as-being-continuous.patch x86-tsc-change-fast-tsc-calibration-failed-from-error-to-info.patch --- diff --git a/queue-3.10/can-dev-fix-crtlmode_supported-check.patch b/queue-3.10/can-dev-fix-crtlmode_supported-check.patch new file mode 100644 index 00000000000..e63cc573fb1 --- /dev/null +++ b/queue-3.10/can-dev-fix-crtlmode_supported-check.patch @@ -0,0 +1,47 @@ +From 9b1087aa5e86448fe6ad40a58964e35f3ba423d5 Mon Sep 17 00:00:00 2001 +From: Oliver Hartkopp +Date: Mon, 5 Jan 2015 18:40:15 +0100 +Subject: can: dev: fix crtlmode_supported check + +From: Oliver Hartkopp + +commit 9b1087aa5e86448fe6ad40a58964e35f3ba423d5 upstream. + +When changing flags in the CAN drivers ctrlmode the provided new content has to +be checked whether the bits are allowed to be changed. The bits that are to be +changed are given as a bitfield in cm->mask. Therefore checking against +cm->flags is wrong as the content can hold any kind of values. + +The iproute2 tool sets the bits in cm->mask and cm->flags depending on the +detected command line options. To be robust against bogus user space +applications additionally sanitize the provided flags with the provided mask. + +Cc: Wolfgang Grandegger +Signed-off-by: Oliver Hartkopp +Signed-off-by: Marc Kleine-Budde +Signed-off-by: Greg Kroah-Hartman + + +--- + drivers/net/can/dev.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +--- a/drivers/net/can/dev.c ++++ b/drivers/net/can/dev.c +@@ -643,10 +643,14 @@ static int can_changelink(struct net_dev + if (dev->flags & IFF_UP) + return -EBUSY; + cm = nla_data(data[IFLA_CAN_CTRLMODE]); +- if (cm->flags & ~priv->ctrlmode_supported) ++ ++ /* check whether changed bits are allowed to be modified */ ++ if (cm->mask & ~priv->ctrlmode_supported) + return -EOPNOTSUPP; ++ ++ /* clear bits to be modified and copy the flag values */ + priv->ctrlmode &= ~cm->mask; +- priv->ctrlmode |= cm->flags; ++ priv->ctrlmode |= (cm->flags & cm->mask); + } + + if (data[IFLA_CAN_BITTIMING]) { diff --git a/queue-3.10/clocksource-exynos_mct-fix-bitmask-regression-for-exynos4_mct_write.patch b/queue-3.10/clocksource-exynos_mct-fix-bitmask-regression-for-exynos4_mct_write.patch new file mode 100644 index 00000000000..d55c273fcf7 --- /dev/null +++ b/queue-3.10/clocksource-exynos_mct-fix-bitmask-regression-for-exynos4_mct_write.patch @@ -0,0 +1,42 @@ +From 8c38d28ba8da98f7102c31d35359b4dbe9d1f329 Mon Sep 17 00:00:00 2001 +From: Tobias Jakobi +Date: Wed, 22 Oct 2014 03:37:08 +0200 +Subject: clocksource: exynos_mct: Fix bitmask regression for exynos4_mct_write + +From: Tobias Jakobi + +commit 8c38d28ba8da98f7102c31d35359b4dbe9d1f329 upstream. + +EXYNOS4_MCT_L_MASK is defined as 0xffffff00, so applying this bitmask +produces a number outside the range 0x00 to 0xff, which always results +in execution of the default switch statement. + +Obviously this is wrong and git history shows that the bitmask inversion +was incorrectly set during a refactoring of the MCT code. + +Fix this by putting the inversion at the correct position again. + +Acked-by: Kukjin Kim +Reported-by: GP Orcullo +Reviewed-by: Doug Anderson +Signed-off-by: Tobias Jakobi +Signed-off-by: Daniel Lezcano +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clocksource/exynos_mct.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/clocksource/exynos_mct.c ++++ b/drivers/clocksource/exynos_mct.c +@@ -94,8 +94,8 @@ static void exynos4_mct_write(unsigned i + __raw_writel(value, reg_base + offset); + + if (likely(offset >= EXYNOS4_MCT_L_BASE(0))) { +- stat_addr = (offset & ~EXYNOS4_MCT_L_MASK) + MCT_L_WSTAT_OFFSET; +- switch (offset & EXYNOS4_MCT_L_MASK) { ++ stat_addr = (offset & EXYNOS4_MCT_L_MASK) + MCT_L_WSTAT_OFFSET; ++ switch (offset & ~EXYNOS4_MCT_L_MASK) { + case MCT_L_TCON_OFFSET: + mask = 1 << 3; /* L_TCON write status */ + break; diff --git a/queue-3.10/series b/queue-3.10/series index 8018485d2e7..0a752e8b6a0 100644 --- a/queue-3.10/series +++ b/queue-3.10/series @@ -11,3 +11,7 @@ time-settimeofday-validate-the-values-of-tv-from-user.patch time-adjtimex-validate-the-adj_frequency-values.patch arm-dts-imx25-fix-pwm-per-clocks.patch bus-mvebu-mbus-fix-support-of-mbus-window-13.patch +can-dev-fix-crtlmode_supported-check.patch +clocksource-exynos_mct-fix-bitmask-regression-for-exynos4_mct_write.patch +x86-hyperv-mark-the-hyper-v-clocksource-as-being-continuous.patch +x86-tsc-change-fast-tsc-calibration-failed-from-error-to-info.patch diff --git a/queue-3.10/x86-hyperv-mark-the-hyper-v-clocksource-as-being-continuous.patch b/queue-3.10/x86-hyperv-mark-the-hyper-v-clocksource-as-being-continuous.patch new file mode 100644 index 00000000000..1cd3fcb9845 --- /dev/null +++ b/queue-3.10/x86-hyperv-mark-the-hyper-v-clocksource-as-being-continuous.patch @@ -0,0 +1,35 @@ +From 32c6590d126836a062b3140ed52d898507987017 Mon Sep 17 00:00:00 2001 +From: "K. Y. Srinivasan" +Date: Mon, 12 Jan 2015 16:26:02 -0800 +Subject: x86, hyperv: Mark the Hyper-V clocksource as being continuous + +From: "K. Y. Srinivasan" + +commit 32c6590d126836a062b3140ed52d898507987017 upstream. + +The Hyper-V clocksource is continuous; mark it accordingly. + +Signed-off-by: K. Y. Srinivasan +Acked-by: jasowang@redhat.com +Cc: gregkh@linuxfoundation.org +Cc: devel@linuxdriverproject.org +Cc: olaf@aepfle.de +Cc: apw@canonical.com +Link: http://lkml.kernel.org/r/1421108762-3331-1-git-send-email-kys@microsoft.com +Signed-off-by: Thomas Gleixner +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/kernel/cpu/mshyperv.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/x86/kernel/cpu/mshyperv.c ++++ b/arch/x86/kernel/cpu/mshyperv.c +@@ -60,6 +60,7 @@ static struct clocksource hyperv_cs = { + .rating = 400, /* use this when running on Hyperv*/ + .read = read_hv_clock, + .mask = CLOCKSOURCE_MASK(64), ++ .flags = CLOCK_SOURCE_IS_CONTINUOUS, + }; + + static void __init ms_hyperv_init_platform(void) diff --git a/queue-3.10/x86-tsc-change-fast-tsc-calibration-failed-from-error-to-info.patch b/queue-3.10/x86-tsc-change-fast-tsc-calibration-failed-from-error-to-info.patch new file mode 100644 index 00000000000..b16b085cb01 --- /dev/null +++ b/queue-3.10/x86-tsc-change-fast-tsc-calibration-failed-from-error-to-info.patch @@ -0,0 +1,44 @@ +From 520452172e6b318f3a8bd9d4fe1e25066393de25 Mon Sep 17 00:00:00 2001 +From: Alexandre Demers +Date: Tue, 9 Dec 2014 01:27:50 -0500 +Subject: x86/tsc: Change Fast TSC calibration failed from error to info + +From: Alexandre Demers + +commit 520452172e6b318f3a8bd9d4fe1e25066393de25 upstream. + +Many users see this message when booting without knowning that it is +of no importance and that TSC calibration may have succeeded by +another way. + +As explained by Paul Bolle in +http://lkml.kernel.org/r/1348488259.1436.22.camel@x61.thuisdomein + + "Fast TSC calibration failed" should not be considered as an error + since other calibration methods are being tried afterward. At most, + those send a warning if they fail (not an error). So let's change + the message from error to warning. + +[ tglx: Make if pr_info. It's really not important at all ] + +Fixes: c767a54ba065 x86/debug: Add KERN_ to bare printks, convert printks to pr_ +Signed-off-by: Alexandre Demers +Link: http://lkml.kernel.org/r/1418106470-6906-1-git-send-email-alexandre.f.demers@gmail.com +Signed-off-by: Thomas Gleixner +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/kernel/tsc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/x86/kernel/tsc.c ++++ b/arch/x86/kernel/tsc.c +@@ -380,7 +380,7 @@ static unsigned long quick_pit_calibrate + goto success; + } + } +- pr_err("Fast TSC calibration failed\n"); ++ pr_info("Fast TSC calibration failed\n"); + return 0; + + success: