From: Richard Henderson <richard.henderson@linaro.org>
Date: Thu, 28 Jul 2022 11:40:26 +0000 (-0700)
Subject: Merge tag 'pull-riscv-to-apply-20220728' of github.com:alistair23/qemu into staging
X-Git-Tag: v7.1.0-rc1~16
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=a17001c42329f809c7f1768925b8089324564312;p=thirdparty%2Fqemu.git

Merge tag 'pull-riscv-to-apply-20220728' of github.com:alistair23/qemu into staging

Sixth RISC-V PR for QEMU 7.1

This is a PR to go in for RC1. It fixes a segfault that occurs
when using multiple sockets on the RISC-V virt board. It also
includes a small fix to allow both Zmmul and M extensions.

* Allow both Zmmul and M extension
* Fix multi-socket plic configuraiton

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* tag 'pull-riscv-to-apply-20220728' of github.com:alistair23/qemu:
  hw/intc: sifive_plic: Fix multi-socket plic configuraiton
  RISC-V: Allow both Zmmul and M

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---

a17001c42329f809c7f1768925b8089324564312