From: Jonathan Wright Date: Mon, 8 Nov 2021 18:35:59 +0000 (+0000) Subject: aarch64: Use type-qualified builtins for [R]SHRN[2] Neon intrinsics X-Git-Tag: basepoints/gcc-13~3149 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=a22c03d439894a6eaaa5f149c76ff91b1a7c06fb;p=thirdparty%2Fgcc.git aarch64: Use type-qualified builtins for [R]SHRN[2] Neon intrinsics Declare unsigned type-qualified builtins and use them for [R]SHRN[2] Neon intrinsics. This removes the need for casts in arm_neon.h. gcc/ChangeLog: 2021-11-08 Jonathan Wright * config/aarch64/aarch64-simd-builtins.def: Declare type- qualified builtins for [R]SHRN[2]. * config/aarch64/arm_neon.h (vshrn_n_u16): Use type-qualified builtin and remove casts. (vshrn_n_u32): Likewise. (vshrn_n_u64): Likewise. (vrshrn_high_n_u16): Likewise. (vrshrn_high_n_u32): Likewise. (vrshrn_high_n_u64): Likewise. (vrshrn_n_u16): Likewise. (vrshrn_n_u32): Likewise. (vrshrn_n_u64): Likewise. (vshrn_high_n_u16): Likewise. (vshrn_high_n_u32): Likewise. (vshrn_high_n_u64): Likewise. --- diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def index 395d5146e6e1..42dfc4cf3546 100644 --- a/gcc/config/aarch64/aarch64-simd-builtins.def +++ b/gcc/config/aarch64/aarch64-simd-builtins.def @@ -253,15 +253,19 @@ /* Implemented by aarch64_shrn". */ BUILTIN_VQN (SHIFTIMM, shrn, 0, NONE) + BUILTIN_VQN (USHIFTIMM, shrn, 0, NONE) /* Implemented by aarch64_shrn2. */ - BUILTIN_VQN (SHIFTACC, shrn2, 0, NONE) + BUILTIN_VQN (SHIFT2IMM, shrn2, 0, NONE) + BUILTIN_VQN (USHIFT2IMM, shrn2, 0, NONE) /* Implemented by aarch64_rshrn". */ BUILTIN_VQN (SHIFTIMM, rshrn, 0, NONE) + BUILTIN_VQN (USHIFTIMM, rshrn, 0, NONE) /* Implemented by aarch64_rshrn2. */ - BUILTIN_VQN (SHIFTACC, rshrn2, 0, NONE) + BUILTIN_VQN (SHIFT2IMM, rshrn2, 0, NONE) + BUILTIN_VQN (USHIFT2IMM, rshrn2, 0, NONE) /* Implemented by aarch64_mlsl. */ BUILTIN_VD_BHSI (TERNOP, smlsl, 0, NONE) diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index dcc1b66dfef1..944b9662ed7f 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -7606,21 +7606,21 @@ __extension__ extern __inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vshrn_n_u16 (uint16x8_t __a, const int __b) { - return (uint8x8_t)__builtin_aarch64_shrnv8hi ((int16x8_t)__a, __b); + return __builtin_aarch64_shrnv8hi_uus (__a, __b); } __extension__ extern __inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vshrn_n_u32 (uint32x4_t __a, const int __b) { - return (uint16x4_t)__builtin_aarch64_shrnv4si ((int32x4_t)__a, __b); + return __builtin_aarch64_shrnv4si_uus (__a, __b); } __extension__ extern __inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vshrn_n_u64 (uint64x2_t __a, const int __b) { - return (uint32x2_t)__builtin_aarch64_shrnv2di ((int64x2_t)__a, __b); + return __builtin_aarch64_shrnv2di_uus (__a, __b); } __extension__ extern __inline int32x4_t @@ -8387,24 +8387,21 @@ __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vrshrn_high_n_u16 (uint8x8_t __a, uint16x8_t __b, const int __c) { - return (uint8x16_t) __builtin_aarch64_rshrn2v8hi ((int8x8_t) __a, - (int16x8_t) __b, __c); + return __builtin_aarch64_rshrn2v8hi_uuus (__a, __b, __c); } __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vrshrn_high_n_u32 (uint16x4_t __a, uint32x4_t __b, const int __c) { - return (uint16x8_t) __builtin_aarch64_rshrn2v4si ((int16x4_t) __a, - (int32x4_t) __b, __c); + return __builtin_aarch64_rshrn2v4si_uuus (__a, __b, __c); } __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vrshrn_high_n_u64 (uint32x2_t __a, uint64x2_t __b, const int __c) { - return (uint32x4_t) __builtin_aarch64_rshrn2v2di ((int32x2_t)__a, - (int64x2_t)__b, __c); + return __builtin_aarch64_rshrn2v2di_uuus (__a, __b, __c); } __extension__ extern __inline int8x8_t @@ -8432,21 +8429,21 @@ __extension__ extern __inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vrshrn_n_u16 (uint16x8_t __a, const int __b) { - return (uint8x8_t) __builtin_aarch64_rshrnv8hi ((int16x8_t) __a, __b); + return __builtin_aarch64_rshrnv8hi_uus (__a, __b); } __extension__ extern __inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vrshrn_n_u32 (uint32x4_t __a, const int __b) { - return (uint16x4_t) __builtin_aarch64_rshrnv4si ((int32x4_t) __a, __b); + return __builtin_aarch64_rshrnv4si_uus (__a, __b); } __extension__ extern __inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vrshrn_n_u64 (uint64x2_t __a, const int __b) { - return (uint32x2_t) __builtin_aarch64_rshrnv2di ((int64x2_t) __a, __b); + return __builtin_aarch64_rshrnv2di_uus (__a, __b); } __extension__ extern __inline uint32x2_t @@ -8488,24 +8485,21 @@ __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vshrn_high_n_u16 (uint8x8_t __a, uint16x8_t __b, const int __c) { - return (uint8x16_t) - __builtin_aarch64_shrn2v8hi ((int8x8_t) __a, (int16x8_t) __b, __c); + return __builtin_aarch64_shrn2v8hi_uuus (__a, __b, __c); } __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vshrn_high_n_u32 (uint16x4_t __a, uint32x4_t __b, const int __c) { - return (uint16x8_t) - __builtin_aarch64_shrn2v4si ((int16x4_t) __a, (int32x4_t) __b, __c); + return __builtin_aarch64_shrn2v4si_uuus (__a, __b, __c); } __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vshrn_high_n_u64 (uint32x2_t __a, uint64x2_t __b, const int __c) { - return (uint32x4_t) - __builtin_aarch64_shrn2v2di ((int32x2_t) __a, (int64x2_t) __b, __c); + return __builtin_aarch64_shrn2v2di_uuus (__a, __b, __c); } __extension__ extern __inline poly8x8_t