From: Dmitry Osipenko Date: Sun, 23 Aug 2020 14:47:23 +0000 (+0300) Subject: ARM: tegra: acer-a500: Set WiFi MMC clock rate to 50 MHz X-Git-Tag: v5.10-rc1~26^2~19^2~4 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=a252efadf3e7ffa8f5793cb431f35bb95bdc4795;p=thirdparty%2Flinux.git ARM: tegra: acer-a500: Set WiFi MMC clock rate to 50 MHz Previously 50MHz clock rate didn't work because of the wrong PINCTRL configuration used for SDIO pins. Now the PINCTRL config is corrected and the MMC clock rate could be bumped safely to 50MHz, increasing WiFi TX throughput by 20 Mbit/s and allowing to hit the maximum 40 Mbit/s. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts index bc7c1d0828285..9489eedcf0c9d 100644 --- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts @@ -736,7 +736,7 @@ #address-cells = <1>; #size-cells = <0>; - max-frequency = <25000000>; + max-frequency = <50000000>; keep-power-in-suspend; bus-width = <4>; non-removable;