From: Matt Roper Date: Tue, 10 Sep 2024 23:47:31 +0000 (-0700) Subject: drm/xe/pcode: Convert register access to use xe_mmio X-Git-Tag: v6.13-rc1~122^2~20^2~121 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=a3e7fcef52ea737902f32281e271f03ee0a2afa2;p=thirdparty%2Fkernel%2Flinux.git drm/xe/pcode: Convert register access to use xe_mmio Stop using GT pointers for register access. Although some of the pcode mailboxes are related to GTs, pcode itself (and the register interface to access it) are outside the GT and should be accessed through the tile's MMIO. Reviewed-by: Lucas De Marchi Signed-off-by: Matt Roper Link: https://patchwork.freedesktop.org/patch/msgid/20240910234719.3335472-56-matthew.d.roper@intel.com --- diff --git a/drivers/gpu/drm/xe/xe_pcode.c b/drivers/gpu/drm/xe/xe_pcode.c index 7397d556996ad..d95d9835de423 100644 --- a/drivers/gpu/drm/xe/xe_pcode.c +++ b/drivers/gpu/drm/xe/xe_pcode.c @@ -44,7 +44,7 @@ static int pcode_mailbox_status(struct xe_tile *tile) [PCODE_ERROR_MASK] = {-EPROTO, "Unknown"}, }; - err = xe_mmio_read32(tile->primary_gt, PCODE_MAILBOX) & PCODE_ERROR_MASK; + err = xe_mmio_read32(&tile->mmio, PCODE_MAILBOX) & PCODE_ERROR_MASK; if (err) { drm_err(&tile_to_xe(tile)->drm, "PCODE Mailbox failed: %d %s", err, err_decode[err].str ?: "Unknown"); @@ -58,7 +58,7 @@ static int __pcode_mailbox_rw(struct xe_tile *tile, u32 mbox, u32 *data0, u32 *d unsigned int timeout_ms, bool return_data, bool atomic) { - struct xe_gt *mmio = tile->primary_gt; + struct xe_mmio *mmio = &tile->mmio; int err; if (tile_to_xe(tile)->info.skip_pcode)