From: Radim Krčmář Date: Thu, 14 Jul 2016 05:56:34 +0000 (+0800) Subject: intel_iommu: support all masks in interrupt entry cache invalidation X-Git-Tag: v2.7.0-rc0~3^2~23 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=a3f409cb4a35d9aa6a4d24a7a1e05423e189cb7a;p=thirdparty%2Fqemu.git intel_iommu: support all masks in interrupt entry cache invalidation Linux guests do not gracefully handle cases when the invalidation mask they wanted is not supported, probably because real hardware always allowed all. We can just say that all 16 masks are supported, because both ioapic_iec_notifier and kvm_update_msi_routes_all invalidate all caches. Signed-off-by: Radim Krčmář Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 5a97548be5a..df2678b2144 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2362,7 +2362,7 @@ static void vtd_init(IntelIOMMUState *s) s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO; if (x86_iommu->intr_supported) { - s->ecap |= VTD_ECAP_IR | VTD_ECAP_EIM; + s->ecap |= VTD_ECAP_IR | VTD_ECAP_EIM | VTD_ECAP_MHMV; } vtd_reset_context_cache(s); diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index 72b01149275..0829a5064f2 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -186,6 +186,7 @@ /* Interrupt Remapping support */ #define VTD_ECAP_IR (1ULL << 3) #define VTD_ECAP_EIM (1ULL << 4) +#define VTD_ECAP_MHMV (15ULL << 20) /* CAP_REG */ /* (offset >> 4) << 24 */