From: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: Tue, 1 Apr 2025 08:09:27 +0000 (+0200)
Subject: target/openrisc: Restrict SoftMMU mmu_index() to TCG
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=a53066a9d660ee187a06062c1c44639714195a72;p=thirdparty%2Fqemu.git

target/openrisc: Restrict SoftMMU mmu_index() to TCG

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-15-philmd@linaro.org>
---

diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index e8abf1f8b5..dc55594a7d 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -247,6 +247,7 @@ static const TCGCPUOps openrisc_tcg_ops = {
     .translate_code = openrisc_translate_code,
     .synchronize_from_tb = openrisc_cpu_synchronize_from_tb,
     .restore_state_to_opc = openrisc_restore_state_to_opc,
+    .mmu_index = openrisc_cpu_mmu_index,
 
 #ifndef CONFIG_USER_ONLY
     .tlb_fill = openrisc_cpu_tlb_fill,
@@ -269,7 +270,6 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
                                        &occ->parent_phases);
 
     cc->class_by_name = openrisc_cpu_class_by_name;
-    cc->mmu_index = openrisc_cpu_mmu_index;
     cc->dump_state = openrisc_cpu_dump_state;
     cc->set_pc = openrisc_cpu_set_pc;
     cc->get_pc = openrisc_cpu_get_pc;