From: Chris Brandt Date: Wed, 26 Sep 2018 13:39:56 +0000 (-0500) Subject: clk: renesas: r7s9210: Add SPI clocks X-Git-Tag: v4.20-rc1~49^2~12^2^2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=a53a28dca4124048c90b4a8de457668ede57e67c;p=thirdparty%2Fkernel%2Flinux.git clk: renesas: r7s9210: Add SPI clocks Add RSPI clocks for RZ/A2. Signed-off-by: Chris Brandt Reviewed-by: Simon Horman Signed-off-by: Geert Uytterhoeven --- diff --git a/drivers/clk/renesas/r7s9210-cpg-mssr.c b/drivers/clk/renesas/r7s9210-cpg-mssr.c index d8ff4cb0defc2..5135f13ec6288 100644 --- a/drivers/clk/renesas/r7s9210-cpg-mssr.c +++ b/drivers/clk/renesas/r7s9210-cpg-mssr.c @@ -95,6 +95,9 @@ static const struct mssr_mod_clk r7s9210_mod_clks[] __initconst = { DEF_MOD_STB("i2c1", 86, R7S9210_CLK_P1), DEF_MOD_STB("i2c0", 87, R7S9210_CLK_P1), + DEF_MOD_STB("spi2", 95, R7S9210_CLK_P1), + DEF_MOD_STB("spi1", 96, R7S9210_CLK_P1), + DEF_MOD_STB("spi0", 97, R7S9210_CLK_P1), }; /* The clock dividers in the table vary based on DT and register settings */