From: Robin Murphy <robin.murphy@arm.com>
Date: Thu, 15 Aug 2019 18:37:22 +0000 (+0100)
Subject: iommu/qcom: Mask TLBI addresses correctly
X-Git-Tag: v5.4-rc1~193^2^4~1^2~18
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=a5b396ce5001a8b8c8594c7fa90b0df61d6b3272;p=thirdparty%2Fkernel%2Flinux.git

iommu/qcom: Mask TLBI addresses correctly

As with arm-smmu from whence this code was borrowed, the IOVAs passed in
here happen to be at least page-aligned anyway, but still; oh dear.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
---

diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c
index 34d0b9783b3ed..bed948c3058a9 100644
--- a/drivers/iommu/qcom_iommu.c
+++ b/drivers/iommu/qcom_iommu.c
@@ -155,7 +155,7 @@ static void qcom_iommu_tlb_inv_range_nosync(unsigned long iova, size_t size,
 		struct qcom_iommu_ctx *ctx = to_ctx(fwspec, fwspec->ids[i]);
 		size_t s = size;
 
-		iova &= ~12UL;
+		iova = (iova >> 12) << 12;
 		iova |= ctx->asid;
 		do {
 			iommu_writel(ctx, reg, iova);