From: Michael Matz Date: Thu, 14 Feb 2008 12:54:30 +0000 (+0000) Subject: re PR target/34930 (ICE in instantiate_virtual_regs_in_insn with vector splat load) X-Git-Tag: releases/gcc-4.3.0~162 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=a5bfb13a75be342bbe6296a95b8e61bdef02a684;p=thirdparty%2Fgcc.git re PR target/34930 (ICE in instantiate_virtual_regs_in_insn with vector splat load) PR target/34930 * function.c (instantiate_virtual_regs_in_insn): Reload address before falling back to reloading the whole operand. From-SVN: r132317 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 23d2bec85a74..936ae64ffbf8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2008-02-14 Michael Matz + + PR target/34930 + * function.c (instantiate_virtual_regs_in_insn): Reload address + before falling back to reloading the whole operand. + 2008-02-14 Andreas Krebbel * config/s390/s390.c (s390_mainpool_start): Emit the pool diff --git a/gcc/function.c b/gcc/function.c index 514d1a6e9b0b..d3fbd17c8cce 100644 --- a/gcc/function.c +++ b/gcc/function.c @@ -1468,6 +1468,20 @@ instantiate_virtual_regs_in_insn (rtx insn) start_sequence (); x = replace_equiv_address (x, addr); + /* It may happen that the address with the virtual reg + was valid (e.g. based on the virtual stack reg, which might + be acceptable to the predicates with all offsets), whereas + the address now isn't anymore, for instance when the address + is still offsetted, but the base reg isn't virtual-stack-reg + anymore. Below we would do a force_reg on the whole operand, + but this insn might actually only accept memory. Hence, + before doing that last resort, try to reload the address into + a register, so this operand stays a MEM. */ + if (!safe_insn_predicate (insn_code, i, x)) + { + addr = force_reg (GET_MODE (addr), addr); + x = replace_equiv_address (x, addr); + } seq = get_insns (); end_sequence (); if (seq)