From: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Date: Wed, 14 Jul 2021 10:27:23 +0000 (-0600)
Subject: mmc: sdhci: Fix rebase issues in set_ios
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=a7a410e69bfdd5b1eeb469b0dcc1a8d60be44554;p=thirdparty%2Fu-boot.git

mmc: sdhci: Fix rebase issues in set_ios

There are couple issues in set_ios function which are introduced when
xlnx code is rebased to mainline U-Boot version 2021.1 with
'commit 880b655d660e ("mmc: zynq_sdhci: Fix UHS 1.8v switching with 5ms
delay")'

Mainline 'commit f12341a95295 ("mmc: sdhci: Fix HISPD bit handling")' is
pulled partially when rebased to 2021.1. Fix it by adding back missing
HISPD bit setting code.

Remove extra line which writes back to sdhc host control register.

set_control_reg call got duplicated after rebase, remove it.

Since, voltage setting function (set_control_reg) is moved to the
beginning of the function, no need to return if the set_ios is called
with clock disable, so remove return.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
---

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 7ade95bba37..c69a4a02b1f 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -532,7 +532,7 @@ static int sdhci_set_ios(struct mmc *mmc)
 		sdhci_set_clock(mmc, mmc->clock);
 
 	if (mmc->clk_disable)
-		return sdhci_set_clock(mmc, 0);
+		sdhci_set_clock(mmc, 0);
 
 	/* Set bus width */
 	ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
@@ -557,11 +557,19 @@ static int sdhci_set_ios(struct mmc *mmc)
 		no_hispd_bit = true;
 	}
 
-	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
-
-	if (IS_SD(mmc) && SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
-		if (host->ops && host->ops->set_control_reg)
-			host->ops->set_control_reg(host);
+	if (!no_hispd_bit) {
+		if (mmc->selected_mode == MMC_HS ||
+		    mmc->selected_mode == SD_HS ||
+		    mmc->selected_mode == MMC_DDR_52 ||
+		    mmc->selected_mode == MMC_HS_200 ||
+		    mmc->selected_mode == MMC_HS_400 ||
+		    mmc->selected_mode == UHS_SDR25 ||
+		    mmc->selected_mode == UHS_SDR50 ||
+		    mmc->selected_mode == UHS_SDR104 ||
+		    mmc->selected_mode == UHS_DDR50)
+			ctrl |= SDHCI_CTRL_HISPD;
+		else
+			ctrl &= ~SDHCI_CTRL_HISPD;
 	}
 
 	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);