From: Prajna Rajendra Kumar Date: Tue, 14 May 2024 10:45:07 +0000 (+0100) Subject: spi: spi-microchip-core: Fix the number of chip selects supported X-Git-Tag: v6.11-rc1~205^2~44^2~1 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=a7ed3a11202d90939a3d00ffcc8cf50703cb7b35;p=thirdparty%2Fkernel%2Flinux.git spi: spi-microchip-core: Fix the number of chip selects supported The SPI "hard" controller in PolarFire SoC has eight CS lines, but only one CS line is wired. When the 'num-cs' property is not specified in the device tree, the driver defaults to the MAX_CS value, which has been fixed to 1 to match the hardware configuration; however, when the 'num-cs' property is explicitly defined in the device tree, it overrides the default value. Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers") Signed-off-by: Prajna Rajendra Kumar Reviewed-by: Conor Dooley Link: https://msgid.link/r/20240514104508.938448-3-prajna.rajendrakumar@microchip.com Signed-off-by: Mark Brown --- diff --git a/drivers/spi/spi-microchip-core.c b/drivers/spi/spi-microchip-core.c index 634364c7cfe61..c10de45aa4729 100644 --- a/drivers/spi/spi-microchip-core.c +++ b/drivers/spi/spi-microchip-core.c @@ -21,7 +21,7 @@ #include #define MAX_LEN (0xffff) -#define MAX_CS (8) +#define MAX_CS (1) #define DEFAULT_FRAMESIZE (8) #define FIFO_DEPTH (32) #define CLK_GEN_MODE1_MAX (255)